Searched refs:SS (Results 51 - 60 of 60) sorted by relevance
123
| /vbox/src/VBox/Additions/x11/x11include/xorg-server-1.1.0/ |
| H A D | assyntax.h | 134 #define SS ss macro
196 #define SS %ss macro
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| /vbox/src/VBox/Additions/x11/x11include/xorg-server-1.0.1/ |
| H A D | assyntax.h | 134 #define SS ss macro
196 #define SS %ss macro
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| /vbox/src/VBox/Devices/Graphics/BIOS/ |
| H A D | VBoxVgaBiosAlternative.asm | 1594 push SS ; 16
1602 push SS ; 16
1610 push SS ; 16
1711 push SS ; 16
1720 push SS ; 16
1727 push SS ; 16
6187 push SS ; 16
6256 push SS ; 16
6339 push SS ; 16
6601 push SS ; 1
[all...] |
| /vbox/src/VBox/Additions/x11/x11include/mesa-7.2/src/mesa/x86/ |
| H A D | assyntax.h | 118 #define SS ss macro
180 #define SS %ss macro
857 #define W_SS SS
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| /vbox/src/recompiler/ |
| H A D | VBoxRecompiler.c | 407 STAM_REG(pVM, &gaStatRefuseStale[R_SS], STAMTYPE_COUNTER, "/REM/Refuse/StaleSS", STAMUNIT_OCCURENCES, "Raw mode refused because of stale SS");
420 STAM_REG(pVM, &gStatSelOutOfSync[2], STAMTYPE_COUNTER, "/REM/State/SelOutOfSync/SS", STAMUNIT_OCCURENCES, "SS out of sync");
427 STAM_REG(pVM, &gStatSelOutOfSyncStateBack[2], STAMTYPE_COUNTER, "/REM/StateBack/SelOutOfSync/SS", STAMUNIT_OCCURENCES, "SS out of sync");
1666 Log2(("raw mode refused: stale SS (%#x)\n", env->segs[R_SS].selector));
2413 SYNC_IN_SREG(&pVM->rem.s.Env, SS, &pVM->rem.s.Env.segs[R_SS], &pCtx->ss);
2610 SYNC_BACK_SREG(ss, SS);
2864 SYNC_BACK_SREG(ss, SS);
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| /vbox/src/VBox/Devices/EFI/Firmware/MdePkg/Include/Library/ |
| H A D | BaseLib.h | 5077 UINT16 SS; member in struct:__anon11945
6337 Reads the current value of Stack Segment Register (SS).
6339 Reads and returns the current value of SS. This function is only available on
6342 @return The current value of SS.
7140 The stack is initialized to the SS and ESP fields of RealModeState. Any parameters passed to
7141 the 16-bit real mode code must be populated by the caller at SS:ESP prior to calling this function.
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| /vbox/src/VBox/Main/src-server/ |
| H A D | HostImpl.cpp | 158 #undef SS macro
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| /vbox/src/VBox/VMM/VMMR0/ |
| H A D | HMSVMR0.cpp | 165 /** Segment register: CS, SS, DS, ES limit and base. */
1318 /* Guest Segment registers: CS, SS, DS, ES, FS, GS. */
1322 HMSVM_LOAD_SEG_REG(SS, ss);
1879 Log4(("Load: CS:RIP=%04x:%RX64 EFL=%#x SS:RSP=%04x:%RX64\n", pCtx->cs.Sel, pCtx->rip, pCtx->eflags.u, pCtx->ss, pCtx->rsp));
1965 HMSVM_SAVE_SEG_REG(SS, ss);
2005 * Sync the hidden SS DPL field. AMD CPUs have a separate CPL field in the VMCB and uses that
2006 * and thus it's possible that when the CPL changes during guest execution that the SS DPL
2525 * Instructions like STI and MOV SS inhibit interrupts till the next instruction completes. Check if we should
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| H A D | HMVMXR0.cpp | 533 /* 26 */ "VM-entry with events blocked by MOV SS.",
2941 * Host CS and SS segment registers.
2953 /* Seems darwin uses the LDT (TI flag is set) in the CS & SS selectors which VT-x doesn't like. */
3506 * Check if we should inhibit interrupt delivery due to instructions like STI and MOV SS.
3553 Assert((uIntrState & 0x3) != 0x3); /* Block-by-STI and MOV SS cannot be simultaneously set. */
4326 /* SS */
4435 /* SS */
4543 * Guest Segment registers: CS, SS, DS, ES, FS, GS.
5117 Log4(("Host SS %#08x\n", u32Val));
5121 HMR0DumpDescriptor(pDesc, u32Val, "SS
[all...] |
| /vbox/src/VBox/Devices/PC/BIOS/ |
| H A D | VBoxBiosAlternative.asm | 2464 push SS ; 16
5014 push SS ; 16
5073 push SS ; 16
7267 push SS ; 16
10789 push SS ; 16
11554 push SS ; 16
11840 push SS ; 16
13242 push SS ; 16
14293 pop SS ; 17
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