Searched refs:u32 (Results 126 - 150 of 234) sorted by relevance

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/illumos-gate/usr/src/grub/grub-0.97/netboot/
H A Dforcedeth.c67 typedef unsigned int u32; typedef
287 u32 PacketBuffer;
314 u32 linkspeed;
320 u32 orig_mac[2];
321 u32 irqmask;
328 u32 rx_dma[RX_RING];
337 u32 tx_dma[TX_RING];
348 static int reg_delay(int offset, u32 mask,
349 u32 target, int delay, int delaymax, const char *msg)
397 u32 re
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H A Dw89c840.c91 typedef unsigned int u32; typedef
146 static u32 driver_flags = CanHaveMII | HasBrokenTx;
209 u32 buffer1;
210 u32 next_desc;
216 u32 buffer1, buffer2; /* We use only buffer 1. */
275 static void decode_interrupt(u32 intr_status)
349 static void handle_intr(u32 intr_stat)
387 u32 intr_status = readl(ioaddr + IntrStatus);
515 w840private.tx_ring[entry].length = (DescWholePkt | (u32) s);
545 u32 intr_sta
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H A Dsis900.h370 typedef unsigned int u32; typedef
377 u32 link;
378 volatile u32 cmdsts;
379 u32 bufptr;
H A Dpcnet32.c61 typedef unsigned int u32; typedef
64 static u32 ioaddr; /* Globally used for the card's io address */
199 u32 base;
202 u32 msg_length;
203 u32 reserved;
207 u32 base;
210 u32 misc;
211 u32 reserved;
220 u32 filter[2];
222 u32 rx_rin
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H A Ddavicom.c56 typedef unsigned int u32; typedef
170 static void phy_write_1bit(u32, u32);
171 static int phy_read_1bit(u32);
215 u32 io_dcr9;
259 u32 io_dcr9;
297 static void phy_write_1bit(u32 ee_addr, u32 phy_data)
311 static int phy_read_1bit(u32 ee_addr)
/illumos-gate/usr/src/uts/intel/io/drm/
H A Dradeon_irq.c43 static inline u32
44 radeon_acknowledge_irqs(drm_radeon_private_t *dev_priv, u32 mask)
77 u32 stat;
346 u32 flag;
347 u32 value;
H A Di915_drv.h201 u32 eir;
202 u32 pgtbl_er;
203 u32 pipeastat;
204 u32 pipebstat;
205 u32 ipeir;
206 u32 ipehr;
207 u32 instdone;
208 u32 acthd;
209 u32 instpm;
210 u32 instp
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H A Dradeon_cp.c48 static const u32 R200_cp_microcode[][2] = {
307 static const u32 radeon_cp_microcode[][2] = {
566 static const u32 R300_cp_microcode[][2] = {
867 u32 tmp;
992 u32 tmp;
1045 u32 cur_read_ptr;
1072 u32 clock_cntl_index, mclk_cntl, rbbm_soft_reset;
1128 u32 ring_start, cur_read_ptr;
1129 u32 tmp;
1213 dev_priv->scratch = ((__volatile__ u32 *)
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/illumos-gate/usr/src/uts/common/io/i40e/
H A Di40e_osdep.h105 typedef uint32_t u32; typedef
113 #define __le32 u32
116 #define __be32 u32
147 u32 size;
196 extern void i40e_debug(void *, u32, char *, ...);
/illumos-gate/usr/src/uts/common/io/bnxe/577xx/common/
H A Dbnxe_clc.c83 #define OFFSETOF(_s, _m) ((u32) ((u8 *)(&((_s *) 0)->_m) - \
345 static u32 elink_bits_en(struct elink_dev *cb, u32 reg, u32 bits)
347 u32 val = REG_RD(cb, reg);
354 static u32 elink_bits_dis(struct elink_dev *cb, u32 reg, u32 bits)
356 u32 val = REG_RD(cb, reg);
374 u32 link_statu
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/illumos-gate/usr/src/uts/common/io/bnxe/577xx/include/
H A Dbcmtype.h74 typedef u32 u32_t;
109 typedef u_int32_t u32; typedef
240 typedef U32 u32; typedef
/illumos-gate/usr/src/uts/common/io/ixgbe/
H A Dixgbe_osdep.h138 typedef uint32_t u32; typedef
144 #define __le32 u32
147 #define __be32 u32
H A Dixgbe_sw.h252 #define IXGBE_FLAG_DCA_ENABLED (u32)(1)
253 #define IXGBE_FLAG_DCA_CAPABLE (u32)(1 << 1)
254 #define IXGBE_FLAG_DCB_ENABLED (u32)(1 << 2)
255 #define IXGBE_FLAG_DCB_CAPABLE (u32)(1 << 4)
256 #define IXGBE_FLAG_RSS_ENABLED (u32)(1 << 4)
257 #define IXGBE_FLAG_RSS_CAPABLE (u32)(1 << 5)
258 #define IXGBE_FLAG_VMDQ_CAPABLE (u32)(1 << 6)
259 #define IXGBE_FLAG_VMDQ_ENABLED (u32)(1 << 7)
260 #define IXGBE_FLAG_FAN_FAIL_CAPABLE (u32)(1 << 8)
261 #define IXGBE_FLAG_RSC_CAPABLE (u32)(
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/illumos-gate/usr/src/uts/common/io/xge/hal/include/
H A Dxgehal-ring.h132 (u32)((Control_2 & vBIT(0xFFFFFFFF,16,32))>>16)
169 u32 host_control;
170 u32 control_3;
172 u32 control_3;
173 u32 host_control;
350 u32 rth_value;
H A Dxgehal-channel.h400 u32 msi_msg;
406 u32 msix_data;
/illumos-gate/usr/src/uts/common/io/ntxn/
H A Dunm_nic_isr.c57 u32 portno = adapter->portnum;
58 u32 val, linkup, qg_linksup = adapter->ahw.linkup;
/illumos-gate/usr/src/uts/common/io/cxgbe/common/
H A Dcommon.c86 t4_wait_op_done(struct adapter *adapter, int reg, u32 mask, int polarity,
/illumos-gate/usr/src/uts/common/sys/
H A Depoll.h29 uint32_t u32; member in union:epoll_data
/illumos-gate/usr/src/boot/sys/boot/arm/at91/libat91/
H A Dtag_list.c27 #define u32 unsigned macro
/illumos-gate/usr/src/uts/common/io/mac/
H A Dmac_ndd.c194 uint32_t u32; local
250 value = (uchar_t *)&u32;
265 new_value = u32 = (long)u64;
278 new_value = u32;
336 uint32_t u32; local
391 u32 = (uint32_t)new_value;
392 vp = (uchar_t *)&u32;
/illumos-gate/usr/src/uts/common/io/i40e/core/
H A Di40e_common.c1003 u32 port, ari, func_rid;
1084 cmd_data->mac_sal = CPU_TO_LE32(((u32)mac_addr[2] << 24) |
1085 ((u32)mac_addr[3] << 16) |
1086 ((u32)mac_addr[4] << 8) |
1149 void i40e_pre_tx_queue_cfg(struct i40e_hw *hw, u32 queue, bool enable)
1151 u32 abs_queue_idx = hw->func_caps.base_queue + queue;
1152 u32 reg_block = 0;
1153 u32 reg_val;
1181 u32 pba_num_size)
1211 if (pba_num_size < (((u32)pba_siz
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/illumos-gate/usr/src/uts/common/io/xge/hal/xgehal/
H A Dxgehal-device.c87 __hal_pio_mem_write32_upper(pci_dev_h pdev, pci_reg_h regh, u32 val, void *addr)
104 __hal_pio_mem_write32_lower(pci_dev_h pdev, pci_reg_h regh, u32 val,
360 (u32)(val64 >> 32), &bar0->mac_cfg);
390 (u32)(val64 >> 32), &bar0->mac_cfg);
453 (u32)(val64 >> 32), (char*)&bar0->mac_cfg);
1271 (u32)(value>>32), reg);
1274 (u32)value, reg);
1455 __hal_pio_mem_write32_lower(hldev->pdev, hldev->regh0, (u32)val64,
1458 __hal_pio_mem_write32_upper(hldev->pdev, hldev->regh0, (u32)(val64>>32),
1461 __hal_pio_mem_write32_upper(hldev->pdev, hldev->regh0, (u32)(val6
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/illumos-gate/usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/
H A Dlm_phy.c59 void elink_cb_dbg1(struct elink_dev *bp, _In_ char* fmt, u32 arg1 )
63 void elink_cb_dbg2(struct elink_dev *bp, _In_ char* fmt, u32 arg1, u32 arg2 )
68 void elink_cb_dbg3(struct elink_dev *bp, _In_ char* fmt, u32 arg1, u32 arg2, u32 arg3 )
75 u32 elink_cb_reg_read(struct elink_dev *cb, u32 reg_addr )
80 void elink_cb_reg_write(struct elink_dev *cb, u32 reg_addr, u32 va
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/illumos-gate/usr/src/uts/common/io/cxgbe/t4nex/
H A Dt4_l2t.c88 static inline u32
89 jhash_3words(u32 a, u32 b, u32 c, u32 initval)
100 static inline u32
101 jhash_2words(u32 a, u32 b, u32 initval)
/illumos-gate/usr/src/uts/common/io/bnxe/577xx/drivers/common/ecore/
H A Decore_sp_verbs.h130 u32 cid;
534 u32 cid;
798 u32 rss_key[10];
930 #define MAC_PAD (ECORE_ALIGN(ETH_ALEN, sizeof(u32)) - ETH_ALEN)
1104 u32 cids[ECORE_MULTI_TX_COS];
1216 u32 load_phase;
1228 u32 reset_phase;
1321 u32 drift_adjust_period;
1447 struct ecore_queue_sp_obj *obj, u8 cl_id, u32 *cids,
1460 u8 cl_id, u32 ci
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