Searched refs:control (Results 151 - 158 of 158) sorted by relevance

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/illumos-gate/usr/src/cmd/picl/plugins/sun4u/daktari/conf/
H A Dpsvcobj.conf2109 CPU0_PRIM_FAN Fan-control-value CPU_PFAN_SPEED_CONTROL DtoAControlValue
2110 CPU1_PRIM_FAN Fan-control-value CPU_PFAN_SPEED_CONTROL DtoAControlValue
2111 IO0_PRIM_FAN Fan-control-value IO_PFAN_SPEED_CONTROL DtoAControlValue
2112 IO1_PRIM_FAN Fan-control-value IO_PFAN_SPEED_CONTROL DtoAControlValue
/illumos-gate/usr/src/cmd/picl/plugins/sun4u/silverstone/conf/
H A Dpsvcobj.conf2109 CPU0_PRIM_FAN Fan-control-value CPU_PFAN_SPEED_CONTROL DtoAControlValue
2110 CPU1_PRIM_FAN Fan-control-value CPU_PFAN_SPEED_CONTROL DtoAControlValue
2111 IO0_PRIM_FAN Fan-control-value IO_PFAN_SPEED_CONTROL DtoAControlValue
2112 IO1_PRIM_FAN Fan-control-value IO_PFAN_SPEED_CONTROL DtoAControlValue
/illumos-gate/usr/src/uts/common/io/fibre-channel/fca/emlxs/
H A Demlxs_sli3.c1772 * Map in control registers, using memory-mapped version of
6758 uint32_t control; local
6769 control = mb->un.varRegLogin.un.sp.bdeSize;
6770 if (control == 0) {
/illumos-gate/usr/src/uts/sun4u/cpu/
H A Dus3_common_asm.s735 ldxa [%g0]ASI_EC_CTRL, %o0 ! read Ch/Ch+ E$ control reg
1095 ldxa [%g0]ASI_DCU, %o0 /* DCU control register */
1143 * Otherwise control is transfered to pil_interrupt. Note that if
2688 * Due to the behavior of the I$ control logic when accessing ASI_IC_TAG,
/illumos-gate/usr/src/grub/grub-0.97/stage2/
H A Dbuiltins.c3567 " interactive editing control (menu entry editor and"
4354 {"control", 0, 0, 0, 0x1d},
4551 " braceleft, bracketright, braceright, enter, control, semicolon, colon,"
5164 " You may use \\e for ESC and ^X for a control character."
/illumos-gate/usr/src/uts/common/io/wpi/
H A Dwpi.c1373 /* start automatic rate control */
1445 node.control = 1;
2785 /* setup MRR for control frames */
2790 "could not setup MRR for control frames\n"));
/illumos-gate/usr/src/uts/common/io/bge/
H A Dbge_chip2.c76 * Value to put in the Read/Write DMA control register. See
840 * then restore to automatic hardware control. This is used
1368 * and the NVM control registers don't exist ...
1715 * attempt take control of it. The caller can try again later ...
1767 * Try to acquire control of the NVmem; if successful, then:
1771 * relinquish control
2530 bge_reg_put32(bgep, RECV_RULE_CONTROL_REG(i), rulep->control);
3115 * Various registers that control the chip's internal engines (state
3161 * Various registers that control the chip's internal engines (state
3320 * Various registers that control th
[all...]
/illumos-gate/usr/src/grub/grub-0.97/
H A Dconfigure817 For better control, use the options below.

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