Searched defs:val (Results 1 - 25 of 35) sorted by relevance

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/solaris-x11-s12/open-src/kernel/i915/src/
H A Di915_suspend.c54 static void i915_write_ar(struct drm_device *dev, u16 st01, u8 reg, u8 val, u16 palette_enable) argument
60 I915_WRITE8(VGA_AR_DATA_WRITE, val);
63 static void i915_write_indexed(struct drm_device *dev, u16 index_port, u16 data_port, u8 reg, u8 val) argument
68 I915_WRITE8(data_port, val);
H A Dintel_sideband.c30 u32 port, u32 opcode, u32 addr, u32 *val)
50 I915_WRITE(VLV_IOSF_DATA, *val);
60 *val = I915_READ(VLV_IOSF_DATA);
68 u32 val = 0; local
74 PUNIT_OPCODE_REG_READ, addr, &val);
77 return val;
80 void vlv_punit_write(struct drm_i915_private *dev_priv, u8 addr, u32 val) argument
86 PUNIT_OPCODE_REG_WRITE, addr, &val);
92 u32 val = 0; local
98 PUNIT_OPCODE_REG_READ, addr, &val);
29 vlv_sideband_rw(struct drm_i915_private *dev_priv, u32 devfn, u32 port, u32 opcode, u32 addr, u32 *val) argument
106 u32 val = 0; local
114 vlv_dpio_write(struct drm_i915_private *dev_priv, int reg, u32 val) argument
[all...]
H A Ddvo_ns2501.c563 uint8_t val; local
565 ns2501_readb(dvo, NS2501_FREQ_LO, &val);
566 DRM_LOG_KMS("NS2501_FREQ_LO: 0x%02x\n", val);
567 ns2501_readb(dvo, NS2501_FREQ_HI, &val);
568 DRM_LOG_KMS("NS2501_FREQ_HI: 0x%02x\n", val);
569 ns2501_readb(dvo, NS2501_REG8, &val);
570 DRM_LOG_KMS("NS2501_REG8: 0x%02x\n", val);
571 ns2501_readb(dvo, NS2501_REG9, &val);
572 DRM_LOG_KMS("NS2501_REG9: 0x%02x\n", val);
573 ns2501_readb(dvo, NS2501_REGC, &val);
[all...]
H A Ddvo_sil164.c256 uint8_t val; local
258 (void) sil164_readb(dvo, SIL164_FREQ_LO, &val);
259 DRM_LOG_KMS("SIL164_FREQ_LO: 0x%02x\n", val);
260 (void) sil164_readb(dvo, SIL164_FREQ_HI, &val);
261 DRM_LOG_KMS("SIL164_FREQ_HI: 0x%02x\n", val);
262 (void) sil164_readb(dvo, SIL164_REG8, &val);
263 DRM_LOG_KMS("SIL164_REG8: 0x%02x\n", val);
264 (void) sil164_readb(dvo, SIL164_REG9, &val);
265 DRM_LOG_KMS("SIL164_REG9: 0x%02x\n", val);
266 (void) sil164_readb(dvo, SIL164_REGC, &val);
[all...]
H A Ddvo_ivch.c383 uint16_t val; local
385 (void) ivch_read(dvo, VR00, &val);
386 DRM_LOG_KMS("VR00: 0x%04x\n", val);
387 (void) ivch_read(dvo, VR01, &val);
388 DRM_LOG_KMS("VR01: 0x%04x\n", val);
389 (void) ivch_read(dvo, VR30, &val);
390 DRM_LOG_KMS("VR30: 0x%04x\n", val);
391 (void) ivch_read(dvo, VR40, &val);
392 DRM_LOG_KMS("VR40: 0x%04x\n", val);
395 (void) ivch_read(dvo, VR80, &val);
[all...]
H A Ddvo_tfp410.c279 uint8_t val, val2; local
281 (void) tfp410_readb(dvo, TFP410_REV, &val);
282 DRM_LOG_KMS("TFP410_REV: 0x%02X\n", val);
283 (void) tfp410_readb(dvo, TFP410_CTL_1, &val);
284 DRM_LOG_KMS("TFP410_CTL1: 0x%02X\n", val);
285 (void) tfp410_readb(dvo, TFP410_CTL_2, &val);
286 DRM_LOG_KMS("TFP410_CTL2: 0x%02X\n", val);
287 (void) tfp410_readb(dvo, TFP410_CTL_3, &val);
288 DRM_LOG_KMS("TFP410_CTL3: 0x%02X\n", val);
289 (void) tfp410_readb(dvo, TFP410_USERCFG, &val);
[all...]
H A Dintel_i2c.c74 u32 val; local
80 val = I915_READ(DSPCLK_GATE_D);
82 val |= DPCUNIT_CLOCK_GATE_DISABLE;
84 val &= ~DPCUNIT_CLOCK_GATE_DISABLE;
85 I915_WRITE(DSPCLK_GATE_D, val);
308 u32 val, loop = 0; local
315 val = I915_READ(GMBUS3 + reg_offset);
317 *buf++ = val & 0xff;
318 val >>= 8;
331 u32 val, loo local
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H A Dintel_lvds.c401 static int intel_lid_notify(struct notifier_block *nb, unsigned long val,
842 unsigned int val; local
854 val = I915_READ(lvds_encoder->reg);
855 if (!(val & ~(LVDS_PIPE_MASK | LVDS_DETECTED)))
856 val = dev_priv->vbt.bios_lvds_val;
858 return (val & LVDS_CLKB_POWER_MASK) == LVDS_CLKB_POWER_UP;
H A Dintel_panel.c334 u32 val; local
339 val = I915_READ(BLC_PWM_PCH_CTL2);
341 dev_priv->regfile.saveBLC_PWM_CTL2 = val;
342 } else if (val == 0) {
343 val = dev_priv->regfile.saveBLC_PWM_CTL2;
344 I915_WRITE(BLC_PWM_PCH_CTL2, val);
347 val = I915_READ(BLC_PWM_CTL);
349 dev_priv->regfile.saveBLC_PWM_CTL = val;
353 } else if (val == 0) {
354 val
388 intel_panel_compute_brightness(struct drm_device *dev, u32 val) argument
408 u32 val; local
439 u32 val = I915_READ(BLC_PWM_CPU_CTL) & ~BACKLIGHT_DUTY_CYCLE_MASK; local
[all...]
H A Ddvo_ch7xxx.c334 u8 val; local
336 ch7xxx_readb(dvo, CH7xxx_PM, &val);
338 if (val & (CH7xxx_PM_DVIL | CH7xxx_PM_DVIP))
349 uint8_t val; local
352 (void) ch7xxx_readb(dvo, i, &val);
353 DRM_LOG_KMS("%02X ", val);
H A Dintel_ddi.c369 uint32_t val; local
376 val = I915_READ(SPLL_CTL);
377 WARN_ON(!(val & SPLL_PLL_ENABLE));
378 I915_WRITE(SPLL_CTL, val & ~SPLL_PLL_ENABLE);
386 val = I915_READ(WRPLL_CTL1);
387 WARN_ON(!(val & WRPLL_PLL_ENABLE));
388 I915_WRITE(WRPLL_CTL1, val & ~WRPLL_PLL_ENABLE);
396 val = I915_READ(WRPLL_CTL2);
397 WARN_ON(!(val & WRPLL_PLL_ENABLE));
398 I915_WRITE(WRPLL_CTL2, val
643 uint32_t reg, val; local
854 uint32_t val = I915_READ(reg); local
1072 uint32_t val; local
1078 I915_WRITE(DDI_BUF_CTL(port), val); local
1085 I915_WRITE(DP_TP_CTL(port), val); local
1179 uint32_t val = I915_READ(LCPLL_CTL); local
1202 uint32_t val; local
1209 I915_WRITE(DDI_BUF_CTL(port), val); local
1216 I915_WRITE(DP_TP_CTL(port), val); local
1227 I915_WRITE(DP_TP_CTL(port), val); local
1241 uint32_t val; local
[all...]
H A Dintel_hdmi.c147 u32 val = I915_READ(VIDEO_DIP_CTL); local
150 if (!(val & VIDEO_DIP_ENABLE))
153 val &= ~(VIDEO_DIP_SELECT_MASK | 0xf); /* clear DIP data offset */
154 val |= g4x_infoframe_index(frame);
156 val &= ~g4x_infoframe_enable(frame);
158 I915_WRITE(VIDEO_DIP_CTL, val);
170 val |= g4x_infoframe_enable(frame);
171 val &= ~VIDEO_DIP_FREQ_MASK;
172 val |= VIDEO_DIP_FREQ_VSYNC;
174 I915_WRITE(VIDEO_DIP_CTL, val);
188 u32 val = I915_READ(reg); local
228 u32 val = I915_READ(reg); local
271 u32 val = I915_READ(reg); local
312 u32 val = I915_READ(ctl_reg); local
392 u32 val = I915_READ(reg); local
457 u32 val = I915_READ(reg); local
517 u32 val = I915_READ(reg); local
552 u32 val = I915_READ(reg); local
586 u32 val = I915_READ(reg); local
960 intel_hdmi_set_property(struct drm_connector *connector, struct drm_property *property, uint64_t val) argument
1039 u32 val; local
[all...]
H A Ddvo_ch7017.c172 static bool ch7017_read(struct intel_dvo_device *dvo, u8 addr, u8 *val) argument
185 .buf = val,
191 static bool ch7017_write(struct intel_dvo_device *dvo, uint8_t addr, uint8_t val) argument
193 uint8_t buf[2] = { addr, val };
209 u8 val; local
218 if (!ch7017_read(dvo, CH7017_DEVICE_ID, &val))
221 switch (val) {
234 val, adapter->name,dvo->slave_addr);
344 uint8_t val; local
346 (void) ch7017_read(dvo, CH7017_LVDS_POWER_DOWN, &val);
372 uint8_t val; local
384 uint8_t val; local
[all...]
/solaris-x11-s12/open-src/kernel/drm/src/
H A Ddrm_sun_pci.c149 void pci_read_config_byte(struct pci_dev *pdev, int where, u8 *val) argument
151 *val = pci_config_get8(pdev->pci_cfg_acc_handle, where);
154 void pci_read_config_word(struct pci_dev *pdev, int where, u16 *val) argument
156 *val = pci_config_get16(pdev->pci_cfg_acc_handle, where);
159 void pci_read_config_dword(struct pci_dev *pdev, int where, u32 *val) argument
161 *val = pci_config_get32(pdev->pci_cfg_acc_handle, where);
164 void pci_write_config_byte(struct pci_dev *pdev, int where, u8 val) argument
166 pci_config_put8(pdev->pci_cfg_acc_handle, where, val);
169 void pci_write_config_word(struct pci_dev *pdev, int where, u16 val) argument
171 pci_config_put16(pdev->pci_cfg_acc_handle, where, val);
174 pci_write_config_dword(struct pci_dev *pdev, int where, u32 val) argument
[all...]
/solaris-x11-s12/open-src/xserver/xorg/sun-src/os/solaris/mdb/modules/
H A DXserver_device_grabs.c120 ilog2(int val) argument
124 if (val <= 0)
126 for (bits = 0; val != 0; bits++)
127 val >>= 1;
/solaris-x11-s12/open-src/app/gfx-utils/sun-src/fbconf_xorg/xf86/
H A DFlags.c74 extern LexRec val;
112 ptr->flg_comment = xf86addComment(ptr->flg_comment, val.str);
150 valstr = val.str;
156 sprintf(valstr, "%d", val.num);
219 char *val, /* Ptr to new option value string */
249 new->opt_val = val;
305 xf86addNewOption (XF86OptionPtr head, char *name, char *val) argument
308 return (xf86addNewOptionOrValue(head, name, val, 0));
310 return (xf86addNewOptionOrValue(head, name, val, 0, NULL));
658 name = val
216 xf86addNewOptionOrValue( XF86OptionPtr head, char *name, char *val, int used) argument
[all...]
H A Dscan.c129 LexRec val; variable
405 val.str = configRBuf;
444 val.num = xf86strToUL (configRBuf);
445 val.realnum = atof (configRBuf);
461 val.str = xf86confmalloc (strlen (configRBuf) + 1);
462 strcpy (val.str, configRBuf); /* private copy ! */
536 *comment = xf86addComment(*comment, val.str);
562 *comment = xf86addComment(*comment, val.str);
1092 return StringToToken (val.str, tab);
/solaris-x11-s12/open-src/app/gfx-utils/sun-src/vts/ast/
H A Dmemory.c27 uint64_t val[8]; member in union:MemType
284 data[i].val[j] = ((unsigned long long)
286 cdata[i].val[j] = ~data[i].val[j];
336 dp[subscr].val[i];
368 rdval[0].val[i] =
395 if (rdval[0].val[i] !=
396 dp[subscr].val[i])
H A Dtools.c1185 register uint_t const val)
1197 data.l = val;
1183 ast_mmio_write32( register uint_t const port, register uint_t const val) argument
/solaris-x11-s12/open-src/app/gfx-utils/sun-src/vts/mga/
H A Dmemory.c27 uint64_t val[8]; member in union:MemType
290 data[i].val[j] = ((unsigned long long)
292 cdata[i].val[j] = ~data[i].val[j];
341 dp[subscr].val[i];
373 rdval[0].val[i] =
400 if (rdval[0].val[i] != dp[subscr].val[i]) {
/solaris-x11-s12/open-src/xserver/xorg/sun-src/os/
H A Ddtlogin.c433 long val; local
436 val = strtol(v, NULL, 10);
438 if ((val == 0) && (strcmp(v, "0") != 0)) {
444 if ( ((val == LONG_MAX) || (val == LONG_MIN))
452 dmd->user.uid = (uid_t) val;
455 dmd->user.gid = (gid_t) val;
459 dmd->user.groupids[dmd->user.groupid_cnt++] = (gid_t) val;
/solaris-x11-s12/open-src/app/gfx-utils/sun-src/gfx_common/config/
H A Dgfx_gamma_pack.c73 int val[4]; /* Up to 4 packed values */ member in struct:__anon93
325 tbl = delta_table[offs].val;
430 Dprintf("\npack_int: ====> val=%d\n", data);
500 Dprintf(" ====> val=%d\n", data);
547 Dprintf(" ====> val=%d\n", data);
1208 printf("ix=%4d val=%4d,%03x del=%4d ddel=%4d\n",
1298 printf("ix=%4d val=%4d,%03x del=%4d ddel=%4d\n",
/solaris-x11-s12/open-src/app/xmag_multivis/sun-src/
H A Dmultivis.c502 unsigned long val = 0; local
504 if (i < pCmp->rmax) val |= i << pCmp->rshft;
505 if (i < pCmp->gmax) val |= i << pCmp->gshft;
506 if (i < pCmp->bmax) val |= i << pCmp->bshft;
507 return val;
/solaris-x11-s12/open-src/lib/libdga/sun-src/
H A Ddga_Xrequests.c330 int val; local
337 val = DgaWgGrab(pWin, NEW);
339 if (val) {
340 if (dga_winlist_add(val, dpy, win) == 0) {
345 return val;
382 int val; local
388 val = DgaWgUngrab(pWin, NEW);
390 if (val) {
394 return val;
1069 int val; local
1123 int val; local
[all...]
/solaris-x11-s12/open-src/kernel/mdb/modules/
H A Di915.c662 i915_read(struct drm_i915_private *dev_priv, uintptr_t addr, uint32_t *val) argument
674 if (mdb_pread(val, sizeof (uint32_t),
698 uint32_t val; local
709 ret = i915_read(dev_priv, addr, &val);
714 mdb_printf("Register [0x%x]: 0x%x\n", addr, val);
746 uint32_t val; local
764 ret = i915_read(dev_priv, (uintptr_t)PGTBL_ER, &val);
766 mdb_printf("PGTBL_ER: 0x%lx\n", val);
768 ret = i915_read(dev_priv, (uintptr_t)INSTPM, &val);
770 mdb_printf("INSTPM: 0x%lx\n", val);
1382 uint32_t val; local
1617 uint32_t val; local
1724 uint32_t val = 0; local
1932 uint32_t val = 0; local
2028 uint32_t val = 0; local
[all...]

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