Searched defs:reg_begin (Results 1 - 4 of 4) sorted by relevance

/illumos-gate/usr/src/uts/sun4/io/px/
H A Dpx_util.c217 uint64_t reg_begin, reg_end, reg_sz; local
221 reg_begin = (uint64_t)px_rp->pci_phys_mid << 32 | px_rp->pci_phys_low;
224 if (reg_begin > PCI_CONF_HDR_SIZE)
228 reg_begin += px_rp->pci_phys_hi << 4;
230 reg_end = reg_begin + reg_sz - 1;
242 if (reg_begin >= rng_begin && reg_end <= rng_end)
248 addr = reg_begin - rng_begin + ((uint64_t)rng_p->parent_high << 32 |
/illumos-gate/usr/src/uts/sun4u/io/pci/
H A Dpci_util.c218 uint32_t reg_end, reg_begin = pci_rp->pci_phys_low; local
224 if (reg_begin > PCI_CONF_HDR_SIZE)
227 reg_begin += pci_rp->pci_phys_hi;
229 reg_end = reg_begin + sz - 1;
240 if (reg_begin >= rng_begin && reg_end <= rng_end)
246 new_rp->regspec_addr = reg_begin - rng_begin + rng_p->parent_low;
/illumos-gate/usr/src/uts/sun4u/opl/io/pcicmu/
H A Dpcmu_util.c195 uint32_t reg_end, reg_begin = pcmu_rp->pci_phys_low; local
201 if (reg_begin > PCI_CONF_HDR_SIZE) {
205 reg_begin += pcmu_rp->pci_phys_hi;
207 reg_end = reg_begin + sz - 1;
219 if (reg_begin >= rng_begin && reg_end <= rng_end) {
227 new_rp->regspec_addr = reg_begin - rng_begin + rng_p->parent_low;
/illumos-gate/usr/src/uts/sun4v/io/niumx/
H A Dniumx.c378 uint32_t reg_begin, rng_begin; local
428 reg_begin = reg_p->addr_low;
430 if (reg_begin < rng_begin || (reg_begin + (reg_p->size_low - 1)) >
438 p_regspec.regspec_addr = reg_begin - rng_begin + rng_p->parent_lo;

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