Searched defs:imr (Results 1 - 7 of 7) sorted by relevance

/vbox/src/VBox/Devices/PC/BIOS/
H A Dbios.c109 uint8_t isrA, isrB, imr, last_int = 0xFF; local
117 imr = inb(PIC_SLAVE_MASK);
118 outb(PIC_SLAVE_MASK, imr | isrB ); // Mask this interrupt
121 imr = inb(PIC_MASTER_MASK);
123 outb(PIC_MASTER_MASK, imr | isrA); // Mask this interrupt
/vbox/src/VBox/Devices/PC/ipxe/src/drivers/net/ath/ath5k/
H A Dath5k_dma.c341 u32 trigger_level, imr; local
347 imr = ath5k_hw_set_imr(ah, ah->ah_imr & ~AR5K_INT_GLOBAL);
374 ath5k_hw_set_imr(ah, imr);
/vbox/src/VBox/Devices/PC/ipxe/src/drivers/net/
H A Dmyson.c562 uint32_t imr; local
564 imr = ( enable ? ( MYSON_IRQ_TI | MYSON_IRQ_RI ) : 0 );
565 writel ( imr, myson->regs + MYSON_IMR );
H A Drealtek.c838 uint16_t imr; local
841 imr = ( enable ? ( RTL_IRQ_PUN_LINKCHG | RTL_IRQ_TER | RTL_IRQ_TOK |
843 writew ( imr, rtl->regs + RTL_IMR );
H A Dsis900.h27 imr=0x14, /* Interrupt Mask Register */ enumerator in enum:sis900_registers
/vbox/src/VBox/Devices/PC/
H A DDevPIC.cpp86 uint8_t imr; /**< interrupt mask register */ member in struct:PICSTATE
156 Log2(("%s: pic%d: elcr=%x last_irr=%x irr=%x imr=%x isr=%x irq_base=%x\n",
158 pPic->elcr, pPic->last_irr, pPic->irr, pPic->imr, pPic->isr, pPic->irq_base));
233 Log(("pic_get_irq%d: mask=%x\n", pPic->idxPic, pPic->irr & ~pPic->imr));
236 mask = pPic->irr & ~pPic->imr;
288 Log(("pic%d: imr=%x irr=%x padd=%d\n", i, pThis->aPics[i].imr, pThis->aPics[i].irr, pThis->aPics[i].priority_add));
336 Log(("pic_update_imr: pic%u %#x -> %#x\n", pPic->idxPic, pPic->imr, val));
337 pPic->imr = val;
341 && ((1 << irq) & ~pActivePIC->imr)
[all...]
/vbox/src/VBox/Devices/Network/lwip-new/src/api/
H A Dsockets.c2310 struct ip_mreq *imr = (struct ip_mreq *)optval; local
2313 inet_addr_to_ipaddr(&if_addr, &imr->imr_interface);
2314 inet_addr_to_ipaddr(&multi_addr, &imr->imr_multiaddr);

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