Searched defs:cfghdl (Results 1 - 3 of 3) sorted by relevance

/illumos-gate/usr/src/uts/sun4v/sys/
H A Dcnex.h94 uint64_t cfghdl; /* cnex config handle */ member in struct:cnex_soft_state
/illumos-gate/usr/src/uts/sun4v/io/
H A Dcnex.c367 rv = hvldc_intr_getvalid(ssp->cfghdl, iinfo->ino, &intr_state);
384 (void) hvldc_intr_settarget(ssp->cfghdl, iinfo->ino, iinfo->cpuid);
390 (void) hvldc_intr_setvalid(ssp->cfghdl, iinfo->ino,
407 rv = hvldc_intr_setvalid(ssp->cfghdl, iinfo->ino, HV_INTR_NOTVALID);
421 rv = hvldc_intr_getstate(ssp->cfghdl, iinfo->ino, &intr_state);
680 D1("cnex_add_intr: add hdlr, cfghdl=0x%llx, ino=0x%llx, "
681 "cookie=0x%llx\n", cnex_ssp->cfghdl, iinfo->ino, iinfo->icookie);
701 rv = hvldc_intr_setcookie(cnex_ssp->cfghdl, iinfo->ino, iinfo->icookie);
707 rv = hvldc_intr_settarget(cnex_ssp->cfghdl, iinfo->ino, iinfo->cpuid);
713 rv = hvldc_intr_setstate(cnex_ssp->cfghdl, iinf
1298 uint64_t cfghdl; local
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/illumos-gate/usr/src/uts/intel/io/mc-amd/
H A Dmcamd_drv.c159 mc_prop_read_pair(mc_pcicfg_hdl_t cfghdl, uint32_t *r1, off_t r1addr, argument
166 r1[i] = mc_pcicfg_get32(cfghdl, r1addr);
168 r2[i] = mc_pcicfg_get32(cfghdl, r2addr);
648 mc_mkprops_htcfg(mc_pcicfg_hdl_t cfghdl, mc_t *mc) argument
655 mc_pcicfg_get32(cfghdl, MC_HT_REG_NODEID);
657 mc->mc_cfgregs.mcr_htunitid = mc_pcicfg_get32(cfghdl, MC_HT_REG_UNITID);
662 mc->mc_cfgregs.mcr_htroute[i] = mc_pcicfg_get32(cfghdl, offset);
678 mc_mkprops_addrmap(mc_pcicfg_hdl_t cfghdl, mc_t *mc) argument
687 mcr->mcr_drambase = MCREG_VAL32(&basereg) = mc_pcicfg_get32(cfghdl,
690 mcr->mcr_dramlimit = MCREG_VAL32(&limreg) = mc_pcicfg_get32(cfghdl,
777 mc_mkprops_dramctl(mc_pcicfg_hdl_t cfghdl, mc_t *mc) argument
1534 mc_pcicfg_hdl_t cfghdl; local
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