Searched defs:cachesize (Results 1 - 8 of 8) sorted by relevance

/illumos-gate/usr/src/cmd/sendmail/db/mp/
H A Dmp_open.c39 size_t cachesize; local
52 cachesize = dbenv == NULL ? 0 : dbenv->mp_size;
72 path, cachesize, mode, is_private, LF_ISSET(DB_CREATE))) != 0)
/illumos-gate/usr/src/cmd/sendmail/db/db/
H A Ddb.c108 size_t cachesize; local
135 * Specifying a cachesize to db_open(3), after creating an
141 "cachesize will be ignored if environment exists");
531 cachesize = dbp->pgsize * DB_MINCACHE;
533 cachesize = dbinfo->db_cachesize;
534 if (cachesize & (dbp->pgsize - 1))
535 cachesize +=
536 (~cachesize & (dbp->pgsize - 1)) + 1;
537 if (cachesize < dbp->pgsize * DB_MINCACHE)
538 cachesize
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/illumos-gate/usr/src/lib/gss_mechs/mech_krb5/include/
H A Ddb.h121 u_int cachesize; /* bytes to cache */ member in struct:__anon2515
140 u_int cachesize; /* bytes to cache */ member in struct:__anon2516
152 u_int cachesize; /* bytes to cache */ member in struct:__anon2517
/illumos-gate/usr/src/lib/libnsl/rpc/
H A Drpcb_clnt.c99 static int cachesize; variable
199 cachesize--;
236 if (cachesize < CACHESIZE) {
239 cachesize++;
/illumos-gate/usr/src/cmd/consadm/
H A Dconsadm.c664 int cachesize = 0; /* size of device cache */ local
701 cachesize++;
705 cachesize++;
709 if ((fds = calloc(cachesize, sizeof (struct pollfd))) == NULL)
712 if ((devpaths = calloc(cachesize, sizeof (char *))) == NULL)
740 if (nfds >= cachesize)
768 if (nfds >= cachesize)
/illumos-gate/usr/src/uts/common/io/afe/
H A Dafe.c316 uint16_t cachesize; local
397 * Grab the PCI cachesize -- we use this to program the
400 cachesize = pci_config_get8(pci, PCI_CLS);
417 afep->afe_cachesize = cachesize;
/illumos-gate/usr/src/uts/common/io/mxfe/
H A Dmxfe.c313 uint16_t cachesize; local
384 * Grab the PCI cachesize -- we use this to program the
387 cachesize = pci_config_get8(pci, PCI_CLS);
405 mxfep->mxfe_cachesize = cachesize;
424 DBG(DPCI, "PCI cachesize = %d", cachesize);
/illumos-gate/usr/src/uts/sun4u/cpu/
H A Dus3_common.c128 static int cpu_ectag_line_invalid(int cachesize, uint64_t tag);
129 int cpu_ectag_pa_to_subblk(int cachesize, uint64_t subaddr);
131 int cpu_ectag_pa_to_subblk_state(int cachesize,
6609 cpu_ectag_pa_to_subblk(int cachesize, uint64_t subaddr) argument
6612 return (JG_ECTAG_PA_TO_SUBBLK(cachesize, subaddr));
6617 return (CH_ECTAG_PA_TO_SUBBLK(cachesize, subaddr));
6625 cpu_ectag_line_invalid(int cachesize, uint64_t tag) argument
6628 return (JG_ECTAG_LINE_INVALID(cachesize, tag));
6632 return (CH_ECTAG_LINE_INVALID(cachesize, tag));
6640 cpu_ectag_pa_to_subblk_state(int cachesize, uint64_ argument
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