Searched defs:cache (Results 76 - 80 of 80) sorted by relevance

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/illumos-gate/usr/src/cmd/zonestat/zonestatd/
H A Dzonestatd.c452 * The usage cache is updated by the stat_thread, and copied to clients by
1678 processorid_t *cache; local
1702 if ((cache = (processorid_t *)realloc(
1706 ctl->zsctl_cpu_cache = cache;
1819 if ((cache = (processorid_t *)realloc(
1823 ctl->zsctl_cpu_cache = cache;
1884 psetid_t *cache; local
1942 if ((cache = (psetid_t *)realloc(ctl->zsctl_pset_cache,
1947 ctl->zsctl_pset_cache = cache;
1973 if ((cache
2382 zoneid_t *cache; local
3697 zs_usage_cache_t *cache; local
3908 zsd_usage_cache_rele(zs_usage_cache_t *cache) argument
4226 zsd_usage_filter(zoneid_t zid, zs_usage_cache_t *cache, zs_usage_t *usage, boolean_t is_gz) argument
4429 zs_usage_cache_t *cache; local
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/illumos-gate/usr/src/uts/common/os/
H A Ddevcfg.c150 * The devinfo snapshot cache and related variables.
188 static kmem_cache_t *ddi_node_cache; /* devinfo node cache */
234 * dev_info cache and node management
237 /* initialize dev_info node cache */
897 * the devid cache (i.e. DEVI_CACHED_DEVID is not set).
899 * from the cache, phci pathinfo paths may have already be
900 * added to the cache, against the client dip, by use of
903 * the cache even if DEVI_CACHED_DEVID is not set - if only
947 * the path enters the cache now that devi_addr is established.
2842 * lookup the "compatible" property and cache i
7911 i_ddi_di_cache_free(struct di_cache *cache) argument
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/illumos-gate/usr/src/uts/common/io/scsi/targets/
H A Dsd.c347 int cache[NTARGETS_WIDE]; local
1833 * effective cache line utilization on certain platforms.
2909 * Description: Initializes the probe response cache mutex and head pointer.
2925 * Description: Frees all resources associated with the probe response cache.
2949 * Description: This routine clears the probe response cache. This is
2954 * entire cache.
2973 cp->cache[i] = SCSIPROBE_EXISTS;
2984 * with cache. The driver maintains a cache of the target
2988 * on the same target until the cache i
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/illumos-gate/usr/src/uts/sfmmu/vm/
H A Dhat_sfmmu.c37 * The hat layer manages the address translation hardware as a cache
332 * kmem_cache, and thus they will be sequential within that cache. In
572 int cache; /* describes system cache */ variable
1144 * Since we only use the tsb8k cache to "borrow" pages for TSBs
1146 * specified, don't use magazines to cache them--we want to return
1229 * typically 8K we have a kmem cache we stack on top of each
2268 * page pointer it can't cache memory.
3158 if (!remap && (cache & CACHE_VAC) && !PP_ISNC(pp)) {
3559 * we just flush the cache an
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/illumos-gate/usr/src/uts/common/sys/fibre-channel/fca/qlc/
H A Dql_api.h1378 * NVRAM cache descriptor.
1384 void *cache; member in struct:nvram_cache_desc

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