Searched defs:Rtmp2 (Results 1 - 3 of 3) sorted by relevance

/openjdk7/hotspot/src/cpu/sparc/vm/
H A DinterpreterRT_sparc.cpp102 Register Rtmp2 = jni_arg.is_register() ? jni_arg.as_register() : O0; local
111 __ add(h_arg.base(), h_arg.disp(), Rtmp2);
113 if (Rtmp1 == Rtmp2)
115 else __ addcc(G0, Rtmp1, Rtmp2); // optimize mov/test pair
118 __ delayed()->add(h_arg.base(), h_arg.disp(), Rtmp2);
121 __ store_ptr_argument(Rtmp2, jni_arg); // this is often a no-op
H A Dinterp_masm_sparc.cpp804 Register Rtmp2,
813 Rtmp1, Rtmp2,
817 Rtmp1, Rtmp2, Rtmp3, /*hack:*/ noreg,
2077 void InterpreterMacroAssembler::increment_invocation_counter( Register Rtmp, Register Rtmp2 ) {
2094 ld( be_counter, Rtmp2 );
2102 and3( Rtmp2, InvocationCounter::count_mask_value, Rtmp2 );
2108 add( Rtmp, Rtmp2, Rtmp);
2113 void InterpreterMacroAssembler::increment_backedge_counter( Register Rtmp, Register Rtmp2 ) {
2129 ld( inv_counter, Rtmp2 );
801 gen_subtype_check(Register Rsub_klass, Register Rsuper_klass, Register Rtmp1, Register Rtmp2, Register Rtmp3, Label &ok_is_subtype ) argument
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H A Dassembler_sparc.cpp4222 Register Rtmp1, Register Rtmp2 /*, Register Rtmp3, Register Rtmp4 */) {
4227 inc_counter(counter_ptr, Rtmp1, Rtmp2);
4231 void MacroAssembler::inc_counter(address counter_addr, Register Rtmp1, Register Rtmp2) { argument
4235 ld(addr, Rtmp2);
4236 inc(Rtmp2);
4237 st(Rtmp2, addr);
4240 void MacroAssembler::inc_counter(int* counter_addr, Register Rtmp1, Register Rtmp2) { argument
4241 inc_counter((address) counter_addr, Rtmp1, Rtmp2);

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