Searched defs:IGU_REG_WRITE_DONE_PENDING (Results 1 - 1 of 1) sorted by relevance

/illumos-gate/usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/
H A D57712_reg.h5342 #define IGU_REG_WRITE_DONE_PENDING 0x130480UL //ACCESS:WB_R DataWidth:0x20 Description: Each bit represent write done pending bits status for that SB (MSI/MSIX message was sent and write done was not received yet). 0 = clear; 1 = set. Data valid only in addresses 0-4. all the rest are zero. macro
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