Searched defs:CPU (Results 1 - 4 of 4) sorted by relevance

/osnet-11/usr/src/lib/libdtrace_jni/java/src/org/opensolaris/os/dtrace/
H A DInterfaceAttributes.java231 * The interface is specific to the CPU model of the current
233 * -v} option to display the current CPU model and
234 * implementation names. Interfaces with CPU model dependencies
235 * might not be available on other CPU implementations, even if
237 * (ISA). For example, a CPU-dependent interface on an
242 CPU("CPU"), enum constant in enum:InterfaceAttributes.DependencyClass
246 * and architectural characteristics such as a set of supported CPU
H A DProbeData.java83 new String[] {"enabledProbeID", "CPU",
125 CPU, enum constant in enum:ProbeData.KeyField
158 * @param cpuID non-negative ID, identifies the CPU on which the
628 case CPU:
676 * Gets the ID of the CPU on which the probe fired.
678 * @return ID of the CPU on which the probe fired
/osnet-11/usr/src/lib/fm/topo/libtopo/common/
H A Dtopo_hc.h48 #define CPU "cpu" macro
/osnet-11/usr/src/lib/libumem/common/
H A Dumem.c52 * * CPU handling
141 * 3. CPU handling
143 * kmem uses the CPU's sequence number to determine which "cpu cache" to
150 * The mechanics of this is all in the CPU(mask) macro.
446 uint32_t umem_max_ncpus; /* # of CPU caches. */
457 size_t umem_failure_log_size; /* failure log [4 pages per CPU] */
458 size_t umem_slab_log_size; /* slab create log [4 pages per CPU] */
507 #define CPU(mask) (umem_cpus + (CPUHINT() & (mask))) macro
572 DEFAULTMUTEX, /* start of CPU cache */
1075 &lhp->lh_cpu[CPU(umem_cpu_mas
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