Lines Matching +refs:val +refs:target
133 static inline void immediate_ldah(void *p, int val) {
135 long high = ((val >> 16) + ((val >> 15) & 1)) & 0xffff;
141 static inline void immediate_lda(void *dest, int val) {
142 *(uint16_t *) dest = val;
154 /* Patch instruction with "val" where "mask" has 1 bits. */
155 static inline void ia64_patch (uint64_t insn_addr, uint64_t mask, uint64_t val)
165 v1 = val << (shift - 64);
168 v0 = val << shift; v1 = val >> (64 - shift);
174 static inline void ia64_patch_imm60 (uint64_t insn_addr, uint64_t val)
178 ( ((val & 0x0800000000000000UL) >> 23) /* bit 59 -> 36 */
179 | ((val & 0x00000000000fffffUL) << 13) /* bit 0 -> 13 */));
180 ia64_patch(insn_addr - 1, 0x1fffffffffcUL, val >> 18);
183 static inline void ia64_imm64 (void *insn, uint64_t val)
192 ( ((val & 0x8000000000000000UL) >> 27) /* bit 63 -> 36 */
193 | ((val & 0x0000000000200000UL) << 0) /* bit 21 -> 21 */
194 | ((val & 0x00000000001f0000UL) << 6) /* bit 16 -> 22 */
195 | ((val & 0x000000000000ff80UL) << 20) /* bit 7 -> 27 */
196 | ((val & 0x000000000000007fUL) << 13) /* bit 0 -> 13 */)
198 ia64_patch(insn_addr + 1, 0x1ffffffffffUL, val >> 22);
201 static inline void ia64_imm60b (void *insn, uint64_t val)
208 if (val + ((uint64_t) 1 << 59) >= (1UL << 60))
210 __FUNCTION__, (int64_t) val);
211 ia64_patch_imm60(insn_addr + 2, val);
214 static inline void ia64_imm22 (void *insn, uint64_t val)
216 if (val + (1 << 21) >= (1 << 22))
218 __FUNCTION__, (int64_t)val);
220 ( ((val & 0x200000UL) << 15) /* bit 21 -> 36 */
221 | ((val & 0x1f0000UL) << 6) /* bit 16 -> 22 */
222 | ((val & 0x00ff80UL) << 20) /* bit 7 -> 27 */
223 | ((val & 0x00007fUL) << 13) /* bit 0 -> 13 */));
229 static inline void ia64_imm22_r0 (void *insn, uint64_t val)
231 if (val + (1 << 21) >= (1 << 22))
233 __FUNCTION__, (int64_t)val);
235 ( ((val & 0x200000UL) << 15) /* bit 21 -> 36 */
236 | ((val & 0x1f0000UL) << 6) /* bit 16 -> 22 */
237 | ((val & 0x00ff80UL) << 20) /* bit 7 -> 27 */
238 | ((val & 0x00007fUL) << 13) /* bit 0 -> 13 */));
241 static inline void ia64_imm21b (void *insn, uint64_t val)
243 if (val + (1 << 20) >= (1 << 21))
245 __FUNCTION__, (int64_t)val);
247 ( ((val & 0x100000UL) << 16) /* bit 20 -> 36 */
248 | ((val & 0x0fffffUL) << 13) /* bit 0 -> 13 */));
256 static inline void ia64_ldxmov(void *insn, uint64_t val)
258 if (val + (1 << 21) < (1 << 22))
262 static inline int ia64_patch_ltoff(void *insn, uint64_t val,
265 if (relaxable && (val + (1 << 21) < (1 << 22))) {
266 ia64_imm22_r0(insn, val);
288 #define IA64_LTOFF(insn, val, relaxable) \
290 if (ia64_patch_ltoff(insn, val, relaxable)) { \
295 fixup->value = (val); \
375 long target;
383 stub->target = TARGET; \
399 * ldil L'target, %r1
400 * be,n R'target(%sr4,%r1)
402 *p++ = 0x20200000 | reassemble_21(lrsel(stub->target, 0));
403 *p++ = 0xe0202002 | (reassemble_17(rrsel(stub->target, 0) >> 2));