Lines Matching defs:rm
2154 int mod, rm, code, override, must_add_seg;
2161 rm = modrm & 7;
2166 base = rm;
2263 if (rm == 6) {
2267 rm = 0; /* avoid SS override */
2282 switch(rm) {
2319 if (rm == 2 || rm == 3 || rm == 6)
2336 int mod, rm, base, code;
2341 rm = modrm & 7;
2345 base = rm;
2369 if (rm == 6) {
2410 int mod, rm, opreg, disp;
2413 rm = (modrm & 7) | REX_B(s);
2418 gen_op_mov_reg_T0(ot, rm);
2420 gen_op_mov_TN_reg(ot, 0, rm);
3278 int modrm, mod, rm, reg, reg_addr, offset_addr;
3413 rm = (modrm & 7);
3415 offsetof(CPUX86State,fpregs[rm].mmx));
3430 rm = (modrm & 7) | REX_B(s);
3432 offsetof(CPUX86State,xmm_regs[rm]));
3445 rm = (modrm & 7) | REX_B(s);
3447 offsetof(CPUX86State,xmm_regs[rm].XMM_L(0)));
3458 rm = (modrm & 7) | REX_B(s);
3460 offsetof(CPUX86State,xmm_regs[rm].XMM_Q(0)));
3470 rm = (modrm & 7) | REX_B(s);
3472 offsetof(CPUX86State,xmm_regs[rm].XMM_Q(1)));
3480 rm = (modrm & 7) | REX_B(s);
3482 offsetof(CPUX86State,xmm_regs[rm].XMM_L(0)));
3484 offsetof(CPUX86State,xmm_regs[rm].XMM_L(2)));
3496 rm = (modrm & 7) | REX_B(s);
3498 offsetof(CPUX86State,xmm_regs[rm].XMM_Q(0)));
3510 rm = (modrm & 7) | REX_B(s);
3512 offsetof(CPUX86State,xmm_regs[rm].XMM_Q(0)));
3520 rm = (modrm & 7) | REX_B(s);
3522 offsetof(CPUX86State,xmm_regs[rm].XMM_L(1)));
3524 offsetof(CPUX86State,xmm_regs[rm].XMM_L(3)));
3583 rm = (modrm & 7) | REX_B(s);
3585 offsetof(CPUX86State,xmm_regs[rm].XMM_Q(0)));
3594 rm = (modrm & 7);
3595 gen_op_movq(offsetof(CPUX86State,fpregs[rm].mmx),
3609 rm = (modrm & 7) | REX_B(s);
3610 gen_op_movo(offsetof(CPUX86State,xmm_regs[rm]),
3620 rm = (modrm & 7) | REX_B(s);
3621 gen_op_movl(offsetof(CPUX86State,xmm_regs[rm].XMM_L(0)),
3630 rm = (modrm & 7) | REX_B(s);
3631 gen_op_movq(offsetof(CPUX86State,xmm_regs[rm].XMM_Q(0)),
3680 rm = (modrm & 7) | REX_B(s);
3681 op2_offset = offsetof(CPUX86State,xmm_regs[rm]);
3683 rm = (modrm & 7);
3684 op2_offset = offsetof(CPUX86State,fpregs[rm].mmx);
3691 rm = (modrm & 7) | REX_B(s);
3693 offsetof(CPUX86State,xmm_regs[rm]));
3699 rm = (modrm & 7) | REX_B(s);
3701 offsetof(CPUX86State,xmm_regs[rm]));
3714 rm = (modrm & 7);
3715 op2_offset = offsetof(CPUX86State,fpregs[rm].mmx);
3754 rm = (modrm & 7) | REX_B(s);
3755 op2_offset = offsetof(CPUX86State,xmm_regs[rm]);
3790 rm = (modrm & 7) | REX_B(s);
3791 op2_offset = offsetof(CPUX86State,xmm_regs[rm]);
3827 rm = (modrm & 7) | REX_B(s);
3829 offsetof(CPUX86State,xmm_regs[rm].XMM_W(val)));
3832 rm = (modrm & 7);
3834 offsetof(CPUX86State,fpregs[rm].mmx.MMX_W(val)));
3844 rm = (modrm & 7) | REX_B(s);
3845 gen_op_movq(offsetof(CPUX86State,xmm_regs[rm].XMM_Q(0)),
3847 gen_op_movq_env_0(offsetof(CPUX86State,xmm_regs[rm].XMM_Q(1)));
3852 rm = (modrm & 7);
3854 offsetof(CPUX86State,fpregs[rm].mmx));
3859 rm = (modrm & 7) | REX_B(s);
3861 offsetof(CPUX86State,xmm_regs[rm].XMM_Q(0)));
3868 rm = (modrm & 7) | REX_B(s);
3869 tcg_gen_addi_ptr(cpu_ptr0, cpu_env, offsetof(CPUX86State,xmm_regs[rm]));
3872 rm = (modrm & 7);
3873 tcg_gen_addi_ptr(cpu_ptr0, cpu_env, offsetof(CPUX86State,fpregs[rm].mmx));
3886 rm = modrm & 7;
3902 op2_offset = offsetof(CPUX86State,xmm_regs[rm | REX_B(s)]);
3937 op2_offset = offsetof(CPUX86State,fpregs[rm].mmx);
3988 rm = modrm & 7;
4003 rm = (modrm & 7) | REX_B(s);
4013 gen_op_mov_reg_T0(ot, rm);
4022 gen_op_mov_reg_T0(ot, rm);
4034 gen_op_mov_reg_v(ot, rm, cpu_T[0]);
4044 gen_op_mov_reg_v(ot, rm, cpu_tmp1_i64);
4057 gen_op_mov_reg_T0(ot, rm);
4064 gen_op_mov_TN_reg(OT_LONG, 0, rm);
4074 offsetof(CPUX86State,xmm_regs[rm]
4104 gen_op_mov_v_reg(ot, cpu_tmp0, rm);
4115 gen_op_mov_v_reg(ot, cpu_tmp1_i64, rm);
4134 op2_offset = offsetof(CPUX86State,xmm_regs[rm | REX_B(s)]);
4143 op2_offset = offsetof(CPUX86State,fpregs[rm].mmx);
4198 rm = (modrm & 7) | REX_B(s);
4199 op2_offset = offsetof(CPUX86State,xmm_regs[rm]);
4208 rm = (modrm & 7);
4209 op2_offset = offsetof(CPUX86State,fpregs[rm].mmx);
4421 int modrm, reg, rm, mod, reg_addr, op, opreg, offset_addr, val;
4603 rm = (modrm & 7) | REX_B(s);
4607 } else if (op == OP_XORL && rm == reg) {
4616 opreg = rm;
4625 rm = (modrm & 7) | REX_B(s);
4629 } else if (op == OP_XORL && rm == reg) {
4632 gen_op_mov_TN_reg(ot, 1, rm);
4661 rm = (modrm & 7) | REX_B(s);
4672 opreg = rm;
4710 rm = (modrm & 7) | REX_B(s);
4718 gen_op_mov_TN_reg(ot, 0, rm);
4733 gen_op_mov_reg_T0(ot, rm);
4741 gen_op_mov_reg_T0(ot, rm);
4942 rm = (modrm & 7) | REX_B(s);
4963 gen_op_mov_TN_reg(ot, 0, rm);
4971 opreg = rm;
4978 opreg = rm;
5189 rm = (modrm & 7) | REX_B(s);
5191 gen_op_mov_TN_reg(ot, 1, rm);
5194 gen_op_mov_reg_T0(ot, rm);
5225 rm = (modrm & 7) | REX_B(s);
5226 gen_op_mov_v_reg(ot, t0, rm);
5231 rm = 0; /* avoid warning */
5242 gen_op_mov_reg_v(ot, rm, t1);
5341 rm = (modrm & 7) | REX_B(s);
5342 gen_op_mov_reg_T0(ot, rm);
5524 rm = (modrm & 7) | REX_B(s);
5527 gen_op_mov_TN_reg(ot, 0, rm);
5661 rm = R_EAX;
5673 rm = (modrm & 7) | REX_B(s);
5676 gen_op_mov_TN_reg(ot, 1, rm);
5677 gen_op_mov_reg_T0(ot, rm);
5799 rm = (modrm & 7) | REX_B(s);
5805 opreg = rm;
5829 rm = modrm & 7;
6039 opreg = rm;
6052 switch(rm) {
6065 switch(rm) {
6085 switch(rm) {
6120 switch(rm) {
6149 switch(rm) {
6207 switch(rm) {
6219 switch(rm) {
6273 switch(rm) {
6289 switch(rm) {
6719 rm = (modrm & 7) | REX_B(s);
6720 gen_op_mov_v_reg(ot, t0, rm);
6872 rm = (modrm & 7) | REX_B(s);
6878 gen_op_mov_TN_reg(ot, 0, rm);
6903 rm = (modrm & 7) | REX_B(s);
6914 gen_op_mov_TN_reg(ot, 0, rm);
6949 gen_op_mov_reg_T0(ot, rm);
7441 rm = modrm & 7;
7458 switch (rm) {
7509 switch(rm) {
7644 switch (rm) {
7708 rm = (modrm & 7) | REX_B(s);
7711 gen_op_mov_TN_reg(OT_LONG, 0, rm);
7740 rm = modrm & 7;
7747 gen_op_mov_v_reg(ot, t0, rm);
7764 gen_op_mov_reg_v(ot, rm, t0);
7837 rm = (modrm & 7) | REX_B(s);
7857 gen_op_mov_TN_reg(ot, 0, rm);
7863 gen_op_mov_reg_T0(ot, rm);
7881 rm = (modrm & 7) | REX_B(s);
7892 gen_op_mov_TN_reg(ot, 0, rm);
7899 gen_op_mov_reg_T0(ot, rm);