Cross Reference: /vbox/src/recompiler/fpu/softfloat.c

Lines Matching defs:rem1
3076     bits64 rem0, rem1;
3124         sub128( aSig, 0, term0, term1, &rem0, &rem1 );
3127             add128( rem0, rem1, 0, bSig, &rem0, &rem1 );
3129         zSig |= ( rem1 != 0 );
3230     bits64 rem0, rem1, term0, term1;
3258         sub128( aSig, 0, term0, term1, &rem0, &rem1 );
3262             add128( rem0, rem1, zSig>>63, doubleZSig | 1, &rem0, &rem1 );
3264         zSig |= ( ( rem0 | rem1 ) != 0 );
4035     bits64 rem0, rem1, rem2, term0, term1, term2;
4076     rem1 = 0;
4078         shift128Right( aSig, 0, 1, &aSig, &rem1 );
4081     zSig0 = estimateDiv128To64( aSig, rem1, bSig );
4083     sub128( aSig, rem1, term0, term1, &rem0, &rem1 );
4086         add128( rem0, rem1, 0, bSig, &rem0, &rem1 );
4088     zSig1 = estimateDiv128To64( rem1, 0, bSig );
4091         sub128( rem1, 0, term1, term2, &rem1, &rem2 );
4092         while ( (sbits64) rem1 < 0 ) {
4094             add128( rem1, rem2, 0, bSig, &rem1, &rem2 );
4096         zSig1 |= ( ( rem1 | rem2 ) != 0 );
4211     bits64 rem0, rem1, rem2, rem3, term0, term1, term2, term3;
4240     sub128( aSig0, aSig1, term0, term1, &rem0, &rem1 );
4244         add128( rem0, rem1, zSig0>>63, doubleZSig0 | 1, &rem0, &rem1 );
4246     zSig1 = estimateDiv128To64( rem1, 0, doubleZSig0 );
4250         sub128( rem1, 0, term1, term2, &rem1, &rem2 );
4252         sub192( rem1, rem2, 0, 0, term2, term3, &rem1, &rem2, &rem3 );
4253         while ( (sbits64) rem1 < 0 ) {
4258             add192( rem1, rem2, rem3, 0, term2, term3, &rem1, &rem2, &rem3 );
4260         zSig1 |= ( ( rem1 | rem2 | rem3 ) != 0 );
5142     bits64 rem0, rem1, rem2, rem3, term0, term1, term2, term3;
5195     sub192( aSig0, aSig1, 0, term0, term1, term2, &rem0, &rem1, &rem2 );
5198         add192( rem0, rem1, rem2, 0, bSig0, bSig1, &rem0, &rem1, &rem2 );
5200     zSig1 = estimateDiv128To64( rem1, rem2, bSig0 );
5203         sub192( rem1, rem2, 0, term1, term2, term3, &rem1, &rem2, &rem3 );
5204         while ( (sbits64) rem1 < 0 ) {
5206             add192( rem1, rem2, rem3, 0, bSig0, bSig1, &rem1, &rem2, &rem3 );
5208         zSig1 |= ( ( rem1 | rem2 | rem3 ) != 0 );
5335     bits64 rem0, rem1, rem2, rem3, term0, term1, term2, term3;
5366     sub128( aSig0, aSig1, term0, term1, &rem0, &rem1 );
5370         add128( rem0, rem1, zSig0>>63, doubleZSig0 | 1, &rem0, &rem1 );
5372     zSig1 = estimateDiv128To64( rem1, 0, doubleZSig0 );
5376         sub128( rem1, 0, term1, term2, &rem1, &rem2 );
5378         sub192( rem1, rem2, 0, 0, term2, term3, &rem1, &rem2, &rem3 );
5379         while ( (sbits64) rem1 < 0 ) {
5384             add192( rem1, rem2, rem3, 0, term2, term3, &rem1, &rem2, &rem3 );
5386         zSig1 |= ( ( rem1 | rem2 | rem3 ) != 0 );