Lines Matching refs:pd
401 PageDesc *pd;
435 pd = *lp;
436 if (pd == NULL) {
440 ALLOC(pd, sizeof(PageDesc) * L2_SIZE);
441 *lp = pd;
446 return pd + (index & (L2_SIZE - 1));
457 PhysPageDesc *pd;
476 pd = *lp;
477 if (pd == NULL) {
484 *lp = pd = qemu_malloc(sizeof(PhysPageDesc) * L2_SIZE);
487 pd[i].phys_offset = IO_MEM_UNASSIGNED;
488 pd[i].region_offset = (index + i) << TARGET_PAGE_BITS;
492 return pd + (index & (L2_SIZE - 1));
759 PageDesc *pd = *lp;
761 pd[i].first_tb = NULL;
762 invalidate_page_bitmap(pd + i);
1524 target_ulong pd;
1531 pd = IO_MEM_UNASSIGNED;
1533 pd = p->phys_offset;
1535 ram_addr = (pd & TARGET_PAGE_MASK) | (pc & ~TARGET_PAGE_MASK);
1924 PhysPageDesc *pd = *lp;
1926 if (pd[i].phys_offset != IO_MEM_UNASSIGNED) {
1927 client->set_memory(client, pd[i].region_offset,
1928 TARGET_PAGE_SIZE, pd[i].phys_offset);
2387 ram_addr_t pd;
2405 pd = IO_MEM_UNASSIGNED;
2407 pd = p->phys_offset;
2410 printf("tlb_set_page: vaddr=" TARGET_FMT_lx " paddr=0x%08x prot=%x idx=%d size=" TARGET_FMT_lx " pd=0x%08lx\n",
2411 vaddr, (int)paddr, prot, mmu_idx, size, (long)pd);
2415 if ((pd & ~TARGET_PAGE_MASK) > IO_MEM_ROM && !(pd & IO_MEM_ROMD)) {
2420 addend = pd & TARGET_PAGE_MASK;
2422 addend = (uintptr_t)qemu_get_ram_ptr(pd & TARGET_PAGE_MASK);
2426 addend = (uintptr_t)remR3TlbGCPhys2Ptr(env, pd & TARGET_PAGE_MASK, !!(prot & PAGE_WRITE));
2429 if ((pd & ~TARGET_PAGE_MASK) <= IO_MEM_ROM) {
2431 iotlb = pd & TARGET_PAGE_MASK;
2432 if ((pd & ~TARGET_PAGE_MASK) == IO_MEM_RAM)
2441 We can't use the high bits of pd for this because
2443 iotlb = (pd & ~TARGET_PAGE_MASK);
2459 if ((pd & ~TARGET_PAGE_MASK) <= IO_MEM_ROM)
2465 if ((pd & ~TARGET_PAGE_MASK) <= IO_MEM_ROM)
2507 if ((pd & ~TARGET_PAGE_MASK) == IO_MEM_ROM ||
2508 (pd & IO_MEM_ROMD)) {
2511 } else if ((pd & ~TARGET_PAGE_MASK) == IO_MEM_RAM &&
2512 !cpu_physical_memory_is_dirty(pd)) {
2529 env->phys_addends[mmu_idx][index] = (pd & TARGET_PAGE_MASK)- vaddr;
2588 PageDesc *pd = *lp;
2590 int prot = pd[i].flags;
3810 ram_addr_t pd;
3820 pd = IO_MEM_UNASSIGNED;
3822 pd = p->phys_offset;
3826 if ((pd & ~TARGET_PAGE_MASK) != IO_MEM_RAM) {
3828 io_index = (pd >> IO_MEM_SHIFT) & (IO_MEM_NB_ENTRIES - 1);
3863 addr1 = (pd & TARGET_PAGE_MASK) + (addr & ~TARGET_PAGE_MASK);
3880 if ((pd & ~TARGET_PAGE_MASK) > IO_MEM_ROM &&
3881 !(pd & IO_MEM_ROMD)) {
3884 io_index = (pd >> IO_MEM_SHIFT) & (IO_MEM_NB_ENTRIES - 1);
3918 remR3PhysRead((pd & TARGET_PAGE_MASK) + (addr & ~TARGET_PAGE_MASK), buf, l); NOREF(ptr);
3920 ptr = qemu_get_ram_ptr(pd & TARGET_PAGE_MASK) +
3941 ram_addr_t pd;
3951 pd = IO_MEM_UNASSIGNED;
3953 pd = p->phys_offset;
3956 if ((pd & ~TARGET_PAGE_MASK) != IO_MEM_RAM &&
3957 (pd & ~TARGET_PAGE_MASK) != IO_MEM_ROM &&
3958 !(pd & IO_MEM_ROMD)) {
3962 addr1 = (pd & TARGET_PAGE_MASK) + (addr & ~TARGET_PAGE_MASK);
4036 ram_addr_t pd;
4047 pd = IO_MEM_UNASSIGNED;
4049 pd = p->phys_offset;
4052 if ((pd & ~TARGET_PAGE_MASK) != IO_MEM_RAM) {
4064 addr1 = (pd & TARGET_PAGE_MASK) + (addr & ~TARGET_PAGE_MASK);
4125 ram_addr_t pd;
4130 pd = IO_MEM_UNASSIGNED;
4132 pd = p->phys_offset;
4135 if ((pd & ~TARGET_PAGE_MASK) > IO_MEM_ROM &&
4136 !(pd & IO_MEM_ROMD)) {
4138 io_index = (pd >> IO_MEM_SHIFT) & (IO_MEM_NB_ENTRIES - 1);
4145 ptr = qemu_get_ram_ptr(pd & TARGET_PAGE_MASK) +
4149 val = remR3PhysReadU32((pd & TARGET_PAGE_MASK) + (addr & ~TARGET_PAGE_MASK)); NOREF(ptr);
4161 ram_addr_t pd;
4166 pd = IO_MEM_UNASSIGNED;
4168 pd = p->phys_offset;
4171 if ((pd & ~TARGET_PAGE_MASK) > IO_MEM_ROM &&
4172 !(pd & IO_MEM_ROMD)) {
4174 io_index = (pd >> IO_MEM_SHIFT) & (IO_MEM_NB_ENTRIES - 1);
4187 ptr = qemu_get_ram_ptr(pd & TARGET_PAGE_MASK) +
4191 val = remR3PhysReadU64((pd & TARGET_PAGE_MASK) + (addr & ~TARGET_PAGE_MASK)); NOREF(ptr);
4213 ram_addr_t pd;
4218 pd = IO_MEM_UNASSIGNED;
4220 pd = p->phys_offset;
4223 if ((pd & ~TARGET_PAGE_MASK) > IO_MEM_ROM &&
4224 !(pd & IO_MEM_ROMD)) {
4226 io_index = (pd >> IO_MEM_SHIFT) & (IO_MEM_NB_ENTRIES - 1);
4233 ptr = qemu_get_ram_ptr(pd & TARGET_PAGE_MASK) +
4237 val = remR3PhysReadU16((pd & TARGET_PAGE_MASK) | (addr & ~TARGET_PAGE_MASK));
4250 ram_addr_t pd;
4255 pd = IO_MEM_UNASSIGNED;
4257 pd = p->phys_offset;
4260 if ((pd & ~TARGET_PAGE_MASK) != IO_MEM_RAM) {
4261 io_index = (pd >> IO_MEM_SHIFT) & (IO_MEM_NB_ENTRIES - 1);
4267 ram_addr_t addr1 = (pd & TARGET_PAGE_MASK) + (addr & ~TARGET_PAGE_MASK);
4271 remR3PhysWriteU32((pd & TARGET_PAGE_MASK) + (addr & ~TARGET_PAGE_MASK), val); NOREF(ptr);
4292 ram_addr_t pd;
4297 pd = IO_MEM_UNASSIGNED;
4299 pd = p->phys_offset;
4302 if ((pd & ~TARGET_PAGE_MASK) != IO_MEM_RAM) {
4303 io_index = (pd >> IO_MEM_SHIFT) & (IO_MEM_NB_ENTRIES - 1);
4315 ptr = qemu_get_ram_ptr(pd & TARGET_PAGE_MASK) +
4319 remR3PhysWriteU64((pd & TARGET_PAGE_MASK) + (addr & ~TARGET_PAGE_MASK), val); NOREF(ptr);
4329 ram_addr_t pd;
4334 pd = IO_MEM_UNASSIGNED;
4336 pd = p->phys_offset;
4339 if ((pd & ~TARGET_PAGE_MASK) != IO_MEM_RAM) {
4340 io_index = (pd >> IO_MEM_SHIFT) & (IO_MEM_NB_ENTRIES - 1);
4346 addr1 = (pd & TARGET_PAGE_MASK) + (addr & ~TARGET_PAGE_MASK);
4352 remR3PhysWriteU32((pd & TARGET_PAGE_MASK) + (addr & ~TARGET_PAGE_MASK), val); NOREF(ptr);
4376 ram_addr_t pd;
4381 pd = IO_MEM_UNASSIGNED;
4383 pd = p->phys_offset;
4386 if ((pd & ~TARGET_PAGE_MASK) != IO_MEM_RAM) {
4387 io_index = (pd >> IO_MEM_SHIFT) & (IO_MEM_NB_ENTRIES - 1);
4393 addr1 = (pd & TARGET_PAGE_MASK) + (addr & ~TARGET_PAGE_MASK);