Lines Matching defs:fSkipMask
264 * @param fSkipMask Mask of bits to skip.
266 static int msrProberModifyBitChanges(uint32_t uMsr, uint64_t *pfIgnMask, uint64_t *pfGpMask, uint64_t fSkipMask)
271 if (fBitMask & fSkipMask)
376 * @param fSkipMask Mask of bits to skip.
383 static int msrProberModifyBasicTests(uint32_t uMsr, uint64_t fSkipMask, bool *pfReadOnly, uint64_t *pfIgnMask, uint64_t *pfGpMask)
390 return msrProberModifyBitChanges(uMsr, pfIgnMask, pfGpMask, fSkipMask);
2983 uint64_t fSkipMask = getGenericSkipMask(uMsr);
2986 rc = msrProberModifyBitChanges(uMsr, &fIgnMask, &fGpMask, fSkipMask);
3067 uint32_t uMsrBase, bool fEarlyEndOk, bool fNoIgnMask, uint64_t fSkipMask, uint32_t *pidxLoop)
3094 int rc = msrProberModifyBasicTests(uMsr, fSkipMask, &fReadOnly0, &fIgnMask0, &fGpMask0);
3103 rc = msrProberModifyBasicTests(paMsrs[i].uMsr, fSkipMask, &fReadOnlyN, &fIgnMaskN, &fGpMaskN);
3160 * @param fSkipMask Mask of bits to skip.
3166 uint64_t fSkipMask, uint64_t fNoGpMask, const char *pszAnnotate)
3179 int rc = msrProberModifyBitChanges(uMsr, &fIgnMask, &fGpMask, fSkipMask);
3252 uint64_t fSkipMask = RT_BIT_64(11);
3254 fSkipMask |= RT_BIT_64(10);
3255 return reportMsr_GenFunctionEx(uMsr, "Ia32ApicBase", uValue, fSkipMask, 0, NULL);
3269 uint64_t fSkipMask = 0;
3286 fSkipMask |= MSR_IA32_MISC_ENABLE_XD_DISABLE;
3290 int rc = msrProberModifyBitChanges(uMsr, &fIgnMask, &fGpMask, fSkipMask);
3382 uint64_t fSkipMask = ~fGpMask;
3384 fSkipBase = fSkipMask = 0;
3386 fSkipMask |= RT_BIT_32(11); /* Always skip the enable bit. */
3388 vbCpuRepDebug("i=%#x fSkipBase=%#llx fSkipMask=%#llx\n", i, fSkipBase, fSkipMask);
3412 rc = msrProberModifyBitChanges(uMsr + i + 1, &fIgnMaskN, &fGpMaskN, fSkipMask);
3415 if ( fIgnMaskN != (fIgnMask & ~fSkipMask)
3416 || fGpMaskN != (fGpMask & ~fSkipMask) )
3418 "MTRR PHYS MASK register %#x behaves differently from %#x: ign=%#llx/%#llx gp=%#llx/%#llx (fSkipMask=%#llx)\n",
3420 fIgnMaskN, fIgnMask & ~fSkipMask, fGpMaskN, fGpMask & ~fSkipMask, fSkipMask);
3570 uint64_t fSkipMask = 0;
3572 fSkipMask |= MSR_K6_EFER_LME;
3575 fSkipMask |= MSR_K6_EFER_NXE;
3582 //fSkipMask |= MSR_K6_EFER_SCE;
3584 // fSkipMask |= MSR_K6_EFER_LMA;
3585 //vbCpuRepDebug("EFER - netburst workaround - ignore SCE & LMA (fSkipMask=%#llx)\n", fSkipMask);
3587 vbCpuRepDebug("EFER - netburst sleep fudge - fSkipMask=%#llx\n", fSkipMask);
3591 return reportMsr_GenFunctionEx(uMsr, NULL, uValue, fSkipMask, MSR_K6_EFER_LMA, NULL);
3727 uint64_t fSkipMask = 0;
3733 fSkipMask |= RT_BIT(21);
3738 fSkipMask |= RT_BIT(22); /* Tom2ForceMemTypeWB */
3740 fSkipMask |= RT_BIT(21); /* MtrrTom2En */
3742 fSkipMask |= RT_BIT(20); /* MtrrVarDramEn*/
3744 fSkipMask |= RT_BIT(19); /* MtrrFixDramModEn */
3746 fSkipMask |= RT_BIT(18); /* MtrrFixDramEn */
3748 fSkipMask |= RT_BIT(17); /* SysUcLockEn */
3750 fSkipMask |= RT_BIT(16); /* ChgToDirtyDis */
3752 fSkipMask |= RT_BIT(10); /* SetDirtyEnO */
3754 fSkipMask |= RT_BIT(9); /* SetDirtyEnS */
3757 fSkipMask |= RT_BIT(8); /* SetDirtyEnE */
3760 fSkipMask |= RT_BIT(7) /* SysVicLimit */
3769 return reportMsr_GenFunctionEx(uMsr, NULL, uValue, fSkipMask, 0, annotateValue(uValue));
3782 uint64_t fSkipMask = 0;
3786 fSkipMask |= /*RT_BIT(10)*/ 0 /* MonMwaitUserEn */
3788 fSkipMask |= RT_BIT(8); /* #IGNNE port emulation */
3791 fSkipMask |= RT_BIT(7) /* DisLock */
3793 fSkipMask |= RT_BIT(4); /* INVD to WBINVD */
3794 fSkipMask |= RT_BIT(3); /* TLBCACHEDIS */
3798 fSkipMask |= RT_BIT(1); /* SLOWFENCE */
3799 fSkipMask |= RT_BIT(0); /* SMMLOCK */
3801 return reportMsr_GenFunctionEx(uMsr, NULL, uValue, fSkipMask, 0, annotateValue(uValue));
3815 uint64_t fSkipMask = RT_BIT(4) | RT_BIT(3);
3816 fSkipMask |= (RT_BIT_64(vbCpuRepGetPhysAddrWidth()) - 1) & X86_PAGE_4K_BASE_MASK;
3817 return reportMsr_GenFunctionEx(uMsr, NULL, (uMsr - 0xc0010016) / 2, fSkipMask, 0, annotateValue(uValue));
3831 uint64_t fSkipMask = RT_BIT(11);
3832 fSkipMask |= (RT_BIT_64(vbCpuRepGetPhysAddrWidth()) - 1) & X86_PAGE_4K_BASE_MASK;
3833 return reportMsr_GenFunctionEx(uMsr, NULL, (uMsr - 0xc0010017) / 2, fSkipMask, 0, annotateValue(uValue));
3847 uint64_t fSkipMask = (RT_BIT_64(vbCpuRepGetPhysAddrWidth()) - 1) & ~(RT_BIT_64(23) - 1);
3848 return reportMsr_GenFunctionEx(uMsr, NULL, uMsr == 0xc001001d, fSkipMask, 0, annotateValue(uValue));
3875 uint64_t fSkipMask = RT_BIT_64(63); /* PstateEn */
3876 fSkipMask |= RT_BIT_64(41) | RT_BIT_64(40); /* IddDiv */
3877 fSkipMask |= UINT64_C(0x000000ff00000000); /* IddValue */
3879 fSkipMask |= UINT32_C(0xfe000000); /* NbVid - Northbridge VID */
3882 fSkipMask |= RT_BIT_32(22); /* NbDid or NbPstate. */
3884 fSkipMask |= RT_BIT_32(16); /* CpuVid[7] */
3885 fSkipMask |= UINT32_C(0x0000fe00); /* CpuVid[6:0] */
3886 fSkipMask |= UINT32_C(0x000001c0); /* CpuDid */
3887 fSkipMask |= UINT32_C(0x0000003f); /* CpuFid */
3895 int rc = msrProberModifyBitChanges(uMsr + i, &fIgnMask, &fGpMask, fSkipMask);
3918 uint64_t fSkipMask = 0;
3920 fSkipMask |= UINT32_C(0xfe000000); /* NbVid - Northbridge VID */
3922 fSkipMask |= UINT32_C(0xff000000); /* NbVid - Northbridge VID - includes bit 24 for Fam15h and Fam16h. Odd... */
3925 fSkipMask |= RT_BIT_32(22); /* NbDid or NbPstate. */
3927 fSkipMask |= RT_BIT_32(20); /* CpuVid[7] */
3928 fSkipMask |= UINT32_C(0x00070000); /* PstatId */
3929 fSkipMask |= UINT32_C(0x0000fe00); /* CpuVid[6:0] */
3930 fSkipMask |= UINT32_C(0x000001c0); /* CpuDid */
3931 fSkipMask |= UINT32_C(0x0000003f); /* CpuFid */
3933 return reportMsr_GenFunctionEx(uMsr, NULL, uValue, fSkipMask, 0, annotateValue(uValue));
3991 uint64_t fSkipMask = RT_BIT_64(9) /* DIS_SPEC_TLB_RLD */;
3993 fSkipMask |= RT_BIT_64(14); /* DIS_IND */
3995 fSkipMask |= RT_BIT_64(26); /* DIS_WIDEREAD_PWR_SAVE */
3998 fSkipMask |= 0x1e; /* DisIcWayFilter */
3999 fSkipMask |= RT_BIT_64(39); /* DisLoopPredictor */
4000 fSkipMask |= RT_BIT_64(27); /* Unknown killer bit, possibly applicable to other microarchs. */
4001 fSkipMask |= RT_BIT_64(28); /* Unknown killer bit, possibly applicable to other microarchs. */
4003 return reportMsr_GenFunctionEx(uMsr, NULL, uValue, fSkipMask, 0, annotateValue(uValue));
4017 uint64_t fSkipMask = RT_BIT_64(23) /* L2WayLock */
4023 fSkipMask |= RT_BIT_64(46) | RT_BIT_64(45); /* Killer field. Seen bit 46 set, 45 clear. Messing with either means reboot/BSOD. */
4024 return reportMsr_GenFunctionEx(uMsr, NULL, uValue, fSkipMask, 0, annotateValue(uValue));
4038 uint64_t fSkipMask = RT_BIT_64(54) /* LateSbzResync */;
4039 fSkipMask |= RT_BIT_64(35); /* Undocumented killer bit. */
4040 return reportMsr_GenFunctionEx(uMsr, NULL, uValue, fSkipMask, 0, annotateValue(uValue));