Lines Matching refs:iMod

537     def writeInstrGregPureRM(self, cbEffOp, iOp1, cAddrBits, iOp2, iMod, offDisp, oGen):
540 if iOp2 == 13 and iMod == 0 and cAddrBits == 64:
543 if (iOp2 == 5 or iOp2 == 13) and iMod == 0:
548 if iMod == 1:
550 elif iMod == 2:
553 assert iMod == 0;
657 def generateMemSetupPureRM(self, oGen, cAddrBits, cbEffOp, iOp2, iMod, uInput, offDisp = None):
660 assert offDisp is None or iMod != 0;
661 if (iOp2 != 5 and iOp2 != 13) or iMod != 0:
721 iMod = 0; # No disp, except for i=5.
723 self.generateMemSetupPureRM(oGen, cAddrBits, cbEffOp, iOp2, iMod, uInput);
724 self.writeInstrGregPureRM(cbEffOp, iOp1, cAddrBits, iOp2, iMod, None, oGen);
729 iMod = 1;
730 for offDisp in oGen.getDispForMod(iMod):
732 self.generateMemSetupPureRM(oGen, cAddrBits, cbEffOp, iOp2, iMod, uInput, offDisp);
733 self.writeInstrGregPureRM(cbEffOp, iOp1, cAddrBits, iOp2, iMod, offDisp, oGen);
737 iMod = 2;
738 for offDisp in oGen.getDispForMod(iMod):
740 self.generateMemSetupPureRM(oGen, cAddrBits, cbEffOp, iOp2, iMod, uInput, offDisp);
741 self.writeInstrGregPureRM(cbEffOp, iOp1, cAddrBits, iOp2, iMod, offDisp, oGen);
747 def generateOneStdTestGregMemSib(self, oGen, cAddrBits, cbEffOp, cbMaxOp, iOp1, iMod, # pylint: disable=R0913
750 for offDisp in oGen.getDispForMod(iMod, cbEffOp):
751 if ((iBaseReg == 5 or iBaseReg == 13) and iMod == 0):
798 for iMod in [0, 1, 2]:
800 and ((oGen.iSibBaseReg != 5 and oGen.iSibBaseReg != 13) or iMod != 0) \
812 self.generateOneStdTestGregMemSib(oGen, cAddrBits, cbEffOp, cbMaxOp, iOp1, iMod,
1621 def getDispForMod(self, iMod, cbAlignment = 1):
1627 if iMod == 0:
1629 elif iMod == 1:
1631 elif iMod == 2: