Cross Reference: /vbox/src/VBox/VMM/include/SELMInline.h

Lines Matching refs:pSReg
28  * @param   pSReg               The segment register.
33 DECLINLINE(bool) selmIsShwDescGoodForSReg(PCCPUMSELREG pSReg, PCX86DESC pShwDesc, uint32_t iSReg, uint32_t uCpl)
82             &&  (   (   (pSReg->Sel & X86_SEL_RPL) > (unsigned)pShwDesc->Gen.u2Dpl - pShwDesc->Gen.u1Available
83                      && (pSReg->Sel & X86_SEL_RPL) != pShwDesc->Gen.u1Available )
87                  pShwDesc->Gen.u2Dpl - pShwDesc->Gen.u1Available, uCpl, pSReg->Sel & X86_SEL_RPL));
102  * @param   pSReg               The segment register.
107 DECLINLINE(bool) selmIsGstDescGoodForSReg(PVMCPU pVCpu, PCCPUMSELREG pSReg, PCX86DESC pGstDesc, uint32_t iSReg, uint32_t uCpl)
156             &&  (   (   (pSReg->Sel & X86_SEL_RPL) > pGstDesc->Gen.u2Dpl
157                      && (   (pSReg->Sel & X86_SEL_RPL) != 1
164                  pGstDesc->Gen.u2Dpl, uCpl, pSReg->Sel & X86_SEL_RPL, CPUMIsGuestInRawMode(pVCpu)));
236  * @param   pSReg               The segment register.
240 DECLINLINE(bool) selmIsSRegStale32(PCCPUMSELREG pSReg, PCX86DESC pShwDesc, uint32_t iSReg)
242     if (   pSReg->Attr.n.u1Present     != pShwDesc->Gen.u1Present
243         || pSReg->Attr.n.u4Type        != pShwDesc->Gen.u4Type
244         || pSReg->Attr.n.u1DescType    != pShwDesc->Gen.u1DescType
245         || pSReg->Attr.n.u1DefBig      != pShwDesc->Gen.u1DefBig
246         || pSReg->Attr.n.u1Granularity != pShwDesc->Gen.u1Granularity
247         || pSReg->Attr.n.u2Dpl         != pShwDesc->Gen.u2Dpl - pShwDesc->Gen.u1Available)
249         Log(("selmIsSRegStale32: Attributes changed (%#x -> %#x)\n", pSReg->Attr.u, X86DESC_GET_HID_ATTR(pShwDesc)));
253     if (pSReg->u64Base != X86DESC_BASE(pShwDesc))
255         Log(("selmIsSRegStale32: base changed (%#llx -> %#x)\n", pSReg->u64Base, X86DESC_BASE(pShwDesc)));
259     if (pSReg->u32Limit != X86DESC_LIMIT_G(pShwDesc))
261         Log(("selmIsSRegStale32: limit changed (%#x -> %#x)\n", pSReg->u32Limit, X86DESC_LIMIT_G(pShwDesc)));
273  * @param   pSReg               The segment register in question.
276 DECLINLINE(void) selmLoadHiddenSRegFromShadowDesc(PCPUMSELREG pSReg, PCX86DESC pShwDesc)
278     pSReg->Attr.u         = X86DESC_GET_HID_ATTR(pShwDesc);
279     pSReg->Attr.n.u2Dpl  -= pSReg->Attr.n.u1Available;
280     Assert(pSReg->Attr.n.u4Type & X86_SEL_TYPE_ACCESSED);
281     pSReg->u32Limit       = X86DESC_LIMIT_G(pShwDesc);
282     pSReg->u64Base        = X86DESC_BASE(pShwDesc);
283     pSReg->ValidSel       = pSReg->Sel;
285     if (pSReg->Attr.n.u1Available)
286         pSReg->ValidSel  &= ~(RTSEL)1;
287     pSReg->fFlags         = CPUMSELREG_FLAGS_VALID;
296  * @param   pSReg               The segment register in question.
299 DECLINLINE(void) selmLoadHiddenSRegFromGuestDesc(PVMCPU pVCpu, PCPUMSELREG pSReg, PCX86DESC pGstDesc)
301     pSReg->Attr.u         = X86DESC_GET_HID_ATTR(pGstDesc);
302     pSReg->Attr.n.u4Type |= X86_SEL_TYPE_ACCESSED;
303     pSReg->u32Limit       = X86DESC_LIMIT_G(pGstDesc);
304     pSReg->u64Base        = X86DESC_BASE(pGstDesc);
305     pSReg->ValidSel       = pSReg->Sel;
307     if ((pSReg->ValidSel & 1) && CPUMIsGuestInRawMode(pVCpu))
308         pSReg->ValidSel  &= ~(RTSEL)1;
309     pSReg->fFlags         = CPUMSELREG_FLAGS_VALID;