Lines Matching refs:pVCpu

224  * @param   pVCpu       Pointer to the VMCPU.
228 DECLINLINE(int) pgmRZDynMapHCPageInlined(PVMCPU pVCpu, RTHCPHYS HCPhys, void **ppv RTLOG_COMMA_SRC_POS_DECL)
230 PPGMMAPSET pSet = &pVCpu->pgm.s.AutoSet;
232 STAM_PROFILE_START(&pVCpu->pgm.s.CTX_SUFF(pStats)->StatRZDynMapHCPageInl, a);
244 STAM_COUNTER_INC(&pVCpu->pgm.s.CTX_SUFF(pStats)->StatRZDynMapHCPageInlHits);
248 STAM_COUNTER_INC(&pVCpu->pgm.s.CTX_SUFF(pStats)->StatRZDynMapHCPageInlMisses);
252 STAM_PROFILE_STOP(&pVCpu->pgm.s.CTX_SUFF(pStats)->StatRZDynMapHCPageInl, a);
263 * @param pVCpu Pointer to the VMCPU.
267 DECLINLINE(int) pgmRZDynMapGCPageV2Inlined(PVM pVM, PVMCPU pVCpu, RTGCPHYS GCPhys, void **ppv RTLOG_COMMA_SRC_POS_DECL)
269 STAM_PROFILE_START(&pVCpu->pgm.s.CTX_SUFF(pStats)->StatRZDynMapGCPageInl, a);
283 STAM_COUNTER_INC(&pVCpu->pgm.s.CTX_SUFF(pStats)->StatRZDynMapGCPageInlRamMisses);
284 return pgmRZDynMapGCPageCommon(pVM, pVCpu, GCPhys, ppv RTLOG_COMMA_SRC_POS_ARGS);
288 STAM_COUNTER_INC(&pVCpu->pgm.s.CTX_SUFF(pStats)->StatRZDynMapGCPageInlRamHits);
293 PPGMMAPSET pSet = &pVCpu->pgm.s.AutoSet;
305 STAM_COUNTER_INC(&pVCpu->pgm.s.CTX_SUFF(pStats)->StatRZDynMapGCPageInlHits);
309 STAM_COUNTER_INC(&pVCpu->pgm.s.CTX_SUFF(pStats)->StatRZDynMapGCPageInlMisses);
313 STAM_PROFILE_STOP(&pVCpu->pgm.s.CTX_SUFF(pStats)->StatRZDynMapGCPageInl, a);
323 * @param pVCpu Pointer to the VMCPU.
327 DECLINLINE(int) pgmRZDynMapGCPageInlined(PVMCPU pVCpu, RTGCPHYS GCPhys, void **ppv RTLOG_COMMA_SRC_POS_DECL)
329 return pgmRZDynMapGCPageV2Inlined(pVCpu->CTX_SUFF(pVM), pVCpu, GCPhys, ppv RTLOG_COMMA_SRC_POS_ARGS);
338 * @param pVCpu Pointer to the VMCPU.
343 DECLINLINE(int) pgmRZDynMapGCPageOffInlined(PVMCPU pVCpu, RTGCPHYS GCPhys, void **ppv RTLOG_COMMA_SRC_POS_DECL)
345 STAM_PROFILE_START(&pVCpu->pgm.s.StatRZDynMapGCPageInl, a);
350 PVM pVM = pVCpu->CTX_SUFF(pVM);
359 STAM_COUNTER_INC(&pVCpu->pgm.s.CTX_SUFF(pStats)->StatRZDynMapGCPageInlRamMisses);
360 return pgmRZDynMapGCPageCommon(pVM, pVCpu, GCPhys, ppv RTLOG_COMMA_SRC_POS_ARGS);
364 STAM_COUNTER_INC(&pVCpu->pgm.s.CTX_SUFF(pStats)->StatRZDynMapGCPageInlRamHits);
369 PPGMMAPSET pSet = &pVCpu->pgm.s.AutoSet;
379 STAM_COUNTER_INC(&pVCpu->pgm.s.CTX_SUFF(pStats)->StatRZDynMapGCPageInlHits);
385 STAM_COUNTER_INC(&pVCpu->pgm.s.CTX_SUFF(pStats)->StatRZDynMapGCPageInlMisses);
390 STAM_PROFILE_STOP(&pVCpu->pgm.s.CTX_SUFF(pStats)->StatRZDynMapGCPageInl, a);
422 * @param pVCpu Pointer to the VMCPU.
425 DECLINLINE(void *) pgmPoolMapPageV2Inlined(PVM pVM, PVMCPU pVCpu, PPGMPOOLPAGE pPage RTLOG_COMMA_SRC_POS_DECL)
431 Assert(pVCpu == VMMGetCpu(pVM));
432 pgmRZDynMapHCPageInlined(pVCpu, pPage->Core.Key, &pv RTLOG_COMMA_SRC_POS_ARGS);
544 * @param pVCpu Pointer to the VMCPU.
546 DECL_FORCE_INLINE(bool) pgmGstIsNoExecuteActive(PVMCPU pVCpu)
548 Assert(pVCpu->pgm.s.fNoExecuteEnabled == CPUMIsGuestNXEnabled(pVCpu));
549 Assert(CPUMIsGuestInPAEMode(pVCpu) || CPUMIsGuestInLongMode(pVCpu));
550 return pVCpu->pgm.s.fNoExecuteEnabled;
561 * @param pVCpu Pointer to the VMCPU.
563 DECL_FORCE_INLINE(bool) pgmGst32BitIsPageSizeExtActive(PVMCPU pVCpu)
565 Assert(pVCpu->pgm.s.fGst32BitPageSizeExtension == CPUMIsGuestPageSizeExtEnabled(pVCpu));
566 Assert(!CPUMIsGuestInPAEMode(pVCpu));
567 Assert(!CPUMIsGuestInLongMode(pVCpu));
568 return pVCpu->pgm.s.fGst32BitPageSizeExtension;
593 * @param pVCpu Pointer to the VMCPU.
596 DECLINLINE(int) pgmGstGet32bitPDPtrEx(PVMCPU pVCpu, PX86PD *ppPd)
599 int rc = pgmRZDynMapGCPageInlined(pVCpu, pVCpu->pgm.s.GCPhysCR3, (void **)ppPd RTLOG_COMMA_SRC_POS);
606 *ppPd = pVCpu->pgm.s.CTX_SUFF(pGst32BitPd);
608 return pgmGstLazyMap32BitPD(pVCpu, ppPd);
618 * @param pVCpu Pointer to the VMCPU.
620 DECLINLINE(PX86PD) pgmGstGet32bitPDPtr(PVMCPU pVCpu)
624 int rc = pgmRZDynMapGCPageInlined(pVCpu, pVCpu->pgm.s.GCPhysCR3, (void **)&pGuestPD RTLOG_COMMA_SRC_POS);
631 PX86PD pGuestPD = pVCpu->pgm.s.CTX_SUFF(pGst32BitPd);
634 int rc = pgmGstLazyMap32BitPD(pVCpu, &pGuestPD);
647 * @param pVCpu Pointer to the VMCPU.
650 DECLINLINE(int) pgmGstGetPaePDPTPtrEx(PVMCPU pVCpu, PX86PDPT *ppPdpt)
653 int rc = pgmRZDynMapGCPageOffInlined(pVCpu, pVCpu->pgm.s.GCPhysCR3, (void **)ppPdpt RTLOG_COMMA_SRC_POS);
660 *ppPdpt = pVCpu->pgm.s.CTX_SUFF(pGstPaePdpt);
662 return pgmGstLazyMapPaePDPT(pVCpu, ppPdpt);
673 * @param pVCpu Pointer to the VMCPU.
675 DECLINLINE(PX86PDPT) pgmGstGetPaePDPTPtr(PVMCPU pVCpu)
678 int rc = pgmGstGetPaePDPTPtrEx(pVCpu, &pGuestPdpt);
689 * @param pVCpu Pointer to the VMCPU.
692 DECLINLINE(PX86PDPE) pgmGstGetPaePDPEPtr(PVMCPU pVCpu, RTGCPTR GCPtr)
698 int rc = pgmRZDynMapGCPageOffInlined(pVCpu, pVCpu->pgm.s.GCPhysCR3, (void **)&pGuestPDPT RTLOG_COMMA_SRC_POS);
701 PX86PDPT pGuestPDPT = pVCpu->pgm.s.CTX_SUFF(pGstPaePdpt);
704 int rc = pgmGstLazyMapPaePDPT(pVCpu, &pGuestPDPT);
718 * @param pVCpu The handle of the virtual CPU.
721 DECLINLINE(X86PDEPAE) pgmGstGetPaePDE(PVMCPU pVCpu, RTGCPTR GCPtr)
724 PX86PDPT pGuestPDPT = pgmGstGetPaePDPTPtr(pVCpu);
729 && !(pGuestPDPT->a[iPdpt].u & pVCpu->pgm.s.fGstPaeMbzPdpeMask) )
734 int rc = pgmRZDynMapGCPageInlined(pVCpu,
742 PX86PDPAE pGuestPD = pVCpu->pgm.s.CTX_SUFF(apGstPaePDs)[iPdpt];
744 || (pGuestPDPT->a[iPdpt].u & X86_PDPE_PG_MASK) != pVCpu->pgm.s.aGCPhysGstPaePDs[iPdpt])
745 pgmGstLazyMapPaePD(pVCpu, iPdpt, &pGuestPD);
763 * @param pVCpu Pointer to the VMCPU.
768 DECLINLINE(PX86PDPAE) pgmGstGetPaePDPtr(PVMCPU pVCpu, RTGCPTR GCPtr, unsigned *piPD, PX86PDPE pPdpe)
773 PX86PDPT pGuestPDPT = pgmGstGetPaePDPTPtr(pVCpu);
781 if (RT_UNLIKELY(pVCpu->pgm.s.fGstPaeMbzPdpeMask & pGuestPDPT->a[iPdpt].u))
787 int rc = pgmRZDynMapGCPageInlined(pVCpu,
797 PX86PDPAE pGuestPD = pVCpu->pgm.s.CTX_SUFF(apGstPaePDs)[iPdpt];
799 || (pGuestPDPT->a[iPdpt].u & X86_PDPE_PG_MASK) != pVCpu->pgm.s.aGCPhysGstPaePDs[iPdpt])
800 pgmGstLazyMapPaePD(pVCpu, iPdpt, &pGuestPD);
813 * @param pVCpu Pointer to the VMCPU.
816 DECLINLINE(int) pgmGstGetLongModePML4PtrEx(PVMCPU pVCpu, PX86PML4 *ppPml4)
819 int rc = pgmRZDynMapGCPageInlined(pVCpu, pVCpu->pgm.s.GCPhysCR3, (void **)ppPml4 RTLOG_COMMA_SRC_POS);
826 *ppPml4 = pVCpu->pgm.s.CTX_SUFF(pGstAmd64Pml4);
828 return pgmGstLazyMapPml4(pVCpu, ppPml4);
838 * @param pVCpu Pointer to the VMCPU.
840 DECLINLINE(PX86PML4) pgmGstGetLongModePML4Ptr(PVMCPU pVCpu)
843 int rc = pgmGstGetLongModePML4PtrEx(pVCpu, &pGuestPml4);
853 * @param pVCpu Pointer to the VMCPU.
857 DECLINLINE(PX86PML4E) pgmGstGetLongModePML4EPtr(PVMCPU pVCpu, unsigned int iPml4)
861 int rc = pgmRZDynMapGCPageInlined(pVCpu, pVCpu->pgm.s.GCPhysCR3, (void **)&pGuestPml4 RTLOG_COMMA_SRC_POS);
864 PX86PML4 pGuestPml4 = pVCpu->pgm.s.CTX_SUFF(pGstAmd64Pml4);
867 int rc = pgmGstLazyMapPml4(pVCpu, &pGuestPml4);
880 * @param pVCpu Pointer to the VMCPU.
883 DECLINLINE(X86PDEPAE) pgmGstGetLongModePDE(PVMCPU pVCpu, RTGCPTR64 GCPtr)
890 PCX86PML4 pGuestPml4 = pgmGstGetLongModePML4Ptr(pVCpu);
894 && !(pGuestPml4->a[iPml4].u & pVCpu->pgm.s.fGstAmd64MbzPml4eMask) )
897 int rc = PGM_GCPHYS_2_PTR_BY_VMCPU(pVCpu, pGuestPml4->a[iPml4].u & X86_PML4E_PG_MASK, &pPdptTemp);
902 && !(pPdptTemp->a[iPdpt].u & pVCpu->pgm.s.fGstAmd64MbzPdpeMask) )
905 rc = PGM_GCPHYS_2_PTR_BY_VMCPU(pVCpu, pPdptTemp->a[iPdpt].u & X86_PDPE_PG_MASK, &pPD);
926 * @param pVCpu Pointer to the VMCPU.
932 DECLINLINE(PX86PDPAE) pgmGstGetLongModePDPtr(PVMCPU pVCpu, RTGCPTR64 GCPtr, PX86PML4E *ppPml4e, PX86PDPE pPdpe, unsigned *piPD)
935 PX86PML4 pGuestPml4 = pgmGstGetLongModePML4Ptr(pVCpu);
942 if (RT_UNLIKELY(pPml4e->u & pVCpu->pgm.s.fGstAmd64MbzPml4eMask))
947 int rc = PGM_GCPHYS_2_PTR_BY_VMCPU(pVCpu, pPml4e->u & X86_PML4E_PG_MASK, &pPdptTemp);
957 if (RT_UNLIKELY(pPdpe->u & pVCpu->pgm.s.fGstAmd64MbzPdpeMask))
962 rc = PGM_GCPHYS_2_PTR_BY_VMCPU(pVCpu, pPdptTemp->a[iPdpt].u & X86_PDPE_PG_MASK, &pPD);
979 * @param pVCpu Pointer to the VMCPU.
981 DECLINLINE(PX86PD) pgmShwGet32BitPDPtr(PVMCPU pVCpu)
983 return (PX86PD)PGMPOOL_PAGE_2_PTR_V2(pVCpu->CTX_SUFF(pVM), pVCpu, pVCpu->pgm.s.CTX_SUFF(pShwPageCR3));
991 * @param pVCpu Pointer to the VMCPU.
994 DECLINLINE(X86PDE) pgmShwGet32BitPDE(PVMCPU pVCpu, RTGCPTR GCPtr)
998 PX86PD pShwPde = pgmShwGet32BitPDPtr(pVCpu);
1013 * @param pVCpu Pointer to the VMCPU.
1016 DECLINLINE(PX86PDE) pgmShwGet32BitPDEPtr(PVMCPU pVCpu, RTGCPTR GCPtr)
1020 PX86PD pPde = pgmShwGet32BitPDPtr(pVCpu);
1030 * @param pVCpu Pointer to the VMCPU.
1032 DECLINLINE(PX86PDPT) pgmShwGetPaePDPTPtr(PVMCPU pVCpu)
1034 return (PX86PDPT)PGMPOOL_PAGE_2_PTR_V2(pVCpu->CTX_SUFF(pVM), pVCpu, pVCpu->pgm.s.CTX_SUFF(pShwPageCR3));
1042 * @param pVCpu Pointer to the VMCPU.
1045 DECLINLINE(PX86PDPAE) pgmShwGetPaePDPtr(PVMCPU pVCpu, RTGCPTR GCPtr)
1048 PX86PDPT pPdpt = pgmShwGetPaePDPTPtr(pVCpu);
1054 PVM pVM = pVCpu->CTX_SUFF(pVM);
1058 return (PX86PDPAE)PGMPOOL_PAGE_2_PTR_V2(pVM, pVCpu, pShwPde);
1066 * @param pVCpu Pointer to the VMCPU.
1069 DECLINLINE(PX86PDPAE) pgmShwGetPaePDPtr(PVMCPU pVCpu, PX86PDPT pPdpt, RTGCPTR GCPtr)
1077 PVM pVM = pVCpu->CTX_SUFF(pVM);
1081 return (PX86PDPAE)PGMPOOL_PAGE_2_PTR_V2(pVM, pVCpu, pShwPde);
1089 * @param pVCpu Pointer to the VMCPU.
1092 DECLINLINE(X86PDEPAE) pgmShwGetPaePDE(PVMCPU pVCpu, RTGCPTR GCPtr)
1096 PX86PDPAE pShwPde = pgmShwGetPaePDPtr(pVCpu, GCPtr);
1110 * @param pVCpu Pointer to the VMCPU.
1114 DECLINLINE(PX86PDEPAE) pgmShwGetPaePDEPtr(PVMCPU pVCpu, RTGCPTR GCPtr)
1118 PX86PDPAE pPde = pgmShwGetPaePDPtr(pVCpu, GCPtr);
1129 * @param pVCpu Pointer to the VMCPU.
1131 DECLINLINE(PX86PML4) pgmShwGetLongModePML4Ptr(PVMCPU pVCpu)
1133 return (PX86PML4)PGMPOOL_PAGE_2_PTR_V2(pVCpu->CTX_SUFF(pVM), pVCpu, pVCpu->pgm.s.CTX_SUFF(pShwPageCR3));
1141 * @param pVCpu Pointer to the VMCPU.
1144 DECLINLINE(X86PML4E) pgmShwGetLongModePML4E(PVMCPU pVCpu, RTGCPTR GCPtr)
1147 PX86PML4 pShwPml4 = pgmShwGetLongModePML4Ptr(pVCpu);
1162 * @param pVCpu Pointer to the VMCPU.
1165 DECLINLINE(PX86PML4E) pgmShwGetLongModePML4EPtr(PVMCPU pVCpu, unsigned int iPml4)
1167 PX86PML4 pShwPml4 = pgmShwGetLongModePML4Ptr(pVCpu);