Cross Reference: /vbox/src/VBox/VMM/VMMRC/SELMRC.cpp

Lines Matching refs:pVCpu
60  * @param   pVCpu       The current virtual CPU.
66 static VBOXSTRICTRC selmRCSyncGDTEntry(PVM pVM, PVMCPU pVCpu, PCPUMCTXCORE pRegFrame, unsigned iGDTEntry)
68     Log2(("GDT %04X LDTR=%04X\n", iGDTEntry, CPUMGetGuestLDTR(pVCpu)));
74     CPUMGetGuestGDTR(pVCpu, &GdtrGuest);
87         rc = PGMPhysSimpleReadGCPtr(pVCpu, &Desc, (uintptr_t)GdtrGuest.pGdt + offEntry, sizeof(X86DESC));
90             VMCPU_FF_SET(pVCpu, VMCPU_FF_SELM_SYNC_GDT);
91             VMCPU_FF_SET(pVCpu, VMCPU_FF_TO_R3); /* paranoia */
114             VMCPU_FF_SET(pVCpu, VMCPU_FF_SELM_SYNC_GDT);
115             VMCPU_FF_SET(pVCpu, VMCPU_FF_TO_R3);
138     PCPUMCTX     pCtx     = CPUMQueryGuestCtxPtr(pVCpu); Assert(CPUMCTX2CORE(pCtx) == pRegFrame);
144             if (CPUMSELREG_ARE_HIDDEN_PARTS_VALID(pVCpu, &paSReg[iSReg]))
150                     VMCPU_FF_SET(pVCpu, VMCPU_FF_TO_R3); /* paranoia */
181  * @param   pVCpu       The current virtual CPU.
185 static void selmRCSyncGDTSegRegs(PVM pVM, PVMCPU pVCpu, PCPUMCTXCORE pRegFrame, unsigned iGDTEntry)
191     CPUMGetGuestGDTR(pVCpu, &GdtrGuest);
201     uint32_t        uCpl     = CPUMGetGuestCPL(pVCpu);
202     PCPUMCTX        pCtx     = CPUMQueryGuestCtxPtr(pVCpu); Assert(CPUMCTX2CORE(pCtx) == pRegFrame);
208             if (!CPUMSELREG_ARE_HIDDEN_PARTS_VALID(pVCpu, &paSReg[iSReg]))
240     PVMCPU pVCpu = VMMGetCpu0(pVM);
248     selmRCSyncGDTSegRegs(pVM, pVCpu, pRegFrame, iGDTE1);
250         selmRCSyncGDTSegRegs(pVM, pVCpu, pRegFrame, iGDTE1 + 1);
256     int rc = EMInterpretInstructionEx(pVCpu, pRegFrame, (RTGCPTR)(RTRCUINTPTR)pvFault, &cb);
262         unsigned const iLdt   = CPUMGetGuestLDTR(pVCpu) >> X86_SEL_SHIFT;
268             VMCPU_FF_SET(pVCpu, VMCPU_FF_SELM_SYNC_GDT);
276             int rc2 = selmRCSyncGDTEntry(pVM, pVCpu, pRegFrame, iGDTE1);
284                     rc2 = selmRCSyncGDTEntry(pVM, pVCpu, pRegFrame, iGDTE2);
309         VMCPU_FF_SET(pVCpu, VMCPU_FF_SELM_SYNC_GDT);
355     PVMCPU pVCpu = VMMGetCpu0(pVM);
362     rc = PGMPrefetchPage(pVCpu, (uintptr_t)pvSrc);
386     PVMCPU pVCpu = VMMGetCpu0(pVM);
394     int rc = EMInterpretInstructionEx(pVCpu, pRegFrame, (RTGCPTR)(RTRCUINTPTR)pvFault, &cb);
462             &&  (CPUMGetGuestCR4(pVCpu) & X86_CR4_VME))
470                     VMCPU_FF_SET(pVCpu, VMCPU_FF_SELM_SYNC_TSS);
471                     VMCPU_FF_SET(pVCpu, VMCPU_FF_TO_R3);
503             VMCPU_FF_SET(pVCpu, VMCPU_FF_SELM_SYNC_TSS);
504             VMCPU_FF_SET(pVCpu, VMCPU_FF_TO_R3);
514         VMCPU_FF_SET(pVCpu, VMCPU_FF_SELM_SYNC_TSS);