Cross Reference: /vbox/src/VBox/VMM/VMMR3/TRPM.cpp

Lines Matching refs:pVCpu
474         PVMCPU pVCpu = &pVM->aCpus[i];
476         pVCpu->trpm.s.offVM         = RT_OFFSETOF(VM, aCpus[i].trpm);
477         pVCpu->trpm.s.offVMCpu      = RT_OFFSETOF(VMCPU, trpm);
478         pVCpu->trpm.s.uActiveVector = ~0U;
594         PVMCPU pVCpu = &pVM->aCpus[0];  /* raw mode implies on VCPU */
595         VMCPU_FF_SET(pVCpu, VMCPU_FF_TRPM_SYNC_IDT);
618     PVMCPU pVCpu = &pVM->aCpus[0];
642     RTSEL SelCS = CPUMGetHyperCS(pVCpu);
689     CPUMSetHyperIDTR(pVCpu, VM_RC_ADDR(pVM, &pVM->trpm.s.aIdt[0]), sizeof(pVM->trpm.s.aIdt)-1);
751  * @param   pVCpu               Pointer to the VMCPU.
753 VMMR3DECL(void) TRPMR3ResetCpu(PVMCPU pVCpu)
755     pVCpu->trpm.s.uActiveVector = ~0U;
800         PVMCPU pVCpu = &pVM->aCpus[0];  /* raw mode implies on VCPU */
801         VMCPU_FF_SET(pVCpu, VMCPU_FF_TRPM_SYNC_IDT);
882     PVMCPU pVCpu = &pVM->aCpus[0];  /* raw mode implies 1 VCPU */
883     SSMR3PutUInt(pSSM,      VM_WHEN_RAW_MODE(VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_TRPM_SYNC_IDT), 0));
986         PVMCPU pVCpu = &pVM->aCpus[0];  /* raw mode implies 1 VCPU */
987         VMCPU_FF_SET(pVCpu, VMCPU_FF_TRPM_SYNC_IDT);
1046  * @param   pVCpu       Pointer to the VMCPU.
1048 VMMR3DECL(int) TRPMR3SyncIDT(PVM pVM, PVMCPU pVCpu)
1072     IDTR.pIdt = CPUMGetGuestIDTR(pVCpu, &IDTR.cbIdt);
1125     rc = PGMPhysSimpleReadGCPtr(pVCpu, &Idte3, IDTR.pIdt + sizeof(Idte3) * 3,  sizeof(Idte3));
1140     VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_TRPM_SYNC_IDT);
1187     PVMCPU pVCpu = &pVM->aCpus[0];
1210     RTSEL               SelCS         = CPUMGetHyperCS(pVCpu);
1300     PVMCPU pVCpu = &pVM->aCpus[0];
1314     RTGCPTR     GCPtrIDT = CPUMGetGuestIDTR(pVCpu, &cbIDT);
1329     int rc = PGMPhysSimpleReadGCPtr(pVCpu, &GuestIdte, GCPtrIDT + iTrap * sizeof(GuestIdte),  sizeof(GuestIdte));
1424     PVMCPU pVCpu = &pVM->aCpus[0];
1430     RTGCPTR     GCPtrIDTE = CPUMGetGuestIDTR(pVCpu, &cbIDT);
1447         int rc = PGMPhysGCPtr2CCPtrReadOnly(pVCpu, GCPtrIDTE, (const void **)&pIDTE, &Lock);
1497  * @param   pVCpu       Pointer to the VMCPU.
1500 VMMR3DECL(int) TRPMR3InjectEvent(PVM pVM, PVMCPU pVCpu, TRPMEVENT enmEvent)
1502     PCPUMCTX pCtx = CPUMQueryGuestCtxPtr(pVCpu);
1506     Assert(!VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_INHIBIT_INTERRUPTS));
1513         && REMR3QueryPendingInterrupt(pVM, pVCpu) == REM_NO_PENDING_IRQ
1521         DBGFR3_DISAS_INSTR_CUR_LOG(pVCpu, "TRPMInject");
1525         int rc = PDMGetInterrupt(pVCpu, &u8Interrupt);
1526         Log(("TRPMR3InjectEvent: CPU%d u8Interrupt=%d (%#x) rc=%Rrc\n", pVCpu->idCpu, u8Interrupt, u8Interrupt, rc));
1533                 rc = TRPMAssertTrap(pVCpu, u8Interrupt, enmEvent);
1536                 return HMR3IsActive(pVCpu) ? VINF_EM_RESCHEDULE_HM : VINF_EM_RESCHEDULE_REM;
1548                 rc = EMR3CheckRawForcedActions(pVM, pVCpu);
1552                     rc = TRPMForwardTrap(pVCpu, CPUMCTX2CORE(pCtx), u8Interrupt, 0, TRPM_TRAP_NO_ERRORCODE, enmEvent, -1);
1555                         Assert(!VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_SELM_SYNC_GDT | VMCPU_FF_SELM_SYNC_LDT | VMCPU_FF_TRPM_SYNC_IDT | VMCPU_FF_SELM_SYNC_TSS));
1565             REMR3NotifyPendingInterrupt(pVM, pVCpu, u8Interrupt);
1571             return HMR3IsActive(pVCpu) ? VINF_EM_RESCHEDULE_HM : VINF_EM_RESCHEDULE_REM; /* (Heed the halted state if this is changed!) */
1575         int rc = PDMGetInterrupt(pVCpu, &u8Interrupt);
1579             rc = TRPMAssertTrap(pVCpu, u8Interrupt, TRPM_HARDWARE_INT);
1582             return HMR3IsActive(pVCpu) ? VINF_EM_RESCHEDULE_HM : VINF_EM_RESCHEDULE_REM;