Lines Matching refs:pVCpu
253 PVMCPU pVCpu = &pVM->aCpus[0]; /* raw mode implies on VCPU */
254 VMCPU_FF_SET(pVCpu, VMCPU_FF_SELM_SYNC_TSS);
255 VMCPU_FF_SET(pVCpu, VMCPU_FF_SELM_SYNC_GDT);
256 VMCPU_FF_SET(pVCpu, VMCPU_FF_SELM_SYNC_LDT);
438 PVMCPU pVCpu = &pVM->aCpus[i];
443 CPUMSetHyperGDTR(pVCpu, MMHyperR3ToRC(pVM, paGdt), SELM_GDT_ELEMENTS * sizeof(paGdt[0]) - 1);
446 CPUMSetHyperCS(pVCpu, pVM->selm.s.aHyperSel[SELM_HYPER_SEL_CS]);
447 CPUMSetHyperDS(pVCpu, pVM->selm.s.aHyperSel[SELM_HYPER_SEL_DS]);
448 CPUMSetHyperES(pVCpu, pVM->selm.s.aHyperSel[SELM_HYPER_SEL_DS]);
449 CPUMSetHyperSS(pVCpu, pVM->selm.s.aHyperSel[SELM_HYPER_SEL_DS]);
450 CPUMSetHyperTR(pVCpu, pVM->selm.s.aHyperSel[SELM_HYPER_SEL_TSS]);
461 PVMCPU pVCpu = &pVM->aCpus[0];
464 pVM->selm.s.Tss.cr3 = PGMGetHyperCR3(pVCpu);
466 pVM->selm.s.Tss.esp0 = VMMGetStackRC(pVCpu);
473 pVM->selm.s.TssTrap08.cr3 = PGMGetInterRCCR3(pVM, pVCpu); /* this should give use better survival chances. */
476 pVM->selm.s.TssTrap08.esp0 = VMMGetStackRC(pVCpu) - PAGE_SIZE / 2; /* upper half can be analysed this way. */
624 PVMCPU pVCpu = &pVM->aCpus[0]; /* raw mode implies on VCPU */
625 VMCPU_FF_SET(pVCpu, VMCPU_FF_SELM_SYNC_TSS);
626 VMCPU_FF_SET(pVCpu, VMCPU_FF_SELM_SYNC_GDT);
627 VMCPU_FF_SET(pVCpu, VMCPU_FF_SELM_SYNC_LDT);
738 PVMCPU pVCpu = VMMGetCpu(pVM);
752 if (PGMGetGuestMode(pVCpu) != PGMMODE_REAL)
754 VMCPU_FF_SET(pVCpu, VMCPU_FF_SELM_SYNC_GDT);
755 VMCPU_FF_SET(pVCpu, VMCPU_FF_SELM_SYNC_LDT);
756 VMCPU_FF_SET(pVCpu, VMCPU_FF_SELM_SYNC_TSS);
757 SELMR3UpdateFromCPUM(pVM, pVCpu);
763 VMCPU_FF_SET(pVCpu, VMCPU_FF_SELM_SYNC_GDT);
764 VMCPU_FF_SET(pVCpu, VMCPU_FF_SELM_SYNC_LDT);
765 VMCPU_FF_SET(pVCpu, VMCPU_FF_SELM_SYNC_TSS);
778 * @param pVCpu The current virtual CPU.
780 static int selmR3UpdateShadowGdt(PVM pVM, PVMCPU pVCpu)
787 VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_SELM_SYNC_GDT);
791 VMCPU_FF_SET(pVCpu, VMCPU_FF_SELM_SYNC_LDT);
793 VMCPU_FF_SET(pVCpu, VMCPU_FF_SELM_SYNC_TSS);
799 CPUMGetGuestGDTR(pVCpu, &GDTR);
812 int rc = PGMPhysSimpleReadGCPtr(pVCpu, pGDTE, GDTR.pGdt + sizeof(X86DESC), cbEffLimit + 1 - sizeof(X86DESC));
833 rc = PGMPhysSimpleReadGCPtr(pVCpu, pu8Dst, GCPtrSrc, cb);
919 if (CPUMGetGuestTR(pVCpu, NULL) != 0)
921 Log(("SELM: Use guest TSS selector %x\n", CPUMGetGuestTR(pVCpu, NULL)));
922 aHyperSel[SELM_HYPER_SEL_TSS] = CPUMGetGuestTR(pVCpu, NULL);
965 || CPUMGetGuestTR(pVCpu, NULL) != 0) /* Our shadow TR entry was overwritten when we synced the guest's GDT. */
1041 * @param pVCpu The current virtual CPU.
1043 static int selmR3UpdateShadowLdt(PVM pVM, PVMCPU pVCpu)
1051 VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_SELM_SYNC_LDT);
1068 RTSEL SelLdt = CPUMGetGuestLDTR(pVCpu);
1072 CPUMSetHyperLDTR(pVCpu, 0);
1105 CPUMSetHyperLDTR(pVCpu, 0);
1164 CPUMSetHyperLDTR(pVCpu, 0);
1201 CPUMSetHyperLDTR(pVCpu, SelLdt);
1221 rc = PGMPhysSimpleReadGCPtr(pVCpu, pShadowLDT, GCPtrLdt, cbChunk);
1276 * @param pVCpu The current virtual CPU.
1278 static VBOXSTRICTRC selmR3UpdateSegmentRegisters(PVM pVM, PVMCPU pVCpu)
1280 Assert(CPUMIsGuestInProtectedMode(pVCpu));
1286 PCPUMCTX pCtx = CPUMQueryGuestCtxPtr(pVCpu);
1294 uint32_t uCpl = CPUMGetGuestCPL(pVCpu);
1321 if (CPUMSELREG_ARE_HIDDEN_PARTS_VALID(pVCpu, &paSReg[iSReg]))
1379 * @param pVCpu Pointer to the VMCPU.
1381 VMMR3DECL(VBOXSTRICTRC) SELMR3UpdateFromCPUM(PVM pVM, PVMCPU pVCpu)
1390 if (VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_SELM_SYNC_GDT))
1392 rc = selmR3UpdateShadowGdt(pVM, pVCpu);
1401 if (VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_SELM_SYNC_TSS))
1403 rc = SELMR3SyncTSS(pVM, pVCpu);
1412 if (VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_SELM_SYNC_LDT))
1414 rc = selmR3UpdateShadowLdt(pVM, pVCpu);
1423 VBOXSTRICTRC rcStrict = selmR3UpdateSegmentRegisters(pVM, pVCpu);
1536 * @param pVCpu Pointer to the VMCPU.
1538 VMMR3DECL(int) SELMR3SyncTSS(PVM pVM, PVMCPU pVCpu)
1541 AssertReturnStmt(!HMIsEnabled(pVM), VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_SELM_SYNC_TSS), VINF_SUCCESS);
1544 Assert(VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_SELM_SYNC_TSS));
1556 RTSEL SelTss = CPUMGetGuestTR(pVCpu, &trHid);
1600 uint32_t cr4 = CPUMGetGuestCR4(pVCpu);
1601 rc = PGMPhysSimpleReadGCPtr(pVCpu, &Tss, GCPtrTss, RT_OFFSETOF(VBOXTSS, IntRedirBitmap));
1623 rc = PGMPhysSimpleReadGCPtr(pVCpu, &pVM->selm.s.Tss.IntRedirBitmap,
1650 rc = PGMGstGetPage(pVCpu, GCPtrTss, NULL, &GCPhys); AssertRC(rc);
1760 VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_SELM_SYNC_TSS);
1777 PVMCPU pVCpu = VMMGetCpu(pVM);
1784 CPUMGetGuestGDTR(pVCpu, &GDTR);
1803 int rc = PGMPhysSimpleReadGCPtr(pVCpu, &GDTEGuest, GCPtrGDTEGuest, sizeof(GDTEGuest));
1832 RTSEL SelLdt = CPUMGetGuestLDTR(pVCpu);
1842 int rc = PGMPhysSimpleReadGCPtr(pVCpu, &LDTDesc, GDTR.pGdt + (SelLdt & X86_SEL_MASK), sizeof(LDTDesc));
1875 rc = PGMPhysSimpleReadGCPtr(pVCpu, &LDTEGuest, GCPtrLDTEGuest, sizeof(LDTEGuest));
1915 PVMCPU pVCpu = VMMGetCpu(pVM);
1917 if (VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_SELM_SYNC_TSS))
1924 RTSEL SelTss = CPUMGetGuestTR(pVCpu, &trHid);
1973 uint32_t cr4 = CPUMGetGuestCR4(pVCpu);
1974 int rc = PGMPhysSimpleReadGCPtr(pVCpu, &Tss, GCPtrTss, RT_OFFSETOF(VBOXTSS, IntRedirBitmap));
1978 && !(CPUMGetGuestEFlags(pVCpu) & X86_EFL_IF)),
1995 rc = PGMPhysSimpleReadGCPtr(pVCpu, &Tss.IntRedirBitmap,
2020 rc = PGMGstGetPage(pVCpu, GCPtrTss, NULL, &GCPhys); AssertRC(rc);
2098 * @param pVCpu Pointer to the VMCPU.
2102 static int selmR3GetSelectorInfo64(PVMCPU pVCpu, RTSEL Sel, PDBGFSELINFO pSelInfo)
2114 CPUMGetGuestGDTR(pVCpu, &Gdtr);
2124 CPUMGetGuestLdtrEx(pVCpu, &GCPtrBase, &cbLimit);
2133 int rc = PGMPhysSimpleReadGCPtr(pVCpu, &Desc, GCPtrDesc, sizeof(Desc));
2136 rc = PGMPhysSimpleReadGCPtr(pVCpu, &Desc, GCPtrDesc, sizeof(X86DESC));
2259 * @param pVCpu Pointer to the VMCPU.
2263 static int selmR3GetSelectorInfo32(PVM pVM, PVMCPU pVCpu, RTSEL Sel, PDBGFSELINFO pSelInfo)
2282 if (CPUMIsGuestInProtectedMode(pVCpu))
2289 else if (CPUMIsGuestInProtectedMode(pVCpu))
2301 CPUMGetGuestGDTR(pVCpu, &Gdtr);
2311 CPUMGetGuestLdtrEx(pVCpu, &GCPtrBase, &cbLimit);
2320 int rc = PGMPhysSimpleReadGCPtr(pVCpu, &Desc, GCPtrDesc, sizeof(Desc));
2366 * @param pVCpu Pointer to the VMCPU.
2370 VMMR3DECL(int) SELMR3GetSelectorInfo(PVM pVM, PVMCPU pVCpu, RTSEL Sel, PDBGFSELINFO pSelInfo)
2373 if (CPUMIsGuestInLongMode(pVCpu))
2374 return selmR3GetSelectorInfo64(pVCpu, Sel, pSelInfo);
2375 return selmR3GetSelectorInfo32(pVM, pVCpu, Sel, pSelInfo);
2597 PVMCPU pVCpu = &pVM->aCpus[0];
2600 CPUMGetGuestGDTR(pVCpu, &GDTR);
2608 int rc = PGMPhysSimpleReadGCPtr(pVCpu, &GDTE, GCPtrGDT, sizeof(GDTE));
2665 PVMCPU pVCpu = &pVM->aCpus[0];
2669 RTSEL SelLdt = CPUMGetGuestLdtrEx(pVCpu, &GCPtrLdt, &cbLdt);
2681 int rc = PGMPhysSimpleReadGCPtr(pVCpu, &LdtE, GCPtrLdt, sizeof(LdtE));