Lines Matching refs:emR3RawExecuteInstruction
62 DECLINLINE(int) emR3RawExecuteInstruction(PVM pVM, PVMCPU pVCpu, const char *pszPrefix, int rcGC = VINF_SUCCESS);
70 #define emR3ExecuteInstruction emR3RawExecuteInstruction
295 Log(("emR3RawExecuteInstruction: In patch block. eip=%RRv\n", (RTRCPTR)pCtx->eip));
306 Log(("emR3RawExecuteInstruction: Executing instruction starting at new address %RGv IF=%d VMIF=%x\n",
317 return emR3RawExecuteInstruction(pVM, pVCpu, "PATCHIR");
322 return emR3RawExecuteInstruction(pVM, pVCpu, "PATCHIRET");
330 Log(("emR3RawExecuteInstruction: Emulate patched instruction at %RGv IF=%d VMIF=%x\n",
333 return emR3RawExecuteInstruction(pVM, pVCpu, "PATCHIR");
339 Log(("emR3RawExecuteInstruction: Disabled patch -> new eip %RGv IF=%d VMIF=%x\n",
348 return emR3RawExecuteInstruction(pVM, pVCpu, "PATCHIR");
423 DECLINLINE(int) emR3RawExecuteInstruction(PVM pVM, PVMCPU pVCpu, const char *pszPrefix, int rcGC)
533 return emR3RawExecuteInstruction(pVM, pVCpu, "IO: ");
646 return emR3RawExecuteInstruction(pVM, pVCpu, "Monitor: ");
668 return emR3RawExecuteInstruction(pVM, pVCpu, "IO Guest Trap: ");
754 return emR3RawExecuteInstruction(pVM, pVCpu, "RSWITCH: ");
890 return emR3RawExecuteInstruction(pVM, pVCpu, "PATCHIR");
905 return emR3RawExecuteInstruction(pVM, pVCpu, "PATCHEMUL: ");
922 return emR3RawExecuteInstruction(pVM, pVCpu, "PATCHIR");
1181 return emR3RawExecuteInstruction(pVM, pVCpu, "PRIV");