Lines Matching refs:pVCpu
89 static VBOXSTRICTRC emR3Debug(PVM pVM, PVMCPU pVCpu, VBOXSTRICTRC rc);
90 static int emR3RemStep(PVM pVM, PVMCPU pVCpu);
91 static int emR3RemExecute(PVM pVM, PVMCPU pVCpu, bool *pfFFDone);
92 int emR3HighPriorityPostForcedActions(PVM pVM, PVMCPU pVCpu, int rc);
170 PVMCPU pVCpu = &pVM->aCpus[i];
172 pVCpu->em.s.enmState = (i == 0) ? EMSTATE_NONE : EMSTATE_WAIT_SIPI;
173 pVCpu->em.s.enmPrevState = EMSTATE_NONE;
174 pVCpu->em.s.fForceRAW = false;
176 pVCpu->em.s.pCtx = CPUMQueryGuestCtxPtr(pVCpu);
180 pVCpu->em.s.pPatmGCState = PATMR3QueryGCStateHC(pVM);
181 AssertMsg(pVCpu->em.s.pPatmGCState, ("PATMR3QueryGCStateHC failed!\n"));
186 pVCpu->em.s.u64TimeSliceStart = 0;
213 pVCpu->em.s.pStatsR3 = pStats;
214 pVCpu->em.s.pStatsR0 = MMHyperR3ToR0(pVM, pStats);
215 pVCpu->em.s.pStatsRC = MMHyperR3ToRC(pVM, pStats);
420 EM_REG_COUNTER(&pVCpu->em.s.StatTotalClis, "/EM/CPU%d/Cli/Total", "Total number of cli instructions executed.");
421 pVCpu->em.s.pCliStatTree = 0;
424 EM_REG_COUNTER(&pVCpu->em.s.StatIOEmu, "/PROF/CPU%d/EM/Emulation/IO", "Profiling of emR3RawExecuteIOInstruction.");
425 EM_REG_COUNTER(&pVCpu->em.s.StatPrivEmu, "/PROF/CPU%d/EM/Emulation/Priv", "Profiling of emR3RawPrivileged.");
426 EM_REG_PROFILE(&pVCpu->em.s.StatHmEntry, "/PROF/CPU%d/EM/HmEnter", "Profiling Hardware Accelerated Mode entry overhead.");
427 EM_REG_PROFILE(&pVCpu->em.s.StatHmExec, "/PROF/CPU%d/EM/HmExec", "Profiling Hardware Accelerated Mode execution.");
428 EM_REG_PROFILE(&pVCpu->em.s.StatIEMEmu, "/PROF/CPU%d/EM/IEMEmuSingle", "Profiling single instruction IEM execution.");
429 EM_REG_PROFILE(&pVCpu->em.s.StatIEMThenREM, "/PROF/CPU%d/EM/IEMThenRem", "Profiling IEM-then-REM instruction execution (by IEM).");
430 EM_REG_PROFILE(&pVCpu->em.s.StatREMEmu, "/PROF/CPU%d/EM/REMEmuSingle", "Profiling single instruction REM execution.");
431 EM_REG_PROFILE(&pVCpu->em.s.StatREMExec, "/PROF/CPU%d/EM/REMExec", "Profiling REM execution.");
432 EM_REG_PROFILE(&pVCpu->em.s.StatREMSync, "/PROF/CPU%d/EM/REMSync", "Profiling REM context syncing.");
433 EM_REG_PROFILE(&pVCpu->em.s.StatRAWEntry, "/PROF/CPU%d/EM/RAWEnter", "Profiling Raw Mode entry overhead.");
434 EM_REG_PROFILE(&pVCpu->em.s.StatRAWExec, "/PROF/CPU%d/EM/RAWExec", "Profiling Raw Mode execution.");
435 EM_REG_PROFILE(&pVCpu->em.s.StatRAWTail, "/PROF/CPU%d/EM/RAWTail", "Profiling Raw Mode tail overhead.");
439 EM_REG_COUNTER(&pVCpu->em.s.StatForcedActions, "/PROF/CPU%d/EM/ForcedActions", "Profiling forced action execution.");
440 EM_REG_COUNTER(&pVCpu->em.s.StatHalted, "/PROF/CPU%d/EM/Halted", "Profiling halted state (VMR3WaitHalted).");
441 EM_REG_PROFILE_ADV(&pVCpu->em.s.StatCapped, "/PROF/CPU%d/EM/Capped", "Profiling capped state (sleep).");
442 EM_REG_COUNTER(&pVCpu->em.s.StatREMTotal, "/PROF/CPU%d/EM/REMTotal", "Profiling emR3RemExecute (excluding FFs).");
443 EM_REG_COUNTER(&pVCpu->em.s.StatRAWTotal, "/PROF/CPU%d/EM/RAWTotal", "Profiling emR3RawExecute (excluding FFs).");
445 EM_REG_PROFILE_ADV(&pVCpu->em.s.StatTotal, "/PROF/CPU%d/EM/Total", "Profiling EMR3ExecuteVM.");
465 PVMCPU pVCpu = &pVM->aCpus[i];
466 if (pVCpu->em.s.pStatsR3)
467 pVCpu->em.s.pStatsRC = MMHyperR3ToRC(pVM, pVCpu->em.s.pStatsR3);
477 * @param pVCpu Pointer to the VMCPU.
479 VMMR3_INT_DECL(void) EMR3ResetCpu(PVMCPU pVCpu)
481 pVCpu->em.s.fForceRAW = false;
486 if (pVCpu->em.s.enmState == EMSTATE_HALTED)
488 Log(("EMR3ResetCpu: Cpu#%u %s -> %s\n", pVCpu->idCpu, emR3GetStateName(pVCpu->em.s.enmState), pVCpu->idCpu == 0 ? "EMSTATE_NONE" : "EMSTATE_WAIT_SIPI"));
489 pVCpu->em.s.enmState = pVCpu->idCpu == 0 ? EMSTATE_NONE : EMSTATE_WAIT_SIPI;
538 PVMCPU pVCpu = &pVM->aCpus[i];
540 int rc = SSMR3PutBool(pSSM, pVCpu->em.s.fForceRAW);
543 Assert(pVCpu->em.s.enmState == EMSTATE_SUSPENDED);
544 Assert(pVCpu->em.s.enmPrevState != EMSTATE_SUSPENDED);
545 rc = SSMR3PutU32(pSSM, pVCpu->em.s.enmPrevState);
549 rc = SSMR3PutU32(pSSM, pVCpu->em.s.MWait.fWait);
551 rc = SSMR3PutGCPtr(pSSM, pVCpu->em.s.MWait.uMWaitRAX);
553 rc = SSMR3PutGCPtr(pSSM, pVCpu->em.s.MWait.uMWaitRCX);
555 rc = SSMR3PutGCPtr(pSSM, pVCpu->em.s.MWait.uMonitorRAX);
557 rc = SSMR3PutGCPtr(pSSM, pVCpu->em.s.MWait.uMonitorRCX);
559 rc = SSMR3PutGCPtr(pSSM, pVCpu->em.s.MWait.uMonitorRDX);
593 PVMCPU pVCpu = &pVM->aCpus[i];
595 int rc = SSMR3GetBool(pSSM, &pVCpu->em.s.fForceRAW);
597 pVCpu->em.s.fForceRAW = false;
602 AssertCompile(sizeof(pVCpu->em.s.enmPrevState) == sizeof(uint32_t));
603 rc = SSMR3GetU32(pSSM, (uint32_t *)&pVCpu->em.s.enmPrevState);
605 Assert(pVCpu->em.s.enmPrevState != EMSTATE_SUSPENDED);
607 pVCpu->em.s.enmState = EMSTATE_SUSPENDED;
612 rc = SSMR3GetU32(pSSM, &pVCpu->em.s.MWait.fWait);
614 rc = SSMR3GetGCPtr(pSSM, &pVCpu->em.s.MWait.uMWaitRAX);
616 rc = SSMR3GetGCPtr(pSSM, &pVCpu->em.s.MWait.uMWaitRCX);
618 rc = SSMR3GetGCPtr(pSSM, &pVCpu->em.s.MWait.uMonitorRAX);
620 rc = SSMR3GetGCPtr(pSSM, &pVCpu->em.s.MWait.uMonitorRCX);
622 rc = SSMR3GetGCPtr(pSSM, &pVCpu->em.s.MWait.uMonitorRDX);
626 Assert(!pVCpu->em.s.pCliStatTree);
645 static DECLCALLBACK(VBOXSTRICTRC) emR3SetExecutionPolicy(PVM pVM, PVMCPU pVCpu, void *pvUser)
650 if (pVCpu->idCpu == 0)
674 return pVCpu->em.s.enmState == EMSTATE_RAW
675 || pVCpu->em.s.enmState == EMSTATE_HM
676 || pVCpu->em.s.enmState == EMSTATE_IEM
677 || pVCpu->em.s.enmState == EMSTATE_REM
678 || pVCpu->em.s.enmState == EMSTATE_IEM_THEN_REM
751 * @param pVCpu Pointer to the VMCPU.
754 VMMR3DECL(void) EMR3FatalError(PVMCPU pVCpu, int rc)
756 pVCpu->em.s.enmState = EMSTATE_GURU_MEDITATION;
757 longjmp(pVCpu->em.s.u.FatalLongJump, rc);
800 * @param pVCpu Pointer to the VMCPU.
803 static VBOXSTRICTRC emR3Debug(PVM pVM, PVMCPU pVCpu, VBOXSTRICTRC rc)
819 if ( pVCpu->em.s.enmState == EMSTATE_DEBUG_GUEST_RAW
820 || pVCpu->em.s.enmState == EMSTATE_DEBUG_HYPER
821 || pVCpu->em.s.fForceRAW /* paranoia */)
823 rc = emR3RawStep(pVM, pVCpu);
827 else if (pVCpu->em.s.enmState == EMSTATE_DEBUG_GUEST_HM)
828 rc = EMR3HmSingleInstruction(pVM, pVCpu, 0 /*fFlags*/);
830 else if (pVCpu->em.s.enmState == EMSTATE_DEBUG_GUEST_REM)
831 rc = emR3RemStep(pVM, pVCpu);
835 rc = IEMExecOne(pVCpu); /** @todo add dedicated interface... */
918 if (pVCpu->em.s.enmState == EMSTATE_DEBUG_HYPER)
921 rc = emR3RawResumeHyper(pVM, pVCpu);
996 * @param pVCpu Pointer to the VMCPU.
998 static int emR3RemStep(PVM pVM, PVMCPU pVCpu)
1000 Log3(("emR3RemStep: cs:eip=%04x:%08x\n", CPUMGetGuestCS(pVCpu), CPUMGetGuestEIP(pVCpu)));
1008 int rc = REMR3State(pVM, pVCpu);
1011 rc = REMR3Step(pVM, pVCpu);
1012 REMR3StateBack(pVM, pVCpu);
1017 int rc = VBOXSTRICTRC_TODO(IEMExecOne(pVCpu)); NOREF(pVM);
1020 Log3(("emR3RemStep: returns %Rrc cs:eip=%04x:%08x\n", rc, CPUMGetGuestCS(pVCpu), CPUMGetGuestEIP(pVCpu)));
1031 * @param pVCpu Pointer to the VMCPU.
1033 DECLINLINE(bool) emR3RemExecuteSyncBack(PVM pVM, PVMCPU pVCpu)
1036 STAM_PROFILE_START(&pVCpu->em.s.StatREMSync, a);
1037 REMR3StateBack(pVM, pVCpu);
1038 STAM_PROFILE_STOP(&pVCpu->em.s.StatREMSync, a);
1056 * @param pVCpu Pointer to the VMCPU.
1061 static int emR3RemExecute(PVM pVM, PVMCPU pVCpu, bool *pfFFDone)
1064 PCPUMCTX pCtx = pVCpu->em.s.pCtx;
1065 uint32_t cpl = CPUMGetGuestCPL(pVCpu);
1072 STAM_REL_PROFILE_ADV_START(&pVCpu->em.s.StatREMTotal, a);
1075 AssertMsg( VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_PGM_SYNC_CR3 | VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL)
1076 || !MMHyperIsInsideArea(pVM, CPUMGetGuestEIP(pVCpu)), /** @todo @bugref{1419} - get flat address. */
1077 ("cs:eip=%RX16:%RX32\n", CPUMGetGuestCS(pVCpu), CPUMGetGuestEIP(pVCpu)));
1101 STAM_PROFILE_START(&pVCpu->em.s.StatREMSync, b);
1105 if (pVM->em.s.idLastRemCpu != pVCpu->idCpu)
1108 CPUMSetChangedFlags(pVCpu, CPUM_CHANGED_ALL);
1110 pVM->em.s.idLastRemCpu = pVCpu->idCpu;
1112 rc = REMR3State(pVM, pVCpu);
1114 STAM_PROFILE_STOP(&pVCpu->em.s.StatREMSync, b);
1124 || VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_TIMER | VMCPU_FF_REQUEST))
1135 if (RT_LIKELY(emR3IsExecutionAllowed(pVM, pVCpu)))
1137 STAM_PROFILE_START(&pVCpu->em.s.StatREMExec, c);
1139 rc = REMR3Run(pVM, pVCpu);
1141 rc = VBOXSTRICTRC_TODO(IEMExecLots(pVCpu));
1143 STAM_PROFILE_STOP(&pVCpu->em.s.StatREMExec, c);
1148 STAM_REL_PROFILE_ADV_START(&pVCpu->em.s.StatCapped, u);
1150 STAM_REL_PROFILE_ADV_STOP(&pVCpu->em.s.StatCapped, u);
1159 || VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_HIGH_PRIORITY_POST_MASK))
1162 fInREMState = emR3RemExecuteSyncBack(pVM, pVCpu);
1164 rc = emR3HighPriorityPostForcedActions(pVM, pVCpu, rc);
1193 TMTimerPollVoid(pVM, pVCpu);
1197 || VMCPU_FF_IS_PENDING(pVCpu,
1204 fInREMState = emR3RemExecuteSyncBack(pVM, pVCpu);
1206 STAM_REL_PROFILE_ADV_SUSPEND(&pVCpu->em.s.StatREMTotal, a);
1207 rc = emR3ForcedActions(pVM, pVCpu, rc);
1208 VBOXVMM_EM_FF_ALL_RET(pVCpu, rc);
1209 STAM_REL_PROFILE_ADV_RESUME(&pVCpu->em.s.StatREMTotal, a);
1226 fInREMState = emR3RemExecuteSyncBack(pVM, pVCpu);
1229 STAM_REL_PROFILE_ADV_STOP(&pVCpu->em.s.StatREMTotal, a);
1236 int emR3SingleStepExecRem(PVM pVM, PVMCPU pVCpu, uint32_t cIterations)
1238 EMSTATE enmOldState = pVCpu->em.s.enmState;
1240 pVCpu->em.s.enmState = EMSTATE_DEBUG_GUEST_REM;
1245 DBGFR3PrgStep(pVCpu);
1246 DBGFR3_DISAS_INSTR_CUR_LOG(pVCpu, "RSS");
1247 emR3RemStep(pVM, pVCpu);
1248 if (emR3Reschedule(pVM, pVCpu, pVCpu->em.s.pCtx) != EMSTATE_REM)
1252 CPUMSetGuestEFlags(pVCpu, CPUMGetGuestEFlags(pVCpu) & ~X86_EFL_TF);
1253 pVCpu->em.s.enmState = enmOldState;
1266 * @param pVCpu The cross context CPU structure for the calling EMT.
1269 * @thread EMT(pVCpu)
1271 static VBOXSTRICTRC emR3ExecuteIemThenRem(PVM pVM, PVMCPU pVCpu, bool *pfFFDone)
1273 LogFlow(("emR3ExecuteIemThenRem: %04x:%RGv\n", CPUMGetGuestCS(pVCpu), CPUMGetGuestRIP(pVCpu)));
1279 while (pVCpu->em.s.cIemThenRemInstructions < 1024)
1281 VBOXSTRICTRC rcStrict = IEMExecLots(pVCpu);
1288 pVCpu->em.s.cIemThenRemInstructions++;
1290 VBOXSTRICTRC_VAL(rcStrict), pVCpu->em.s.cIemThenRemInstructions));
1293 pVCpu->em.s.cIemThenRemInstructions++;
1295 EMSTATE enmNewState = emR3Reschedule(pVM, pVCpu, pVCpu->em.s.pCtx);
1299 enmNewState, emR3GetStateName(enmNewState), pVCpu->em.s.cIemThenRemInstructions));
1300 pVCpu->em.s.enmPrevState = pVCpu->em.s.enmState;
1301 pVCpu->em.s.enmState = enmNewState;
1309 || VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_ALL_REM_MASK))
1316 Log(("emR3ExecuteIemThenRem: -> EMSTATE_REM (after %u instructions)\n", pVCpu->em.s.cIemThenRemInstructions));
1317 pVCpu->em.s.enmState = EMSTATE_REM;
1327 * @param pVCpu Pointer to the VMCPU.
1330 EMSTATE emR3Reschedule(PVM pVM, PVMCPU pVCpu, PCPUMCTX pCtx)
1335 if (pVCpu->em.s.fForceRAW)
1341 if (pVCpu->em.s.enmState == EMSTATE_WAIT_SIPI)
1408 CPUMGetGuestCpuId(pVCpu, 1, 0, &u32Dummy, &u32Dummy, &u32Dummy, &u32Features);
1541 /*Assert(PGMPhysIsA20Enabled(pVCpu));*/
1552 * @param pVCpu Pointer to the VMCPU.
1555 int emR3HighPriorityPostForcedActions(PVM pVM, PVMCPU pVCpu, int rc)
1557 VBOXVMM_EM_FF_HIGH(pVCpu, pVM->fGlobalForcedActions, pVCpu->fLocalForcedActions, rc);
1559 if (VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_PDM_CRITSECT))
1560 PDMCritSectBothFF(pVCpu);
1563 if (VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_HM_UPDATE_CR3))
1565 int rc2 = PGMUpdateCR3(pVCpu, CPUMGetGuestCR3(pVCpu));
1568 Assert(!VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_HM_UPDATE_CR3));
1572 if (VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_HM_UPDATE_PAE_PDPES))
1574 if (CPUMIsGuestInPAEMode(pVCpu))
1576 PX86PDPE pPdpes = HMGetPaePdpes(pVCpu);
1579 PGMGstUpdatePaePdpes(pVCpu, pPdpes);
1580 Assert(!VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_HM_UPDATE_PAE_PDPES));
1583 VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_HM_UPDATE_PAE_PDPES);
1587 if (VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_CSAM_PENDING_ACTION))
1588 CSAMR3DoPendingAction(pVM, pVCpu);
1617 * @param pVCpu Pointer to the VMCPU.
1621 int emR3ForcedActions(PVM pVM, PVMCPU pVCpu, int rc)
1623 STAM_REL_PROFILE_START(&pVCpu->em.s.StatForcedActions, a);
1636 VBOXVMM_EM_FF_ALL(pVCpu, pVM->fGlobalForcedActions, pVCpu->fLocalForcedActions, rc);
1642 || (VMCPU_FF_NORMAL_PRIORITY_POST_MASK && VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_NORMAL_PRIORITY_POST_MASK)) )
1649 rc2 = VMMR3EmtRendezvousFF(pVM, pVCpu);
1659 STAM_REL_PROFILE_STOP(&pVCpu->em.s.StatForcedActions, a);
1675 STAM_REL_PROFILE_STOP(&pVCpu->em.s.StatForcedActions, a);
1680 STAM_REL_PROFILE_STOP(&pVCpu->em.s.StatForcedActions, a);
1711 && VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_CSAM_SCAN_PAGE))
1713 PCPUMCTX pCtx = pVCpu->em.s.pCtx;
1719 VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_CSAM_SCAN_PAGE);
1762 rc2 = VMMR3EmtRendezvousFF(pVM, pVCpu);
1772 STAM_REL_PROFILE_STOP(&pVCpu->em.s.StatForcedActions, a);
1786 STAM_REL_PROFILE_STOP(&pVCpu->em.s.StatForcedActions, a);
1798 STAM_REL_PROFILE_STOP(&pVCpu->em.s.StatForcedActions, a);
1829 && VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_NORMAL_PRIORITY_MASK))
1834 if (VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_REQUEST))
1836 rc2 = VMR3ReqProcessU(pVM->pUVM, pVCpu->idCpu, false /*fPriorityOnly*/);
1840 STAM_REL_PROFILE_STOP(&pVCpu->em.s.StatForcedActions, a);
1852 STAM_REL_PROFILE_STOP(&pVCpu->em.s.StatForcedActions, a);
1860 if (VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_UNHALT))
1862 VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_UNHALT);
1881 || VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_HIGH_PRIORITY_PRE_MASK))
1886 if ( VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_TIMER)
1902 if ( VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_INHIBIT_INTERRUPTS)
1905 if (CPUMGetGuestRIP(pVCpu) != EMGetInhibitInterruptsPC(pVCpu))
1907 Log(("Clearing VMCPU_FF_INHIBIT_INTERRUPTS at %RGv - successor %RGv\n", (RTGCPTR)CPUMGetGuestRIP(pVCpu), EMGetInhibitInterruptsPC(pVCpu)));
1908 VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_INHIBIT_INTERRUPTS);
1911 Log(("Leaving VMCPU_FF_INHIBIT_INTERRUPTS set at %RGv\n", (RTGCPTR)CPUMGetGuestRIP(pVCpu)));
1919 && !VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_INHIBIT_INTERRUPTS)
1921 && !TRPMHasTrap(pVCpu) /* an interrupt could already be scheduled for dispatching in the recompiler. */
1925 && (pVCpu->em.s.pCtx->eflags.u32 & X86_EFL_IF)
1927 && !HMR3IsEventPending(pVCpu))
1929 Assert(pVCpu->em.s.enmState != EMSTATE_WAIT_SIPI);
1930 if (VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_INTERRUPT_APIC | VMCPU_FF_INTERRUPT_PIC))
1934 rc2 = TRPMR3InjectEvent(pVM, pVCpu, TRPM_HARDWARE_INT);
1946 else if (REMR3QueryPendingInterrupt(pVM, pVCpu) != REM_NO_PENDING_IRQ)
1948 Log2(("REMR3QueryPendingInterrupt -> %#x\n", REMR3QueryPendingInterrupt(pVM, pVCpu)));
1979 rc2 = VMMR3EmtRendezvousFF(pVM, pVCpu);
1988 STAM_REL_PROFILE_STOP(&pVCpu->em.s.StatForcedActions, a);
2005 STAM_REL_PROFILE_STOP(&pVCpu->em.s.StatForcedActions, a);
2010 STAM_REL_PROFILE_STOP(&pVCpu->em.s.StatForcedActions, a);
2036 TMR3VirtualSyncFF(pVM, pVCpu);
2057 STAM_REL_PROFILE_STOP(&pVCpu->em.s.StatForcedActions, a);
2068 * @param pVCpu Pointer to the VMCPU.
2070 bool emR3IsExecutionAllowed(PVM pVM, PVMCPU pVCpu)
2078 if (pVCpu->em.s.u64TimeSliceStart + EM_TIME_SLICE < u64TimeNow)
2081 pVCpu->em.s.u64TimeSliceStart = u64TimeNow;
2082 pVCpu->em.s.u64TimeSliceStartExec = u64KernelTime + u64UserTime;
2083 pVCpu->em.s.u64TimeSliceExec = 0;
2085 pVCpu->em.s.u64TimeSliceExec = u64KernelTime + u64UserTime - pVCpu->em.s.u64TimeSliceStartExec;
2087 Log2(("emR3IsExecutionAllowed: start=%RX64 startexec=%RX64 exec=%RX64 (cap=%x)\n", pVCpu->em.s.u64TimeSliceStart, pVCpu->em.s.u64TimeSliceStartExec, pVCpu->em.s.u64TimeSliceExec, (EM_TIME_SLICE * pVM->uCpuExecutionCap) / 100));
2088 if (pVCpu->em.s.u64TimeSliceExec >= (EM_TIME_SLICE * pVM->uCpuExecutionCap) / 100)
2110 * @param pVCpu Pointer to the VMCPU.
2112 VMMR3_INT_DECL(int) EMR3ExecuteVM(PVM pVM, PVMCPU pVCpu)
2117 pVCpu->em.s.enmState, emR3GetStateName(pVCpu->em.s.enmState),
2118 pVCpu->em.s.enmPrevState, emR3GetStateName(pVCpu->em.s.enmPrevState),
2119 pVCpu->em.s.fForceRAW));
2121 AssertMsg( pVCpu->em.s.enmState == EMSTATE_NONE
2122 || pVCpu->em.s.enmState == EMSTATE_WAIT_SIPI
2123 || pVCpu->em.s.enmState == EMSTATE_SUSPENDED,
2124 ("%s\n", emR3GetStateName(pVCpu->em.s.enmState)));
2126 int rc = setjmp(pVCpu->em.s.u.FatalLongJump);
2132 TMR3NotifyResume(pVM, pVCpu);
2144 if ( pVCpu->em.s.enmState == EMSTATE_SUSPENDED
2145 && ( pVCpu->em.s.enmPrevState == EMSTATE_WAIT_SIPI
2146 || pVCpu->em.s.enmPrevState == EMSTATE_HALTED))
2147 pVCpu->em.s.enmState = pVCpu->em.s.enmPrevState;
2149 pVCpu->em.s.enmState = emR3Reschedule(pVM, pVCpu, pVCpu->em.s.pCtx);
2150 pVCpu->em.s.cIemThenRemInstructions = 0;
2151 Log(("EMR3ExecuteVM: enmState=%s\n", emR3GetStateName(pVCpu->em.s.enmState)));
2153 STAM_REL_PROFILE_ADV_START(&pVCpu->em.s.StatTotal, x);
2169 || VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_ALL_REM_MASK)))
2171 rc = emR3ForcedActions(pVM, pVCpu, rc);
2172 VBOXVMM_EM_FF_ALL_RET(pVCpu, rc);
2175 && pVCpu->em.s.fForceRAW)
2185 EMSTATE const enmOldState = pVCpu->em.s.enmState;
2199 Assert(!pVM->em.s.fIemExecutesAll || pVCpu->em.s.enmState != EMSTATE_IEM);
2200 pVCpu->em.s.enmState = EMSTATE_RAW;
2208 Assert(!pVM->em.s.fIemExecutesAll || pVCpu->em.s.enmState != EMSTATE_IEM);
2209 Assert(!pVCpu->em.s.fForceRAW);
2210 pVCpu->em.s.enmState = EMSTATE_HM;
2218 Assert(!pVM->em.s.fIemExecutesAll || pVCpu->em.s.enmState != EMSTATE_IEM);
2223 if (pVCpu->em.s.enmState != EMSTATE_IEM_THEN_REM)
2225 pVCpu->em.s.enmState = EMSTATE_IEM_THEN_REM;
2226 pVCpu->em.s.cIemThenRemInstructions = 0;
2232 pVCpu->em.s.enmState = EMSTATE_REM;
2236 Assert(!pVM->em.s.fIemExecutesAll || pVCpu->em.s.enmState != EMSTATE_IEM);
2237 pVCpu->em.s.enmState = EMSTATE_REM;
2247 if ( pVCpu->em.s.enmPrevState == EMSTATE_WAIT_SIPI
2248 || pVCpu->em.s.enmPrevState == EMSTATE_HALTED)
2250 pVCpu->em.s.enmState = pVCpu->em.s.enmPrevState;
2260 EMSTATE enmState = emR3Reschedule(pVM, pVCpu, pVCpu->em.s.pCtx);
2262 if (pVCpu->em.s.enmState != enmState && enmState == EMSTATE_IEM_THEN_REM)
2263 pVCpu->em.s.cIemThenRemInstructions = 0;
2264 pVCpu->em.s.enmState = enmState;
2273 pVCpu->em.s.enmState = EMSTATE_HALTED;
2280 Assert(pVCpu->idCpu != 0);
2282 pVCpu->em.s.enmState = EMSTATE_WAIT_SIPI;
2292 pVCpu->em.s.enmPrevState = enmOldState;
2293 pVCpu->em.s.enmState = EMSTATE_SUSPENDED;
2302 if (pVCpu->idCpu == 0)
2304 EMSTATE enmState = emR3Reschedule(pVM, pVCpu, pVCpu->em.s.pCtx);
2306 if (pVCpu->em.s.enmState != enmState && enmState == EMSTATE_IEM_THEN_REM)
2307 pVCpu->em.s.cIemThenRemInstructions = 0;
2308 pVCpu->em.s.enmState = enmState;
2313 pVCpu->em.s.enmState = EMSTATE_WAIT_SIPI;
2322 pVCpu->em.s.enmState = EMSTATE_TERMINATING;
2324 TMR3NotifySuspend(pVM, pVCpu);
2325 STAM_REL_PROFILE_ADV_STOP(&pVCpu->em.s.StatTotal, x);
2332 pVCpu->em.s.enmState = EMSTATE_TERMINATING;
2335 TMR3NotifySuspend(pVM, pVCpu);
2336 STAM_REL_PROFILE_ADV_STOP(&pVCpu->em.s.StatTotal, x);
2346 pVCpu->em.s.enmPrevState = enmOldState;
2347 pVCpu->em.s.enmState = EMSTATE_SUSPENDED;
2348 TMR3NotifySuspend(pVM, pVCpu);
2349 STAM_REL_PROFILE_ADV_STOP(&pVCpu->em.s.StatTotal, x);
2360 pVCpu->em.s.enmState = EMSTATE_GURU_MEDITATION;
2374 pVCpu->em.s.enmState = EMSTATE_DEBUG_GUEST_RAW;
2379 pVCpu->em.s.enmState = EMSTATE_DEBUG_GUEST_HM;
2384 pVCpu->em.s.enmState = EMSTATE_DEBUG_GUEST_REM;
2389 pVCpu->em.s.enmState = EMSTATE_DEBUG_GUEST_IEM;
2400 pVCpu->em.s.enmState = EMSTATE_DEBUG_HYPER;
2412 PGMR3ResetCpu(pVM, pVCpu);
2413 TRPMR3ResetCpu(pVCpu);
2414 CPUMR3ResetCpu(pVM, pVCpu);
2415 EMR3ResetCpu(pVCpu);
2416 HMR3ResetCpu(pVCpu);
2417 pVCpu->em.s.enmState = emR3Reschedule(pVM, pVCpu, pVCpu->em.s.pCtx);
2418 Log2(("EMR3ExecuteVM: VINF_EM_TRIPLE_FAULT: %d -> %d\n", rc, enmOldState, pVCpu->em.s.enmState));
2424 pVCpu->em.s.enmState = EMSTATE_GURU_MEDITATION;
2441 pVCpu->em.s.enmState = EMSTATE_GURU_MEDITATION;
2448 EMSTATE const enmNewState = pVCpu->em.s.enmState;
2451 VBOXVMM_EM_STATE_CHANGED(pVCpu, enmOldState, enmNewState, rc);
2455 && (pVCpu->em.s.MWait.fWait & EMMWAIT_FLAG_ACTIVE)
2466 pVCpu->em.s.MWait.fWait &= ~(EMMWAIT_FLAG_ACTIVE | EMMWAIT_FLAG_BREAKIRQIF0);
2470 VBOXVMM_EM_STATE_UNCHANGED(pVCpu, enmNewState, rc);
2472 STAM_PROFILE_ADV_STOP(&pVCpu->em.s.StatTotal, x); /* (skip this in release) */
2473 STAM_PROFILE_ADV_START(&pVCpu->em.s.StatTotal, x);
2485 rc = emR3RawExecute(pVM, pVCpu, &fFFDone);
2496 rc = emR3HmExecute(pVM, pVCpu, &fFFDone);
2503 rc = emR3RemExecute(pVM, pVCpu, &fFFDone);
2513 STAM_PROFILE_START(&pVCpu->em.s.StatHmExec, x1);
2514 rc = VBOXSTRICTRC_TODO(EMR3HmSingleInstruction(pVM, pVCpu, EM_ONE_INS_FLAGS_RIP_CHANGE));
2515 STAM_PROFILE_STOP(&pVCpu->em.s.StatHmExec, x1);
2520 rc = VBOXSTRICTRC_TODO(IEMExecLots(pVCpu));
2537 STAM_PROFILE_START(&pVCpu->em.s.StatIEMThenREM, pIemThenRem);
2538 rc = VBOXSTRICTRC_TODO(emR3ExecuteIemThenRem(pVM, pVCpu, &fFFDone));
2539 STAM_PROFILE_STOP(&pVCpu->em.s.StatIEMThenREM, pIemThenRem);
2553 STAM_REL_PROFILE_START(&pVCpu->em.s.StatHalted, y);
2558 if (TRPMHasTrap(pVCpu))
2562 else if ( (pVCpu->em.s.MWait.fWait & (EMMWAIT_FLAG_ACTIVE | EMMWAIT_FLAG_BREAKIRQIF0))
2565 rc = VMR3WaitHalted(pVM, pVCpu, false /*fIgnoreInterrupts*/);
2567 && VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_INTERRUPT_APIC | VMCPU_FF_INTERRUPT_PIC
2576 rc = VMR3WaitHalted(pVM, pVCpu, !(CPUMGetGuestEFlags(pVCpu) & X86_EFL_IF));
2578 && VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_INTERRUPT_NMI | VMCPU_FF_INTERRUPT_SMI | VMCPU_FF_UNHALT))
2585 STAM_REL_PROFILE_STOP(&pVCpu->em.s.StatHalted, y);
2593 TMR3NotifySuspend(pVM, pVCpu);
2594 STAM_REL_PROFILE_ADV_STOP(&pVCpu->em.s.StatTotal, x);
2595 Log(("EMR3ExecuteVM: actually returns %Rrc (state %s / %s)\n", rc, emR3GetStateName(pVCpu->em.s.enmState), emR3GetStateName(enmOldState)));
2605 TMR3NotifySuspend(pVM, pVCpu);
2606 rc = VBOXSTRICTRC_TODO(emR3Debug(pVM, pVCpu, rc));
2607 TMR3NotifyResume(pVM, pVCpu);
2608 Log2(("EMR3ExecuteVM: emR3Debug -> %Rrc (state %d)\n", rc, pVCpu->em.s.enmState));
2616 TMR3NotifySuspend(pVM, pVCpu);
2617 STAM_REL_PROFILE_ADV_STOP(&pVCpu->em.s.StatTotal, x);
2619 rc = VBOXSTRICTRC_TODO(emR3Debug(pVM, pVCpu, rc));
2620 Log2(("EMR3ExecuteVM: emR3Debug -> %Rrc (state %d)\n", rc, pVCpu->em.s.enmState));
2624 pVCpu->em.s.enmState = EMSTATE_TERMINATING;
2628 pVCpu->em.s.enmState = EMSTATE_GURU_MEDITATION;
2629 VMMR3FatalDump(pVM, pVCpu, rc);
2631 Log(("EMR3ExecuteVM: actually returns %Rrc (state %s / %s)\n", rc, emR3GetStateName(pVCpu->em.s.enmState), emR3GetStateName(enmOldState)));
2635 STAM_REL_PROFILE_ADV_START(&pVCpu->em.s.StatTotal, x);
2636 TMR3NotifyResume(pVM, pVCpu);
2645 TMR3NotifySuspend(pVM, pVCpu);
2646 VMMR3FatalDump(pVM, pVCpu, rc);
2647 emR3Debug(pVM, pVCpu, rc);
2648 STAM_REL_PROFILE_ADV_STOP(&pVCpu->em.s.StatTotal, x);
2649 Log(("EMR3ExecuteVM: actually returns %Rrc (state %s / %s)\n", rc, emR3GetStateName(pVCpu->em.s.enmState), emR3GetStateName(enmOldState)));
2659 AssertMsgFailed(("EMR3ExecuteVM: Invalid state %d!\n", pVCpu->em.s.enmState));
2660 pVCpu->em.s.enmState = EMSTATE_GURU_MEDITATION;
2661 TMR3NotifySuspend(pVM, pVCpu);
2662 STAM_REL_PROFILE_ADV_STOP(&pVCpu->em.s.StatTotal, x);
2663 Log(("EMR3ExecuteVM: actually returns %Rrc (state %s / %s)\n", rc, emR3GetStateName(pVCpu->em.s.enmState), emR3GetStateName(enmOldState)));
2673 Log(("EMR3ExecuteVM: returns %Rrc because of longjmp / fatal error; (state %s / %s)\n", rc, emR3GetStateName(pVCpu->em.s.enmState), emR3GetStateName(pVCpu->em.s.enmPrevState)));
2674 TMR3NotifySuspend(pVM, pVCpu);
2675 VMMR3FatalDump(pVM, pVCpu, rc);
2676 emR3Debug(pVM, pVCpu, rc);
2677 STAM_REL_PROFILE_ADV_STOP(&pVCpu->em.s.StatTotal, x);
2693 PVMCPU pVCpu = VMMGetCpu(pVM);
2695 TMR3NotifySuspend(pVM, pVCpu); /* Stop the virtual time. */
2696 pVCpu->em.s.enmPrevState = pVCpu->em.s.enmState;
2697 pVCpu->em.s.enmState = EMSTATE_SUSPENDED;
2708 PVMCPU pVCpu = VMMGetCpu(pVM);
2709 EMSTATE enmCurState = pVCpu->em.s.enmState;
2711 TMR3NotifyResume(pVM, pVCpu); /* Resume the virtual time. */
2712 pVCpu->em.s.enmState = pVCpu->em.s.enmPrevState;
2713 pVCpu->em.s.enmPrevState = enmCurState;