Lines Matching refs:EMSTATE_REM
677 || pVCpu->em.s.enmState == EMSTATE_REM
777 case EMSTATE_REM: return "EMSTATE_REM";
1248 if (emR3Reschedule(pVM, pVCpu, pVCpu->em.s.pCtx) != EMSTATE_REM)
1296 if (enmNewState != EMSTATE_REM && enmNewState != EMSTATE_IEM_THEN_REM)
1316 Log(("emR3ExecuteIemThenRem: -> EMSTATE_REM (after %u instructions)\n", pVCpu->em.s.cIemThenRemInstructions));
1317 pVCpu->em.s.enmState = EMSTATE_REM;
1371 return EMSTATE_REM;
1386 return EMSTATE_REM;
1392 return EMSTATE_REM;
1401 return EMSTATE_REM;
1410 return EMSTATE_REM;
1418 return EMSTATE_REM;
1423 return EMSTATE_REM;
1429 return EMSTATE_REM;
1435 return EMSTATE_REM;
1443 return EMSTATE_REM;
1450 return EMSTATE_REM;
1459 return EMSTATE_REM;
1466 return EMSTATE_REM;
1485 return EMSTATE_REM;
1494 return EMSTATE_REM;
1505 return EMSTATE_REM;
1510 return EMSTATE_REM;
1515 return EMSTATE_REM;
1520 return EMSTATE_REM;
1525 return EMSTATE_REM;
1530 return EMSTATE_REM;
1537 return EMSTATE_REM;
2231 Log2(("EMR3ExecuteVM: VINF_EM_RESCHEDULE_REM: %d -> %d (EMSTATE_REM)\n", enmOldState, EMSTATE_REM));
2232 pVCpu->em.s.enmState = EMSTATE_REM;
2235 Log2(("EMR3ExecuteVM: VINF_EM_RESCHEDULE_REM: %d -> %d (EMSTATE_REM)\n", enmOldState, EMSTATE_REM));
2237 pVCpu->em.s.enmState = EMSTATE_REM;
2381 else if (enmOldState == EMSTATE_REM)
2458 || enmNewState == EMSTATE_REM
2502 case EMSTATE_REM: