Cross Reference: /vbox/src/VBox/VMM/VMMR3/DBGFDisas.cpp

Lines Matching refs:pState
107  * @param   pState      The disas CPU state.
110                                  RTGCPTR GCPtr, uint32_t fFlags, PDBGFDISASSTATE pState)
112     pState->GCPtrSegBase    = pSelInfo->GCPtrBase;
113     pState->GCPtrSegEnd     = pSelInfo->cbLimit + 1 + (RTGCUINTPTR)pSelInfo->GCPtrBase;
114     pState->cbSegLimit      = pSelInfo->cbLimit;
115     pState->enmMode         = enmMode;
116     pState->GCPtrPage       = 0;
117     pState->pvPageR3        = NULL;
118     pState->hDbgAs          = !HMIsEnabled(pVM)
121     pState->pVM             = pVM;
122     pState->pVCpu           = pVCpu;
123     pState->fLocked         = false;
124     pState->f64Bits         = enmMode >= PGMMODE_AMD64 && pSelInfo->u.Raw.Gen.u1Long;
126     pState->fUnpatchedBytes = RT_BOOL(fFlags & DBGF_DISAS_FLAGS_UNPATCHED_BYTES);
127     pState->fPatchedInstr   = false;
136             enmCpuMode   = pState->f64Bits
158                                 &pState->Cpu,
159                                 &pState->Cpu,
163         pState->GCPtrNext = GCPtr + cbInstr;
168     if (pState->fLocked)
170         PGMPhysReleasePageMappingLock(pVM, &pState->PageMapLock);
171         pState->fLocked = false;
182  * @param   pState      The disas CPU state.
184 static int dbgfR3DisasInstrNext(PDBGFDISASSTATE pState)
187     int rc = DISInstr(&pState->Cpu, (void *)pState->GCPtrNext, 0, &cbInstr, NULL);
190         pState->GCPtrNext = GCPtr + cbInstr;
201  * @param   pState      The disas CPU state ++.
203 static void dbgfR3DisasInstrDone(PDBGFDISASSTATE pState)
205     if (pState->fLocked)
207         PGMPhysReleasePageMappingLock(pState->pVM, &pState->PageMapLock);
208         pState->fLocked = false;
221     PDBGFDISASSTATE pState = (PDBGFDISASSTATE)pDis;
224         RTGCUINTPTR GCPtr = pDis->uInstrAddr + offInstr + pState->GCPtrSegBase;
229         if (    !pState->pvPageR3
230             ||  (GCPtr >> PAGE_SHIFT) != (pState->GCPtrPage >> PAGE_SHIFT))
235             pState->GCPtrPage = GCPtr & PAGE_BASE_GC_MASK;
236             if (   !HMIsEnabled(pState->pVM)
237                 && MMHyperIsInsideArea(pState->pVM, pState->GCPtrPage))
239                 pState->pvPageR3 = MMHyperRCToR3(pState->pVM, (RTRCPTR)pState->GCPtrPage);
240                 if (!pState->pvPageR3)
245                 if (pState->fLocked)
246                     PGMPhysReleasePageMappingLock(pState->pVM, &pState->PageMapLock);
248                 if (pState->enmMode <= PGMMODE_PROTECTED)
249                     rc = PGMPhysGCPhys2CCPtrReadOnly(pState->pVM, pState->GCPtrPage, &pState->pvPageR3, &pState->PageMapLock);
251                     rc = PGMPhysGCPtr2CCPtrReadOnly(pState->pVCpu, pState->GCPtrPage, &pState->pvPageR3, &pState->PageMapLock);
252                 pState->fLocked = RT_SUCCESS_NP(rc);
256                 pState->pvPageR3 = NULL;
264         if (!pState->f64Bits && pDis->uInstrAddr + offInstr > pState->cbSegLimit)
271         if (!pState->f64Bits)
273             RTGCUINTPTR cbSeg = pState->GCPtrSegEnd - GCPtr;
284         if (pState->fUnpatchedBytes)
287             int rc = PATMR3ReadOrgInstr(pState->pVM, GCPtr, &pDis->abInstr[offInstr], cbRead, &cbRead);
290                 pState->fPatchedInstr = true;
311         memcpy(&pDis->abInstr[offInstr], (char *)pState->pvPageR3 + (GCPtr & PAGE_OFFSET_MASK), cb);
330     PDBGFDISASSTATE pState   = (PDBGFDISASSTATE)pCpu;
342         rc = DBGFR3AddrFromSelInfoOff(pState->pVM->pUVM, &Addr, pSelInfo, uAddress);
344     else if (   pState->Cpu.uCpuMode == DISCPUMODE_64BIT
349         DBGFR3AddrFromFlat(pState->pVM->pUVM, &Addr, uAddress);
358              && PATMIsPatchGCAddr(pState->pVM, pState->Cpu.uInstrAddr)
362         DBGFR3AddrFromFlat(pState->pVM->pUVM, &Addr, uAddress);
378         rc = DBGFR3AsSymbolByAddr(pState->pVM->pUVM, pState->hDbgAs, &Addr, RTDBGSYMADDR_FLAGS_LESS_OR_EQUAL,