Cross Reference: /vbox/src/VBox/VMM/VMMR3/CPUMR3CpuId.cpp

Lines Matching refs:aRawStd
3968     CPUMCPUID   aRawStd[16];
3969     for (unsigned i = 0; i < RT_ELEMENTS(aRawStd); i++)
3970         ASMCpuIdExSlow(i, 0, 0, 0, &aRawStd[i].uEax, &aRawStd[i].uEbx, &aRawStd[i].uEcx, &aRawStd[i].uEdx);
3971     SSMR3PutU32(pSSM, RT_ELEMENTS(aRawStd));
3972     SSMR3PutMem(pSSM, &aRawStd[0], sizeof(aRawStd));
4159     CPUMCPUID   aRawStd[16];
4162     if (cRawStd > RT_ELEMENTS(aRawStd))
4164     rc = SSMR3GetMem(pSSM, &aRawStd[0], cRawStd * sizeof(aRawStd[0]));
4166     for (uint32_t i = cRawStd; i < RT_ELEMENTS(aRawStd); i++)
4167         ASMCpuIdExSlow(i, 0, 0, 0, &aRawStd[i].uEax, &aRawStd[i].uEbx, &aRawStd[i].uEcx, &aRawStd[i].uEdx);
4387         CPUID_CHECK_RET(   aHostRawStd[0].uEbx == aRawStd[0].uEbx
4388                         && aHostRawStd[0].uEcx == aRawStd[0].uEcx
4389                         && aHostRawStd[0].uEdx == aRawStd[0].uEdx,
4392                          &aRawStd[0].uEbx, &aRawStd[0].uEdx, &aRawStd[0].uEcx));
4393         CPUID_CHECK2_WRN("Std CPUID max leaf",   aHostRawStd[0].uEax, aRawStd[0].uEax);
4397         bool const fIntel = ASMIsIntelCpuEx(aRawStd[0].uEbx, aRawStd[0].uEcx, aRawStd[0].uEdx);
4400         CPUID_CHECK2_RET("CPU family",          ASMGetCpuFamily(aHostRawStd[1].uEax),        ASMGetCpuFamily(aRawStd[1].uEax));
4401         CPUID_CHECK2_RET("CPU model",           ASMGetCpuModel(aHostRawStd[1].uEax, fIntel), ASMGetCpuModel(aRawStd[1].uEax, fIntel));
4402         CPUID_CHECK2_WRN("CPU type",            (aHostRawStd[1].uEax >> 12) & 3,             (aRawStd[1].uEax >> 12) & 3 );
4405         CPUID_CHECK2_RET("CPU brand ID",         aHostRawStd[1].uEbx & 0xff,                 aRawStd[1].uEbx & 0xff);
4406         CPUID_CHECK2_WRN("CLFLUSH chunk count", (aHostRawStd[1].uEbx >> 8) & 0xff,           (aRawStd[1].uEbx >> 8) & 0xff);
4488         CPUID_CHECK_WRN(   aRawStd[0].uEax     <  UINT32_C(0x0000000d)
4491         if (   aRawStd[0].uEax     >= UINT32_C(0x0000000d)
4494             CPUID_CHECK2_WRN("Valid low XCR0 bits",             aHostRawStd[0xd].uEax, aRawStd[0xd].uEax);
4495             CPUID_CHECK2_WRN("Valid high XCR0 bits",            aHostRawStd[0xd].uEdx, aRawStd[0xd].uEdx);
4496             CPUID_CHECK2_WRN("Current XSAVE/XRSTOR area size",  aHostRawStd[0xd].uEbx, aRawStd[0xd].uEbx);
4498             CPUID_CHECK2_WRN("Max XSAVE/XRSTOR area size",      aHostRawStd[0xd].uEcx, aRawStd[0xd].uEcx);