Cross Reference: /vbox/src/VBox/VMM/VMMR3/CPUMDbg.cpp

Lines Matching refs:pVCpu
41     PVMCPU      pVCpu   = (PVMCPU)pvUser;
42     void const *pv      = (uint8_t const *)&pVCpu->cpum + pDesc->offRegister;
44     VMCPU_ASSERT_EMT(pVCpu);
64     PVMCPU      pVCpu = (PVMCPU)pvUser;
65     void       *pv    = (uint8_t *)&pVCpu->cpum + pDesc->offRegister;
67     VMCPU_ASSERT_EMT(pVCpu);
110     PVMCPU      pVCpu   = (PVMCPU)pvUser;
111     void const *pv      = (uint8_t const *)&pVCpu->cpum.s.Guest.pXStateR3 + pDesc->offRegister;
113     VMCPU_ASSERT_EMT(pVCpu);
133     PVMCPU      pVCpu = (PVMCPU)pvUser;
134     void       *pv    = (uint8_t *)&pVCpu->cpum.s.Guest.pXStateR3 + pDesc->offRegister;
136     VMCPU_ASSERT_EMT(pVCpu);
191     PVMCPU          pVCpu = (PVMCPU)pvUser;
192     VBOXGDTR const *pGdtr = (VBOXGDTR const *)((uint8_t const *)&pVCpu->cpum + pDesc->offRegister);
194     VMCPU_ASSERT_EMT(pVCpu);
218     PVMCPU          pVCpu = (PVMCPU)pvUser;
219     VBOXIDTR const *pIdtr = (VBOXIDTR const *)((uint8_t const *)&pVCpu->cpum + pDesc->offRegister);
221     VMCPU_ASSERT_EMT(pVCpu);
279     PVMCPU          pVCpu   = (PVMCPU)pvUser;
280     PCX86FXSTATE    pFpu    = (PCX86FXSTATE)((uint8_t const *)&pVCpu->cpum + pDesc->offRegister);
282     VMCPU_ASSERT_EMT(pVCpu);
356     PVMCPU pVCpu = (PVMCPU)pvUser;
357     VMCPU_ASSERT_EMT(pVCpu);
360     int rc = CPUMGetGuestCRx(pVCpu, pDesc->offRegister, &u64Value);
379     PVMCPU      pVCpu = (PVMCPU)pvUser;
381     VMCPU_ASSERT_EMT(pVCpu);
407         rc = CPUMGetGuestCRx(pVCpu, pDesc->offRegister, &u64FullValue);
419         case 0: rc = CPUMSetGuestCR0(pVCpu, u64Value); break;
420         case 2: rc = CPUMSetGuestCR2(pVCpu, u64Value); break;
421         case 3: rc = CPUMSetGuestCR3(pVCpu, u64Value); break;
422         case 4: rc = CPUMSetGuestCR4(pVCpu, u64Value); break;
423         case 8: rc = PDMApicSetTPR(pVCpu, (uint8_t)(u64Value << 4)); break;
436     PVMCPU pVCpu = (PVMCPU)pvUser;
437     VMCPU_ASSERT_EMT(pVCpu);
440     int rc = CPUMGetGuestDRx(pVCpu, pDesc->offRegister, &u64Value);
459     PVMCPU      pVCpu = (PVMCPU)pvUser;
461     VMCPU_ASSERT_EMT(pVCpu);
487         rc = CPUMGetGuestDRx(pVCpu, pDesc->offRegister, &u64FullValue);
497     return CPUMSetGuestDRx(pVCpu, pDesc->offRegister, u64Value);
506     PVMCPU pVCpu = (PVMCPU)pvUser;
507     VMCPU_ASSERT_EMT(pVCpu);
510     VBOXSTRICTRC rcStrict = CPUMQueryGuestMsr(pVCpu, pDesc->offRegister, &u64Value);
535     PVMCPU pVCpu = (PVMCPU)pvUser;
537     VMCPU_ASSERT_EMT(pVCpu);
568         VBOXSTRICTRC rcStrict = CPUMQueryGuestMsr(pVCpu, pDesc->offRegister, &u64FullValue);
581     VBOXSTRICTRC rcStrict = CPUMSetGuestMsr(pVCpu, pDesc->offRegister, u64Value);
594     PVMCPU pVCpu = (PVMCPU)pvUser;
595     VMCPU_ASSERT_EMT(pVCpu);
598     PX86FXSTATE pFpuCtx = &pVCpu->cpum.s.Guest.CTX_SUFF(pXState)->x87;
630     PVMCPU pVCpu = (PVMCPU)pvUser;
631     VMCPU_ASSERT_EMT(pVCpu);
638         case 3: u64Value = CPUMGetHyperCR3(pVCpu); break;
671     PVMCPU pVCpu = (PVMCPU)pvUser;
672     VMCPU_ASSERT_EMT(pVCpu);
677         case 0: u64Value = CPUMGetHyperDR0(pVCpu); break;
678         case 1: u64Value = CPUMGetHyperDR1(pVCpu); break;
679         case 2: u64Value = CPUMGetHyperDR2(pVCpu); break;
680         case 3: u64Value = CPUMGetHyperDR3(pVCpu); break;
681         case 6: u64Value = CPUMGetHyperDR6(pVCpu); break;
682         case 7: u64Value = CPUMGetHyperDR7(pVCpu); break;