Lines Matching defs:uMsr

1137 static void hmR0VmxSetMsrPermission(PVMCPU pVCpu, uint32_t uMsr, VMXMSREXITREAD enmRead, VMXMSREXITWRITE enmWrite)
1149 if (uMsr <= 0x00001FFF)
1150 iBit = uMsr;
1151 else if ( uMsr >= 0xC0000000
1152 && uMsr <= 0xC0001FFF)
1154 iBit = (uMsr - 0xC0000000);
1158 AssertMsgFailedReturnVoid(("hmR0VmxSetMsrPermission: Invalid MSR %#RX32\n", uMsr));
1183 * @param uMsr The MSR.
1187 static int hmR0VmxGetMsrPermission(PVMCPU pVCpu, uint32_t uMsr, PVMXMSREXITREAD penmRead, PVMXMSREXITWRITE penmWrite)
1195 if (uMsr <= 0x00001FFF)
1196 iBit = uMsr;
1197 else if ( uMsr >= 0xC0000000
1198 && uMsr <= 0xC0001FFF)
1200 iBit = (uMsr - 0xC0000000);
1204 AssertMsgFailedReturn(("hmR0VmxGetMsrPermission: Invalid MSR %#RX32\n", uMsr), VERR_NOT_SUPPORTED);
1262 * @param uMsr The MSR.
1267 static bool hmR0VmxAddAutoLoadStoreMsr(PVMCPU pVCpu, uint32_t uMsr, uint64_t uGuestMsrValue, bool fUpdateHostMsr)
1274 if (pGuestMsr->u32Msr == uMsr)
1288 hmR0VmxSetMsrPermission(pVCpu, uMsr, VMXMSREXIT_PASSTHRU_READ, VMXMSREXIT_PASSTHRU_WRITE);
1294 pGuestMsr->u32Msr = uMsr;
1300 pHostMsr->u32Msr = uMsr;
1327 * @param uMsr The MSR.
1329 static int hmR0VmxRemoveAutoLoadStoreMsr(PVMCPU pVCpu, uint32_t uMsr)
1336 if (pGuestMsr->u32Msr == uMsr)
1370 hmR0VmxSetMsrPermission(pVCpu, uMsr, VMXMSREXIT_INTERCEPT_READ, VMXMSREXIT_INTERCEPT_WRITE);
1372 Log4(("Removed MSR %#RX32 new cMsrs=%u\n", uMsr, pVCpu->hm.s.vmx.cMsrs));
1386 * @param uMsr The MSR to find.
1388 static bool hmR0VmxIsAutoLoadStoreGuestMsr(PVMCPU pVCpu, uint32_t uMsr)
1395 if (pGuestMsr->u32Msr == uMsr)
1467 * @param uMsr The MSR to check.
1469 static bool hmR0VmxIsLazyGuestMsr(PVMCPU pVCpu, uint32_t uMsr)
1472 switch (uMsr)
1530 #define VMXLOCAL_LAZY_LOAD_GUEST_MSR(uMsr, a_GuestMsr, a_HostMsr) \
1533 ASMWrMsr(uMsr, pMixedCtx->msr##a_GuestMsr); \
1535 Assert(ASMRdMsr(uMsr) == pVCpu->hm.s.vmx.u64Host##a_HostMsr##Msr); \
6339 AssertMsgFailed(("Unexpected MSR in auto-load/store area. uMsr=%#RX32 cMsrs=%u\n", pMsr->u32Msr, cMsrs));