Lines Matching refs:vmx
127 } vmx;
346 g_HvmR0.vmx.Msrs.u64FeatureCtrl = ASMRdMsr(MSR_IA32_FEATURE_CONTROL);
353 g_HvmR0.vmx.fUsingSUPR0EnableVTx = rc != VERR_NOT_SUPPORTED;
354 if (g_HvmR0.vmx.fUsingSUPR0EnableVTx)
359 g_HvmR0.vmx.fSupported = true;
377 g_HvmR0.vmx.Msrs.u64FeatureCtrl = ASMRdMsr(MSR_IA32_FEATURE_CONTROL);
382 g_HvmR0.vmx.u64HostCr4 = ASMGetCR4();
383 g_HvmR0.vmx.u64HostEfer = ASMRdMsr(MSR_K6_EFER);
384 g_HvmR0.vmx.Msrs.u64BasicInfo = ASMRdMsr(MSR_IA32_VMX_BASIC_INFO);
385 g_HvmR0.vmx.Msrs.VmxPinCtls.u = ASMRdMsr(MSR_IA32_VMX_PINBASED_CTLS);
386 g_HvmR0.vmx.Msrs.VmxProcCtls.u = ASMRdMsr(MSR_IA32_VMX_PROCBASED_CTLS);
387 g_HvmR0.vmx.Msrs.VmxExit.u = ASMRdMsr(MSR_IA32_VMX_EXIT_CTLS);
388 g_HvmR0.vmx.Msrs.VmxEntry.u = ASMRdMsr(MSR_IA32_VMX_ENTRY_CTLS);
389 g_HvmR0.vmx.Msrs.u64Misc = ASMRdMsr(MSR_IA32_VMX_MISC);
390 g_HvmR0.vmx.Msrs.u64Cr0Fixed0 = ASMRdMsr(MSR_IA32_VMX_CR0_FIXED0);
391 g_HvmR0.vmx.Msrs.u64Cr0Fixed1 = ASMRdMsr(MSR_IA32_VMX_CR0_FIXED1);
392 g_HvmR0.vmx.Msrs.u64Cr4Fixed0 = ASMRdMsr(MSR_IA32_VMX_CR4_FIXED0);
393 g_HvmR0.vmx.Msrs.u64Cr4Fixed1 = ASMRdMsr(MSR_IA32_VMX_CR4_FIXED1);
394 g_HvmR0.vmx.Msrs.u64VmcsEnum = ASMRdMsr(MSR_IA32_VMX_VMCS_ENUM);
398 if (g_HvmR0.vmx.Msrs.VmxProcCtls.n.allowed1 & VMX_VMCS_CTRL_PROC_EXEC_USE_SECONDARY_EXEC_CTRL)
400 g_HvmR0.vmx.Msrs.VmxProcCtls2.u = ASMRdMsr(MSR_IA32_VMX_PROCBASED_CTLS2);
401 if (g_HvmR0.vmx.Msrs.VmxProcCtls2.n.allowed1 & (VMX_VMCS_CTRL_PROC_EXEC2_EPT | VMX_VMCS_CTRL_PROC_EXEC2_VPID))
402 g_HvmR0.vmx.Msrs.u64EptVpidCaps = ASMRdMsr(MSR_IA32_VMX_EPT_VPID_CAP);
404 if (g_HvmR0.vmx.Msrs.VmxProcCtls2.n.allowed1 & VMX_VMCS_CTRL_PROC_EXEC2_VMFUNC)
405 g_HvmR0.vmx.Msrs.u64Vmfunc = ASMRdMsr(MSR_IA32_VMX_VMFUNC);
408 if (!g_HvmR0.vmx.fUsingSUPR0EnableVTx)
426 *(uint32_t *)pvScatchPage = MSR_IA32_VMX_BASIC_INFO_VMCS_ID(g_HvmR0.vmx.Msrs.u64BasicInfo);
434 g_HvmR0.vmx.u64HostCr4 = ASMGetCR4();
435 if (!(g_HvmR0.vmx.u64HostCr4 & X86_CR4_VMXE))
439 ASMSetCR4(g_HvmR0.vmx.u64HostCr4 | X86_CR4_VMXE);
450 g_HvmR0.vmx.fSupported = true;
467 Assert(g_HvmR0.vmx.fSupported == false);
473 ASMSetCR4(g_HvmR0.vmx.u64HostCr4);
479 if (g_HvmR0.vmx.fSupported)
502 if (g_HvmR0.vmx.Msrs.VmxPinCtls.n.allowed1 & VMX_VMCS_CTRL_PIN_EXEC_PREEMPT_TIMER)
504 g_HvmR0.vmx.fUsePreemptTimer = true;
505 g_HvmR0.vmx.cPreemptTimerShift = MSR_IA32_VMX_MISC_PREEMPT_TSC_BIT(g_HvmR0.vmx.Msrs.u64Misc);
507 g_HvmR0.vmx.cPreemptTimerShift = 0; /* This is about right most of the time here. */
694 if (!g_HvmR0.vmx.fUsingSUPR0EnableVTx)
717 if ( g_HvmR0.vmx.fSupported
718 && g_HvmR0.vmx.fUsingSUPR0EnableVTx)
734 Assert(!g_HvmR0.vmx.fUsingSUPR0EnableVTx);
735 if (!g_HvmR0.vmx.fUsingSUPR0EnableVTx)
777 if (g_HvmR0.vmx.fSupported)
849 if (g_HvmR0.vmx.fSupported && g_HvmR0.vmx.fUsingSUPR0EnableVTx)
850 rc = g_HvmR0.pfnEnableCpu(pCpu, pVM, NULL /* pvCpuPage */, NIL_RTHCPHYS, true, &g_HvmR0.vmx.Msrs);
857 if (g_HvmR0.vmx.fSupported)
858 rc = g_HvmR0.pfnEnableCpu(pCpu, pVM, pvCpuPage, HCPhysCpuPage, false, &g_HvmR0.vmx.Msrs);
923 if ( g_HvmR0.vmx.fSupported
924 && g_HvmR0.vmx.fUsingSUPR0EnableVTx)
1005 Assert(!g_HvmR0.vmx.fSupported || !g_HvmR0.vmx.fUsingSUPR0EnableVTx);
1115 Assert(!g_HvmR0.vmx.fSupported || !g_HvmR0.vmx.fUsingSUPR0EnableVTx);
1147 if (g_HvmR0.vmx.fSupported)
1200 pVM->hm.s.vmx.fSupported = g_HvmR0.vmx.fSupported;
1203 pVM->hm.s.vmx.fUsePreemptTimer &= g_HvmR0.vmx.fUsePreemptTimer; /* Can be overridden by CFGM. See HMR3Init(). */
1204 pVM->hm.s.vmx.cPreemptTimerShift = g_HvmR0.vmx.cPreemptTimerShift;
1205 pVM->hm.s.vmx.u64HostCr4 = g_HvmR0.vmx.u64HostCr4;
1206 pVM->hm.s.vmx.u64HostEfer = g_HvmR0.vmx.u64HostEfer;
1207 pVM->hm.s.vmx.Msrs = g_HvmR0.vmx.Msrs;
1500 if (pVM->hm.s.vmx.fSupported)
1517 if (pVM->hm.s.vmx.fSupported)
1537 if (pVM->hm.s.vmx.fSupported)
1651 if (!g_HvmR0.vmx.fSupported)
1673 if (g_HvmR0.vmx.fUsingSUPR0EnableVTx)
1715 Assert(g_HvmR0.vmx.fSupported);
1716 if (g_HvmR0.vmx.fUsingSUPR0EnableVTx)
1728 VMXR0EnableCpu(pCpu, pVM, pvCpuPage, HCPhysCpuPage, false, &g_HvmR0.vmx.Msrs);