Lines Matching refs:pVCpu
88 DECLR0CALLBACKMEMBER(int, pfnEnterSession, (PVM pVM, PVMCPU pVCpu, PHMGLOBALCPUINFO pCpu));
89 DECLR0CALLBACKMEMBER(void, pfnThreadCtxCallback, (RTTHREADCTXEVENT enmEvent, PVMCPU pVCpu, bool fGlobalInit));
90 DECLR0CALLBACKMEMBER(int, pfnSaveHostState, (PVM pVM, PVMCPU pVCpu));
91 DECLR0CALLBACKMEMBER(int, pfnRunGuestCode, (PVM pVM, PVMCPU pVCpu, PCPUMCTX pCtx));
227 static DECLCALLBACK(int) hmR0DummyEnter(PVM pVM, PVMCPU pVCpu, PHMGLOBALCPUINFO pCpu)
229 NOREF(pVM); NOREF(pVCpu); NOREF(pCpu);
233 static DECLCALLBACK(void) hmR0DummyThreadCtxCallback(RTTHREADCTXEVENT enmEvent, PVMCPU pVCpu, bool fGlobalInit)
235 NOREF(enmEvent); NOREF(pVCpu); NOREF(fGlobalInit);
269 static DECLCALLBACK(int) hmR0DummyRunGuestCode(PVM pVM, PVMCPU pVCpu, PCPUMCTX pCtx)
271 NOREF(pVM); NOREF(pVCpu); NOREF(pCtx);
275 static DECLCALLBACK(int) hmR0DummySaveHostState(PVM pVM, PVMCPU pVCpu)
277 NOREF(pVM); NOREF(pVCpu);
1228 PVMCPU pVCpu = &pVM->aCpus[i];
1229 pVCpu->hm.s.idEnteredCpu = NIL_RTCPUID;
1230 pVCpu->hm.s.idLastCpu = NIL_RTCPUID;
1231 pVCpu->hm.s.fGIMTrapXcptUD = GIMShouldTrapXcptUD(pVCpu);
1234 AssertReturn(!pVCpu->hm.s.uCurrentAsid, VERR_HM_IPE_3);
1327 VMMR0_INT_DECL(int) HMR0EnterCpu(PVMCPU pVCpu)
1338 rc = hmR0EnableCpu(pVCpu->CTX_SUFF(pVM), idCpu);
1341 HMCPU_CF_SET(pVCpu, HM_CHANGED_HOST_CONTEXT | HM_CHANGED_HOST_GUEST_SHARED_STATE);
1344 pVCpu->hm.s.idEnteredCpu = idCpu;
1354 * @param pVCpu Pointer to the VMCPU.
1358 VMMR0_INT_DECL(int) HMR0Enter(PVM pVM, PVMCPU pVCpu)
1365 int rc = HMR0EnterCpu(pVCpu);
1369 AssertReturn(!VMMR0ThreadCtxHooksAreRegistered(pVCpu), VERR_HM_IPE_5);
1370 bool fStartedSet = PGMR0DynMapStartOrMigrateAutoSet(pVCpu);
1376 Assert(HMCPU_CF_IS_SET(pVCpu, HM_CHANGED_HOST_CONTEXT | HM_CHANGED_HOST_GUEST_SHARED_STATE));
1378 rc = g_HvmR0.pfnEnterSession(pVM, pVCpu, pCpu);
1379 AssertMsgRCReturn(rc, ("pfnEnterSession failed. rc=%Rrc pVCpu=%p HostCpuId=%u\n", rc, pVCpu, idCpu), rc);
1383 rc = g_HvmR0.pfnSaveHostState(pVM, pVCpu);
1384 AssertMsgRCReturn(rc, ("pfnSaveHostState failed. rc=%Rrc pVCpu=%p HostCpuId=%u\n", rc, pVCpu, idCpu), rc);
1388 PGMRZDynMapReleaseAutoSet(pVCpu);
1393 pVCpu->hm.s.idEnteredCpu = NIL_RTCPUID;
1403 * @param pVCpu Pointer to the VMCPU.
1407 VMMR0_INT_DECL(int) HMR0LeaveCpu(PVMCPU pVCpu)
1410 VMCPU_ASSERT_EMT_RETURN(pVCpu, VERR_HM_WRONG_CPU);
1424 pVCpu->hm.s.idLastCpu = NIL_RTCPUID;
1428 pVCpu->hm.s.idEnteredCpu = NIL_RTCPUID;
1442 PVMCPU pVCpu = (PVMCPU)pvUser;
1443 Assert(pVCpu);
1446 g_HvmR0.pfnThreadCtxCallback(enmEvent, pVCpu, g_HvmR0.fGlobalInit);
1455 * @param pVCpu Pointer to the VMCPU.
1460 VMMR0_INT_DECL(int) HMR0RunGuestCode(PVM pVM, PVMCPU pVCpu)
1467 Assert(!VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_PGM_SYNC_CR3 | VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL));
1474 AssertReturn(!VMMR0ThreadCtxHooksAreRegistered(pVCpu), VERR_HM_IPE_4);
1476 PGMRZDynMapStartAutoSet(pVCpu);
1479 int rc = g_HvmR0.pfnRunGuestCode(pVM, pVCpu, CPUMQueryGuestCtxPtr(pVCpu));
1482 PGMRZDynMapReleaseAutoSet(pVCpu);
1494 * @param pVCpu Pointer to the VMCPU.
1497 VMMR0_INT_DECL(int) HMR0SaveFPUState(PVM pVM, PVMCPU pVCpu, PCPUMCTX pCtx)
1499 STAM_COUNTER_INC(&pVCpu->hm.s.StatFpu64SwitchBack);
1501 return VMXR0Execute64BitsHandler(pVM, pVCpu, pCtx, HM64ON32OP_HMRCSaveGuestFPU64, 0, NULL);
1502 return SVMR0Execute64BitsHandler(pVM, pVCpu, pCtx, HM64ON32OP_HMRCSaveGuestFPU64, 0, NULL);
1511 * @param pVCpu Pointer to the VMCPU.
1514 VMMR0_INT_DECL(int) HMR0SaveDebugState(PVM pVM, PVMCPU pVCpu, PCPUMCTX pCtx)
1516 STAM_COUNTER_INC(&pVCpu->hm.s.StatDebug64SwitchBack);
1518 return VMXR0Execute64BitsHandler(pVM, pVCpu, pCtx, HM64ON32OP_HMRCSaveGuestDebug64, 0, NULL);
1519 return SVMR0Execute64BitsHandler(pVM, pVCpu, pCtx, HM64ON32OP_HMRCSaveGuestDebug64, 0, NULL);
1531 PVMCPU pVCpu = &pVM->aCpus[0];
1532 PCPUMCTX pCtx = CPUMQueryGuestCtxPtr(pVCpu);
1536 STAM_PROFILE_ADV_START(&pVCpu->hm.s.StatWorldSwitch3264, z);
1538 rc = VMXR0Execute64BitsHandler(pVM, pVCpu, pCtx, HM64ON32OP_HMRCTestSwitcher64, 5, &aParam[0]);
1540 rc = SVMR0Execute64BitsHandler(pVM, pVCpu, pCtx, HM64ON32OP_HMRCTestSwitcher64, 5, &aParam[0]);
1541 STAM_PROFILE_ADV_STOP(&pVCpu->hm.s.StatWorldSwitch3264, z);
1591 * @param pVCpu Pointer to the VMCPU.
1598 VMMR0_INT_DECL(void) HMR0SavePendingIOPortRead(PVMCPU pVCpu, RTGCPTR GCPtrRip, RTGCPTR GCPtrRipNext,
1601 pVCpu->hm.s.PendingIO.enmType = HMPENDINGIO_PORT_READ;
1602 pVCpu->hm.s.PendingIO.GCPtrRip = GCPtrRip;
1603 pVCpu->hm.s.PendingIO.GCPtrRipNext = GCPtrRipNext;
1604 pVCpu->hm.s.PendingIO.s.Port.uPort = uPort;
1605 pVCpu->hm.s.PendingIO.s.Port.uAndVal = uAndVal;
1606 pVCpu->hm.s.PendingIO.s.Port.cbSize = cbSize;
1614 * @param pVCpu Pointer to the VMCPU.
1620 VMMR0_INT_DECL(void) HMR0SavePendingIOPortWrite(PVMCPU pVCpu, RTGCPTR GCPtrRip, RTGCPTR GCPtrRipNext,
1623 pVCpu->hm.s.PendingIO.enmType = HMPENDINGIO_PORT_WRITE;
1624 pVCpu->hm.s.PendingIO.GCPtrRip = GCPtrRip;
1625 pVCpu->hm.s.PendingIO.GCPtrRipNext = GCPtrRipNext;
1626 pVCpu->hm.s.PendingIO.s.Port.uPort = uPort;
1627 pVCpu->hm.s.PendingIO.s.Port.uAndVal = uAndVal;
1628 pVCpu->hm.s.PendingIO.s.Port.cbSize = cbSize;
1857 * @param pVCpu Pointer to the VMCPU.
1860 VMMR0DECL(void) HMDumpRegs(PVM pVM, PVMCPU pVCpu, PCPUMCTX pCtx)
1907 if (CPUMIsGuestIn64BitCode(pVCpu))