Lines Matching refs:pVCpu
50 * @param pVCpu Pointer to the VMCPU.
54 VMMDECL(int) TRPMQueryTrap(PVMCPU pVCpu, uint8_t *pu8TrapNo, TRPMEVENT *penmType)
59 if (pVCpu->trpm.s.uActiveVector != ~0U)
62 *pu8TrapNo = (uint8_t)pVCpu->trpm.s.uActiveVector;
64 *penmType = pVCpu->trpm.s.enmActiveType;
79 * @param pVCpu Pointer to the VMCPU.
81 VMMDECL(uint8_t) TRPMGetTrapNo(PVMCPU pVCpu)
83 AssertMsg(pVCpu->trpm.s.uActiveVector != ~0U, ("No active trap!\n"));
84 return (uint8_t)pVCpu->trpm.s.uActiveVector;
95 * @param pVCpu Pointer to the VMCPU.
97 VMMDECL(RTGCUINT) TRPMGetErrorCode(PVMCPU pVCpu)
99 AssertMsg(pVCpu->trpm.s.uActiveVector != ~0U, ("No active trap!\n"));
101 switch (pVCpu->trpm.s.uActiveVector)
112 AssertMsgFailed(("This trap (%#x) doesn't have any error code\n", pVCpu->trpm.s.uActiveVector));
116 return pVCpu->trpm.s.uActiveErrorCode;
127 * @param pVCpu Pointer to the VMCPU.
129 VMMDECL(RTGCUINTPTR) TRPMGetFaultAddress(PVMCPU pVCpu)
131 AssertMsg(pVCpu->trpm.s.uActiveVector != ~0U, ("No active trap!\n"));
132 AssertMsg(pVCpu->trpm.s.uActiveVector == X86_XCPT_PF, ("Not page-fault trap!\n"));
133 return pVCpu->trpm.s.uActiveCR2;
145 * @param pVCpu Pointer to the VMCPU.
147 VMMDECL(uint8_t) TRPMGetInstrLength(PVMCPU pVCpu)
149 AssertMsg(pVCpu->trpm.s.uActiveVector != ~0U, ("No active trap!\n"));
150 return pVCpu->trpm.s.cbInstr;
161 * @param pVCpu Pointer to the VMCPU.
163 VMMDECL(int) TRPMResetTrap(PVMCPU pVCpu)
168 if (pVCpu->trpm.s.uActiveVector == ~0U)
177 pVCpu->trpm.s.uActiveVector = ~0U;
189 * @param pVCpu Pointer to the VMCPU.
193 VMMDECL(int) TRPMAssertTrap(PVMCPU pVCpu, uint8_t u8TrapNo, TRPMEVENT enmType)
200 if (pVCpu->trpm.s.uActiveVector != ~0U)
202 AssertMsgFailed(("CPU%d: Active trap %#x\n", pVCpu->idCpu, pVCpu->trpm.s.uActiveVector));
206 pVCpu->trpm.s.uActiveVector = u8TrapNo;
207 pVCpu->trpm.s.enmActiveType = enmType;
208 pVCpu->trpm.s.uActiveErrorCode = ~(RTGCUINT)0;
209 pVCpu->trpm.s.uActiveCR2 = 0xdeadface;
210 pVCpu->trpm.s.cbInstr = UINT8_MAX;
222 * @param pVCpu Pointer to the VMCPU.
226 VMMDECL(int) TRPMAssertXcptPF(PVMCPU pVCpu, RTGCUINTPTR uCR2, RTGCUINT uErrorCode)
233 if (pVCpu->trpm.s.uActiveVector != ~0U)
235 AssertMsgFailed(("CPU%d: Active trap %#x\n", pVCpu->idCpu, pVCpu->trpm.s.uActiveVector));
239 pVCpu->trpm.s.uActiveVector = X86_XCPT_PF;
240 pVCpu->trpm.s.enmActiveType = TRPM_TRAP;
241 pVCpu->trpm.s.uActiveErrorCode = uErrorCode;
242 pVCpu->trpm.s.uActiveCR2 = uCR2;
243 pVCpu->trpm.s.cbInstr = UINT8_MAX;
255 * @param pVCpu Pointer to the VMCPU.
258 VMMDECL(void) TRPMSetErrorCode(PVMCPU pVCpu, RTGCUINT uErrorCode)
261 AssertMsg(pVCpu->trpm.s.uActiveVector != ~0U, ("No active trap!\n"));
262 pVCpu->trpm.s.uActiveErrorCode = uErrorCode;
264 switch (pVCpu->trpm.s.uActiveVector)
267 AssertMsg(uErrorCode != ~(RTGCUINT)0, ("Invalid uErrorCode=%#x u8TrapNo=%d\n", uErrorCode, pVCpu->trpm.s.uActiveVector));
270 AssertMsg(uErrorCode == 0, ("Invalid uErrorCode=%#x u8TrapNo=%d\n", uErrorCode, pVCpu->trpm.s.uActiveVector));
273 AssertMsg(uErrorCode == ~(RTGCUINT)0, ("Invalid uErrorCode=%#x u8TrapNo=%d\n", uErrorCode, pVCpu->trpm.s.uActiveVector));
287 * @param pVCpu Pointer to the VMCPU.
290 VMMDECL(void) TRPMSetFaultAddress(PVMCPU pVCpu, RTGCUINTPTR uCR2)
293 AssertMsg(pVCpu->trpm.s.uActiveVector != ~0U, ("No active trap!\n"));
294 AssertMsg(pVCpu->trpm.s.uActiveVector == X86_XCPT_PF, ("Not trap 0e!\n"));
295 pVCpu->trpm.s.uActiveCR2 = uCR2;
306 * @param pVCpu Pointer to the VMCPU.
309 VMMDECL(void) TRPMSetInstrLength(PVMCPU pVCpu, uint8_t cbInstr)
312 AssertMsg(pVCpu->trpm.s.uActiveVector != ~0U, ("No active trap!\n"));
313 AssertMsg( pVCpu->trpm.s.enmActiveType == TRPM_SOFTWARE_INT
314 || ( pVCpu->trpm.s.enmActiveType == TRPM_TRAP
315 && ( pVCpu->trpm.s.uActiveVector == X86_XCPT_BP
316 || pVCpu->trpm.s.uActiveVector == X86_XCPT_OF)),
317 ("Invalid trap type %#x\n", pVCpu->trpm.s.enmActiveType));
318 pVCpu->trpm.s.cbInstr = cbInstr;
331 * @param pVCpu Pointer to the VMCPU.
333 VMMDECL(bool) TRPMIsSoftwareInterrupt(PVMCPU pVCpu)
335 AssertMsg(pVCpu->trpm.s.uActiveVector != ~0U, ("No active trap!\n"));
336 return (pVCpu->trpm.s.enmActiveType == TRPM_SOFTWARE_INT);
344 * @param pVCpu Pointer to the VMCPU.
346 VMMDECL(bool) TRPMHasTrap(PVMCPU pVCpu)
348 return pVCpu->trpm.s.uActiveVector != ~0U;
357 * @param pVCpu Pointer to the VMCPU.
366 VMMDECL(int) TRPMQueryTrapAll(PVMCPU pVCpu, uint8_t *pu8TrapNo, TRPMEVENT *pEnmType, PRTGCUINT puErrorCode, PRTGCUINTPTR puCR2,
372 if (pVCpu->trpm.s.uActiveVector == ~0U)
376 *pu8TrapNo = (uint8_t)pVCpu->trpm.s.uActiveVector;
378 *pEnmType = pVCpu->trpm.s.enmActiveType;
380 *puErrorCode = pVCpu->trpm.s.uActiveErrorCode;
382 *puCR2 = pVCpu->trpm.s.uActiveCR2;
384 *pcbInstr = pVCpu->trpm.s.cbInstr;
398 VMMDECL(void) TRPMSaveTrap(PVMCPU pVCpu)
400 pVCpu->trpm.s.uSavedVector = pVCpu->trpm.s.uActiveVector;
401 pVCpu->trpm.s.enmSavedType = pVCpu->trpm.s.enmActiveType;
402 pVCpu->trpm.s.uSavedErrorCode = pVCpu->trpm.s.uActiveErrorCode;
403 pVCpu->trpm.s.uSavedCR2 = pVCpu->trpm.s.uActiveCR2;
404 pVCpu->trpm.s.cbSavedInstr = pVCpu->trpm.s.cbInstr;
415 VMMDECL(void) TRPMRestoreTrap(PVMCPU pVCpu)
417 pVCpu->trpm.s.uActiveVector = pVCpu->trpm.s.uSavedVector;
418 pVCpu->trpm.s.enmActiveType = pVCpu->trpm.s.enmSavedType;
419 pVCpu->trpm.s.uActiveErrorCode = pVCpu->trpm.s.uSavedErrorCode;
420 pVCpu->trpm.s.uActiveCR2 = pVCpu->trpm.s.uSavedCR2;
421 pVCpu->trpm.s.cbInstr = pVCpu->trpm.s.cbSavedInstr;
442 VMMDECL(int) TRPMForwardTrap(PVMCPU pVCpu, PCPUMCTXCORE pRegFrame, uint32_t iGate, uint32_t cbInstr,
445 AssertReturn(!HMIsEnabled(pVCpu->CTX_SUFF(pVM)), VERR_TRPM_HM_IPE);
447 PVM pVM = pVCpu->CTX_SUFF(pVM);
461 if (pRegFrame->eip == pVCpu->trpm.s.uActiveCR2)
467 int rc = PGMPhysSimpleReadGCPtr(pVCpu, &pCallerGC, (RTGCPTR)pRegFrame->esp, sizeof(pCallerGC));
488 AssertReturn(CPUMIsGuestInRawMode(pVCpu), VINF_EM_RESCHEDULE);
493 eflags.u32 = CPUMRawGetEFlags(pVCpu);
496 Assert(enmType != TRPM_HARDWARE_INT || !VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_INHIBIT_INTERRUPTS));
512 RTGCPTR GCPtrIDT = (RTGCPTR)CPUMGetGuestIDTR(pVCpu, &cbIDT);
519 Assert(!VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_SELM_SYNC_GDT | VMCPU_FF_SELM_SYNC_LDT | VMCPU_FF_TRPM_SYNC_IDT | VMCPU_FF_SELM_SYNC_TSS));
525 cpl = CPUMGetGuestCPL(pVCpu);
537 rc = PGMPhysSimpleReadGCPtr(pVCpu, &GuestIdte, pIDTEntry, sizeof(GuestIdte));
543 rc = PGMPrefetchPage(pVCpu, pIDTEntry); /** @todo r=bird: rainy day: this isn't entirely safe because of access bit virtualiziation and CSAM. */
552 rc = PGMPhysSimpleReadGCPtr(pVCpu, &GuestIdte, pIDTEntry, sizeof(GuestIdte));
575 rc = SELMValidateAndConvertCSAddr(pVCpu, fakeflags, 0, GuestIdte.Gen.u16SegSel, NULL, pHandler, &dummy);
587 CPUMGetGuestGDTR(pVCpu, &gdtr);
597 rc = PGMPhysSimpleReadGCPtr(pVCpu, &Desc, pGdtEntry, sizeof(Desc));
603 rc = PGMPrefetchPage(pVCpu, pGdtEntry); /** @todo r=bird: rainy day: this isn't entirely safe because of access bit virtualiziation and CSAM. */
612 rc = PGMPhysSimpleReadGCPtr(pVCpu, &Desc, pGdtEntry, sizeof(Desc));
641 || SELMToFlatBySelEx(pVCpu, fakeflags, ss_r0, (RTGCPTR)esp_r0, SELMTOFLAT_FLAGS_CPL1,
656 || SELMToFlatBySelEx(pVCpu, fakeflags, ss_r0, (RTGCPTR)esp_r0, SELMTOFLAT_FLAGS_CPL1,
675 rc = PGMVerifyAccess(pVCpu, (RTGCUINTPTR)pTrapStackGC - 10*sizeof(uint32_t), 10 * sizeof(uint32_t), X86_PTE_RW);
683 rc = PGMPhysGCPtr2CCPtr(pVCpu, pTrapStackGC, (void **)&pTrapStack, &PageMappingLock);
695 Log(("TRAP%02X: (VM) Handler %04X:%RGv Stack %04X:%08X RPL=%d CR2=%08X\n", iGate, GuestIdte.Gen.u16SegSel, pHandler, ss_r0, esp_r0, (pRegFrame->ss.Sel & X86_SEL_RPL), pVCpu->trpm.s.uActiveCR2));
705 Log(("TRAP%02X: Handler %04X:%RGv Stack %04X:%08X RPL=%d CR2=%08X\n", iGate, GuestIdte.Gen.u16SegSel, pHandler, ss_r0, esp_r0, (pRegFrame->ss.Sel & X86_SEL_RPL), pVCpu->trpm.s.uActiveCR2));
748 pTrapStack[--idx] = pVCpu->trpm.s.uActiveErrorCode;
758 if (DBGFIsStepping(pVCpu))
766 CPUMRawSetEFlags(pVCpu, eflags.u32);
782 pVM->trpm.s.aGuestTrapHandler[iGate], esp_r0, eflags.u32, CPUMRawGetEFlags(pVCpu), idx, dpl, cpl));
786 CPUMSetGuestCR2(pVCpu, pVCpu->trpm.s.uActiveCR2);
802 PGMRZDynMapReleaseAutoSet(pVCpu);
808 Assert(!CPUMIsGuestInRawMode(pVCpu));
864 VMMDECL(int) TRPMRaiseXcpt(PVMCPU pVCpu, PCPUMCTXCORE pCtxCore, X86XCPT enmXcpt)
869 pVCpu->trpm.s.uActiveVector = enmXcpt;
870 pVCpu->trpm.s.enmActiveType = TRPM_TRAP;
871 pVCpu->trpm.s.uActiveErrorCode = 0xdeadbeef;
872 pVCpu->trpm.s.uActiveCR2 = 0xdeadface;
873 pVCpu->trpm.s.cbInstr = UINT8_MAX;
893 VMMDECL(int) TRPMRaiseXcptErr(PVMCPU pVCpu, PCPUMCTXCORE pCtxCore, X86XCPT enmXcpt, uint32_t uErr)
898 pVCpu->trpm.s.uActiveVector = enmXcpt;
899 pVCpu->trpm.s.enmActiveType = TRPM_TRAP;
900 pVCpu->trpm.s.uActiveErrorCode = uErr;
901 pVCpu->trpm.s.uActiveCR2 = 0xdeadface;
902 pVCpu->trpm.s.cbInstr = UINT8_MAX;
923 VMMDECL(int) TRPMRaiseXcptErrCR2(PVMCPU pVCpu, PCPUMCTXCORE pCtxCore, X86XCPT enmXcpt, uint32_t uErr, RTGCUINTPTR uCR2)
928 pVCpu->trpm.s.uActiveVector = enmXcpt;
929 pVCpu->trpm.s.enmActiveType = TRPM_TRAP;
930 pVCpu->trpm.s.uActiveErrorCode = uErr;
931 pVCpu->trpm.s.uActiveCR2 = uCR2;
932 pVCpu->trpm.s.cbInstr = UINT8_MAX;