Lines Matching refs:pVCpu

174 PGM_SHW_DECL(int, GetPage)(PVMCPU pVCpu, RTGCUINTPTR GCPtr, uint64_t *pfFlags, PRTHCPHYS pHCPhys);
175 PGM_SHW_DECL(int, ModifyPage)(PVMCPU pVCpu, RTGCUINTPTR GCPtr, size_t cbPages, uint64_t fFlags, uint64_t fMask, uint32_t fOpFlags);
184 * @param pVCpu Pointer to the VMCPU.
191 PGM_SHW_DECL(int, GetPage)(PVMCPU pVCpu, RTGCUINTPTR GCPtr, uint64_t *pfFlags, PRTHCPHYS pHCPhys)
194 NOREF(pVCpu); NOREF(GCPtr); NOREF(pfFlags); NOREF(pHCPhys);
198 PVM pVM = pVCpu->CTX_SUFF(pVM);
209 X86PML4E Pml4e = pgmShwGetLongModePML4E(pVCpu, GCPtr);
215 int rc = PGM_HCPHYS_2_PTR(pVM, pVCpu, Pml4e.u & X86_PML4E_PG_MASK, &pPDPT);
225 rc = PGM_HCPHYS_2_PTR(pVM, pVCpu, Pdpe.u & X86_PDPE_PG_MASK, &pPd);
238 X86PDEPAE Pde = pgmShwGetPaePDE(pVCpu, GCPtr);
245 int rc = pgmShwGetEPTPDPtr(pVCpu, GCPtr, NULL, &pPDDst);
255 X86PDE Pde = pgmShwGet32BitPDE(pVCpu, GCPtr);
272 if ((Pde.u & X86_PTE_PAE_NX) && CPUMIsGuestNXEnabled(pVCpu))
289 int rc2 = PGM_HCPHYS_2_PTR(pVM, pVCpu, Pde.u & SHW_PDE_PG_MASK, &pPT);
328 if (((SHW_PTE_GET_U(Pte) | Pde.u) & X86_PTE_PAE_NX) && CPUMIsGuestNXEnabled(pVCpu))
347 * @param pVCpu Pointer to the VMCPU.
356 PGM_SHW_DECL(int, ModifyPage)(PVMCPU pVCpu, RTGCUINTPTR GCPtr, size_t cb, uint64_t fFlags, uint64_t fMask, uint32_t fOpFlags)
359 NOREF(pVCpu); NOREF(GCPtr); NOREF(cb); NOREF(fFlags); NOREF(fMask); NOREF(fOpFlags);
363 PVM pVM = pVCpu->CTX_SUFF(pVM);
379 X86PML4E Pml4e = pgmShwGetLongModePML4E(pVCpu, GCPtr);
385 rc = PGM_HCPHYS_2_PTR(pVM, pVCpu, Pml4e.u & X86_PML4E_PG_MASK, &pPDPT);
395 rc = PGM_HCPHYS_2_PTR(pVM, pVCpu, Pdpe.u & X86_PDPE_PG_MASK, &pPd);
402 X86PDEPAE Pde = pgmShwGetPaePDE(pVCpu, GCPtr);
409 rc = pgmShwGetEPTPDPtr(pVCpu, GCPtr, NULL, &pPDDst);
419 X86PDE Pde = pgmShwGet32BitPDE(pVCpu, GCPtr);
430 rc = PGM_HCPHYS_2_PTR(pVM, pVCpu, Pde.u & SHW_PDE_PG_MASK, &pPT);
459 rc = PGMGstGetPage(pVCpu, GCPtr, &fGstPte, &GCPhys);
463 Assert((fGstPte & X86_PTE_RW) || !(CPUMGetGuestCR0(pVCpu) & X86_CR0_WP /* allow netware hack */));