Cross Reference: /vbox/src/VBox/VMM/VMMAll/PGMAllGst.h

Lines Matching refs:pVCpu
26 static int PGM_GST_NAME(Walk)(PVMCPU pVCpu, RTGCPTR GCPtr, PGSTPTWALK pWalk);
28 PGM_GST_DECL(int,  GetPage)(PVMCPU pVCpu, RTGCPTR GCPtr, uint64_t *pfFlags, PRTGCPHYS pGCPhys);
29 PGM_GST_DECL(int,  ModifyPage)(PVMCPU pVCpu, RTGCPTR GCPtr, size_t cb, uint64_t fFlags, uint64_t fMask);
30 PGM_GST_DECL(int,  GetPDE)(PVMCPU pVCpu, RTGCPTR GCPtr, PX86PDEPAE pPDE);
40 DECLINLINE(int) PGM_GST_NAME(WalkReturnNotPresent)(PVMCPU pVCpu, PGSTPTWALK pWalk, int iLevel)
42     NOREF(iLevel); NOREF(pVCpu);
48 DECLINLINE(int) PGM_GST_NAME(WalkReturnBadPhysAddr)(PVMCPU pVCpu, PGSTPTWALK pWalk, int rc, int iLevel)
50     AssertMsg(rc == VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS, ("%Rrc\n", rc)); NOREF(rc); NOREF(pVCpu);
56 DECLINLINE(int) PGM_GST_NAME(WalkReturnRsvdError)(PVMCPU pVCpu, PGSTPTWALK pWalk, int iLevel)
58     NOREF(pVCpu);
72  * @param   pVCpu       The current CPU.
76 static int PGM_GST_NAME(Walk)(PVMCPU pVCpu, RTGCPTR GCPtr, PGSTPTWALK pWalk)
92         return PGM_GST_NAME(WalkReturnNotPresent)(pVCpu, pWalk, 8);
100         rc = pgmGstGetLongModePML4PtrEx(pVCpu, &pWalk->pPml4);
102             return PGM_GST_NAME(WalkReturnBadPhysAddr)(pVCpu, pWalk, 4, rc);
111             return PGM_GST_NAME(WalkReturnNotPresent)(pVCpu, pWalk, 4);
112         if (RT_UNLIKELY(!GST_IS_PML4E_VALID(pVCpu, Pml4e)))
113             return PGM_GST_NAME(WalkReturnRsvdError)(pVCpu, pWalk, 4);
118         rc = PGM_GCPHYS_2_PTR_BY_VMCPU(pVCpu, Pml4e.u & X86_PML4E_PG_MASK, &pWalk->pPdpt);
120             return PGM_GST_NAME(WalkReturnBadPhysAddr)(pVCpu, pWalk, 3, rc);
123         rc = pgmGstGetPaePDPTPtrEx(pVCpu, &pWalk->pPdpt);
125             return PGM_GST_NAME(WalkReturnBadPhysAddr)(pVCpu, pWalk, 8, rc);
137             return PGM_GST_NAME(WalkReturnNotPresent)(pVCpu, pWalk, 3);
138         if (RT_UNLIKELY(!GST_IS_PDPE_VALID(pVCpu, Pdpe)))
139             return PGM_GST_NAME(WalkReturnRsvdError)(pVCpu, pWalk, 3);
144         rc = PGM_GCPHYS_2_PTR_BY_VMCPU(pVCpu, Pdpe.u & X86_PDPE_PG_MASK, &pWalk->pPd);
146             return PGM_GST_NAME(WalkReturnBadPhysAddr)(pVCpu, pWalk, 2, rc);
148         rc = pgmGstGet32bitPDPtrEx(pVCpu, &pWalk->pPd);
150             return PGM_GST_NAME(WalkReturnBadPhysAddr)(pVCpu, pWalk, 8, rc);
161             return PGM_GST_NAME(WalkReturnNotPresent)(pVCpu, pWalk, 2);
162         if (Pde.n.u1Size && GST_IS_PSE_ACTIVE(pVCpu))
164             if (RT_UNLIKELY(!GST_IS_BIG_PDE_VALID(pVCpu, Pde)))
165                 return PGM_GST_NAME(WalkReturnRsvdError)(pVCpu, pWalk, 2);
167             pWalk->Core.GCPhys       = GST_GET_BIG_PDE_GCPHYS(pVCpu->CTX_SUFF(pVM), Pde)
169             PGM_A20_APPLY_TO_VAR(pVCpu, pWalk->Core.GCPhys);
184                                        ) && GST_IS_NX_ACTIVE(pVCpu);
193         if (RT_UNLIKELY(!GST_IS_PDE_VALID(pVCpu, Pde)))
194             return PGM_GST_NAME(WalkReturnRsvdError)(pVCpu, pWalk, 2);
199         rc = PGM_GCPHYS_2_PTR_BY_VMCPU(pVCpu, GST_GET_PDE_GCPHYS(Pde), &pWalk->pPt);
201             return PGM_GST_NAME(WalkReturnBadPhysAddr)(pVCpu, pWalk, 1, rc);
211             return PGM_GST_NAME(WalkReturnNotPresent)(pVCpu, pWalk, 1);
212         if (RT_UNLIKELY(!GST_IS_PTE_VALID(pVCpu, Pte)))
213             return PGM_GST_NAME(WalkReturnRsvdError)(pVCpu, pWalk, 1);
236                                    ) && GST_IS_NX_ACTIVE(pVCpu);
256  * @param   pVCpu       Pointer to the VMCPU.
262 PGM_GST_DECL(int, GetPage)(PVMCPU pVCpu, RTGCPTR GCPtr, uint64_t *pfFlags, PRTGCPHYS pGCPhys)
273     NOREF(pVCpu);
281     int rc = PGM_GST_NAME(Walk)(pVCpu, GCPtr, &Walk);
327  * @param   pVCpu       Pointer to the VMCPU.
333 PGM_GST_DECL(int, ModifyPage)(PVMCPU pVCpu, RTGCPTR GCPtr, size_t cb, uint64_t fFlags, uint64_t fMask)
343         int rc = PGM_GST_NAME(Walk)(pVCpu, GCPtr, &Walk);
396     NOREF(pVCpu); NOREF(GCPtr); NOREF(fFlags); NOREF(fMask);
406  * @param   pVCpu       Pointer to the VMCPU.
410 PGM_GST_DECL(int, GetPDE)(PVMCPU pVCpu, RTGCPTR GCPtr, PX86PDEPAE pPDE)
424     PX86PD      pPd = pgmGstGet32bitPDPtr(pVCpu);
428     PCX86PDPAE  pPd = pgmGstGetPaePDPtr(pVCpu, GCPtr, &iPd, NULL);
434     PCX86PDPAE  pPd = pgmGstGetLongModePDPtr(pVCpu, GCPtr, &pPml4eIgn, &PdpeIgn, &iPd);
445     NOREF(pVCpu); NOREF(GCPtr); NOREF(pPDE);
467     PVMCPU          pVCpu  = pState->pVCpu;
471     PX86PD          pPDSrc = pgmGstGet32bitPDPtr(pVCpu);
488         X86PDEPAE   Pde = pgmGstGetPaePDE(pVCpu, GCPtr);
490         X86PDEPAE   Pde = pgmGstGetLongModePDE(pVCpu, GCPtr);
499                  ? GST_IS_PDE_VALID(pVCpu, Pde)
500                  : GST_IS_BIG_PDE_VALID(pVCpu, Pde)) )
508                 int rc = PGM_GCPHYS_2_PTR_V2(pVM, pVCpu, GST_GET_PDE_GCPHYS(Pde), &pPT);
518                             GCPhysNew = PGM_A20_APPLY(pVCpu, (RTGCPHYS)(pPT->a[iPTE].u & GST_PTE_PG_MASK) + offPage);
570                     RTGCPHYS GCPhysNew = PGM_A20_APPLY(pVCpu, GCPhys + (i4KB << PAGE_SHIFT) + offPage);
642         PVMCPU      pVCpu = &pVM->aCpus[i];
645         State.pVCpu = pVCpu;
646         State.fTodo = pVCpu->pgm.s.fSyncFlags;
666             PVMCPU pVCpu = &pVM->aCpus[i];
667             pVCpu->pgm.s.fSyncFlags &= ~PGM_SYNC_UPDATE_PAGE_BIT_VIRTUAL;