Lines Matching refs:Pde

156         GSTPDE              Pde;
159 pWalk->Pde.u = Pde.u = pPde->u;
160 if (!Pde.n.u1Present)
162 if (Pde.n.u1Size && GST_IS_PSE_ACTIVE(pVCpu))
164 if (RT_UNLIKELY(!GST_IS_BIG_PDE_VALID(pVCpu, Pde)))
167 pWalk->Core.GCPhys = GST_GET_BIG_PDE_GCPHYS(pVCpu->CTX_SUFF(pVM), Pde)
170 uint8_t fEffectiveXX = (uint8_t)pWalk->Pde.u
172 & (uint8_t)pWalk->Pde.u
179 pWalk->Core.fEffectiveNX = ( pWalk->Pde.n.u1NoExecute
181 || pWalk->Pde.n.u1NoExecute
193 if (RT_UNLIKELY(!GST_IS_PDE_VALID(pVCpu, Pde)))
199 rc = PGM_GCPHYS_2_PTR_BY_VMCPU(pVCpu, GST_GET_PDE_GCPHYS(Pde), &pWalk->pPt);
221 & (uint8_t)pWalk->Pde.u
223 & (uint8_t)pWalk->Pde.u
231 || pWalk->Pde.n.u1NoExecute
233 || pWalk->Pde.n.u1NoExecute
300 *pfFlags = (Walk.Pde.u & ~(GST_PTE_PG_MASK | X86_PDE4M_RW | X86_PDE4M_US | X86_PDE4M_PS)) /* NX not needed */
301 | ((Walk.Pde.u & X86_PDE4M_PAT) >> X86_PDE4M_PAT_SHIFT)
377 PdeNew.u = (Walk.Pde.u & (fMask | ((fMask & X86_PTE_PAT) << X86_PDE4M_PAT_SHIFT) | GST_PDE_BIG_PG_MASK | X86_PDE4M_PG_HIGH_MASK | X86_PDE4M_PS))
379 PdeNew.u = (Walk.Pde.u & (fMask | ((fMask & X86_PTE_PAT) << X86_PDE4M_PAT_SHIFT) | GST_PDE_BIG_PG_MASK | X86_PDE4M_PS))
486 X86PDE Pde = pPDSrc->a[GCPtr >> X86_PD_SHIFT];
488 X86PDEPAE Pde = pgmGstGetPaePDE(pVCpu, GCPtr);
490 X86PDEPAE Pde = pgmGstGetLongModePDE(pVCpu, GCPtr);
493 bool const fBigPage = Pde.b.u1Size && (pState->cr4 & X86_CR4_PSE);
495 bool const fBigPage = Pde.b.u1Size;
497 if ( Pde.n.u1Present
499 ? GST_IS_PDE_VALID(pVCpu, Pde)
500 : GST_IS_BIG_PDE_VALID(pVCpu, Pde)) )
508 int rc = PGM_GCPHYS_2_PTR_V2(pVM, pVCpu, GST_GET_PDE_GCPHYS(Pde), &pPT);
565 RTGCPHYS GCPhys = (RTGCPHYS)GST_GET_PDE_GCPHYS(Pde);
590 Log(("VirtHandler: Not present / invalid Pde=%RX64\n", (uint64_t)Pde.u));