Lines Matching refs:iPdPt
981 const unsigned iPdPt = (GCPtr >> X86_PDPT_SHIFT) & X86_PDPT_MASK_PAE;
983 PX86PDPE pPdpe = &pPdpt->a[iPdPt];
1001 GCPdPt = (RTGCPTR64)iPdPt << X86_PDPT_SHIFT;
1028 enmKind = (PGMPOOLKIND)(PGMPOOLKIND_PAE_PD0_FOR_32BIT_PD + iPdPt);
1034 pVCpu->pgm.s.CTX_SUFF(pShwPageCR3)->idx, iPdPt, false /*fLockPage*/,
1074 const unsigned iPdPt = (GCPtr >> X86_PDPT_SHIFT) & X86_PDPT_MASK_PAE;
1081 if (!pPdpt->a[iPdPt].n.u1Present)
1083 LogFlow(("pgmShwGetPaePoolPagePD: PD %d not present (%RX64)\n", iPdPt, pPdpt->a[iPdPt].u));
1086 AssertMsg(pPdpt->a[iPdPt].u & X86_PDPE_PG_MASK, ("GCPtr=%RGv\n", GCPtr));
1089 PPGMPOOLPAGE pShwPde = pgmPoolGetPage(pVM->pgm.s.CTX_SUFF(pPool), pPdpt->a[iPdPt].u & X86_PDPE_PG_MASK);
1162 const unsigned iPdPt = (GCPtr >> X86_PDPT_SHIFT) & X86_PDPT_MASK_AMD64;
1164 PX86PDPE pPdpe = &pPdpt->a[iPdPt];
1176 GCPdPt = (RTGCPTR64)iPdPt << X86_PDPT_SHIFT;
1187 pShwPage->idx, iPdPt, false /*fLockPage*/,
1236 const unsigned iPdPt = (GCPtr >> X86_PDPT_SHIFT) & X86_PDPT_MASK_AMD64;
1238 if (!pPdpt->a[iPdPt].n.u1Present)
1241 pShwPage = pgmPoolGetPage(pPool, pPdpt->a[iPdPt].u & X86_PDPE_PG_MASK);
1302 const unsigned iPdPt = (GCPtr >> EPT_PDPT_SHIFT) & EPT_PDPT_MASK;
1304 PEPTPDPTE pPdpe = &pPdpt->a[iPdPt];
1313 RTGCPTR64 GCPdPt = (RTGCPTR64)iPdPt << EPT_PDPT_SHIFT;
1315 pShwPage->idx, iPdPt, false /*fLockPage*/,