Lines Matching refs:pdm

24 #include <VBox/vmm/pdm.h>
57 Assert(pVM->pdm.s.Apic.CTX_SUFF(pDevIns));
58 Assert(pVM->pdm.s.Apic.CTX_SUFF(pfnGetInterrupt));
60 int i = pVM->pdm.s.Apic.CTX_SUFF(pfnGetInterrupt)(pVM->pdm.s.Apic.CTX_SUFF(pDevIns), pVCpu->idCpu, &uTagSrc);
77 Assert(pVM->pdm.s.Pic.CTX_SUFF(pDevIns));
78 Assert(pVM->pdm.s.Pic.CTX_SUFF(pfnGetInterrupt));
80 int i = pVM->pdm.s.Pic.CTX_SUFF(pfnGetInterrupt)(pVM->pdm.s.Pic.CTX_SUFF(pDevIns), &uTagSrc);
121 if (pVM->pdm.s.Pic.CTX_SUFF(pDevIns))
123 Assert(pVM->pdm.s.Pic.CTX_SUFF(pfnSetIrq));
124 pVM->pdm.s.Pic.CTX_SUFF(pfnSetIrq)(pVM->pdm.s.Pic.CTX_SUFF(pDevIns), u8Irq, u8Level, uTagSrc);
128 if (pVM->pdm.s.IoApic.CTX_SUFF(pDevIns))
130 Assert(pVM->pdm.s.IoApic.CTX_SUFF(pfnSetIrq));
144 pVM->pdm.s.IoApic.CTX_SUFF(pfnSetIrq)(pVM->pdm.s.IoApic.CTX_SUFF(pDevIns), u8Irq, u8Level, uTagSrc);
166 if (pVM->pdm.s.IoApic.CTX_SUFF(pDevIns))
168 Assert(pVM->pdm.s.IoApic.CTX_SUFF(pfnSetIrq));
170 pVM->pdm.s.IoApic.CTX_SUFF(pfnSetIrq)(pVM->pdm.s.IoApic.CTX_SUFF(pDevIns), u8Irq, u8Level, uTagSrc);
188 if (pVM->pdm.s.IoApic.CTX_SUFF(pDevIns))
190 Assert(pVM->pdm.s.IoApic.CTX_SUFF(pfnSendMsi));
192 pVM->pdm.s.IoApic.CTX_SUFF(pfnSendMsi)(pVM->pdm.s.IoApic.CTX_SUFF(pDevIns), GCAddr, uValue, uTagSrc);
209 return pVM->pdm.s.IoApic.CTX_SUFF(pDevIns) != NULL;
221 return pVM->pdm.s.Apic.CTX_SUFF(pDevIns) != NULL;
235 if (pVM->pdm.s.Apic.CTX_SUFF(pDevIns))
237 Assert(pVM->pdm.s.Apic.CTX_SUFF(pfnSetBase));
239 pVM->pdm.s.Apic.CTX_SUFF(pfnSetBase)(pVM->pdm.s.Apic.CTX_SUFF(pDevIns), pVCpu->idCpu, u64Base);
244 pCtx->msrApicBase = pVM->pdm.s.Apic.CTX_SUFF(pfnGetBase)(pVM->pdm.s.Apic.CTX_SUFF(pDevIns), pVCpu->idCpu);
266 if (pVM->pdm.s.Apic.CTX_SUFF(pDevIns))
268 Assert(pVM->pdm.s.Apic.CTX_SUFF(pfnGetBase));
270 *pu64Base = pVM->pdm.s.Apic.CTX_SUFF(pfnGetBase)(pVM->pdm.s.Apic.CTX_SUFF(pDevIns), pVCpu->idCpu);
289 if (pVM->pdm.s.Apic.CTX_SUFF(pDevIns))
291 Assert(pVM->pdm.s.Apic.CTX_SUFF(pfnSetTPR));
293 *pfPending = pVM->pdm.s.Apic.CTX_SUFF(pfnHasPendingIrq)(pVM->pdm.s.Apic.CTX_SUFF(pDevIns), pVCpu->idCpu,
312 if (pVM->pdm.s.Apic.CTX_SUFF(pDevIns))
314 Assert(pVM->pdm.s.Apic.CTX_SUFF(pfnSetTPR));
316 pVM->pdm.s.Apic.CTX_SUFF(pfnSetTPR)(pVM->pdm.s.Apic.CTX_SUFF(pDevIns), pVCpu->idCpu, u8TPR);
339 PPDMDEVINS pApicIns = pVM->pdm.s.Apic.CTX_SUFF(pDevIns);
347 Assert(pVM->pdm.s.Apic.CTX_SUFF(pfnGetTPR));
348 *pu8TPR = pVM->pdm.s.Apic.CTX_SUFF(pfnGetTPR)(pApicIns, pVCpu->idCpu);
350 *pfPending = pVM->pdm.s.Apic.CTX_SUFF(pfnHasPendingIrq)(pApicIns, pVCpu->idCpu, pu8PendingIrq);
369 if (pVM->pdm.s.Apic.CTX_SUFF(pDevIns))
371 AssertPtr(pVM->pdm.s.Apic.CTX_SUFF(pfnWriteMSR));
372 return pVM->pdm.s.Apic.CTX_SUFF(pfnWriteMSR)(pVM->pdm.s.Apic.CTX_SUFF(pDevIns), iCpu, u32Reg, u64Value);
389 if (pVM->pdm.s.Apic.CTX_SUFF(pDevIns))
391 AssertPtr(pVM->pdm.s.Apic.CTX_SUFF(pfnReadMSR));
392 int rc = pVM->pdm.s.Apic.CTX_SUFF(pfnReadMSR)(pVM->pdm.s.Apic.CTX_SUFF(pDevIns), iCpu, u32Reg, pu64Value);
408 if (pVM->pdm.s.Apic.CTX_SUFF(pDevIns))
410 AssertPtr(pVM->pdm.s.Apic.CTX_SUFF(pfnGetTimerFreq));
411 *pu64Value = pVM->pdm.s.Apic.CTX_SUFF(pfnGetTimerFreq)(pVM->pdm.s.Apic.CTX_SUFF(pDevIns));
427 int rc = PDMCritSectEnter(&pVM->pdm.s.CritSect, VERR_IGNORED);
429 int rc = PDMCritSectEnter(&pVM->pdm.s.CritSect, VERR_GENERAL_FAILURE);
447 return PDMCritSectEnter(&pVM->pdm.s.CritSect, rc);
458 PDMCritSectLeave(&pVM->pdm.s.CritSect);
473 if (RT_UNLIKELY((RTR3UINTPTR)pv - (RTR3UINTPTR)pVM->pdm.s.pvVMMDevHeap >= pVM->pdm.s.cbVMMDevHeap))
476 pv, pVM->pdm.s.pvVMMDevHeap, pVM->pdm.s.cbVMMDevHeap));
480 *pGCPhys = (pVM->pdm.s.GCPhysVMMDevHeap + ((RTR3UINTPTR)pv - (RTR3UINTPTR)pVM->pdm.s.pvVMMDevHeap));
492 return (pVM->pdm.s.pvVMMDevHeap != NULL);