Lines Matching refs:pCpu

579  * @param   pCpu        Disassembler CPU state.
583 static int iomInterpretMOVxXRead(PVM pVM, PVMCPU pVCpu, PCPUMCTXCORE pRegFrame, PDISCPUSTATE pCpu,
592 unsigned cb = DISGetParamSize(pCpu, &pCpu->Param2);
603 if (pCpu->pCurInstr->uOpcode == OP_MOVSX)
622 bool fRc = iomSaveDataToReg(pCpu, &pCpu->Param1, pRegFrame, u64Data);
640 * @param pCpu Disassembler CPU state.
644 static int iomInterpretMOVxXWrite(PVM pVM, PVMCPU pVCpu, PCPUMCTXCORE pRegFrame, PDISCPUSTATE pCpu,
655 bool fRc = iomGetRegImmData(pCpu, &pCpu->Param2, pRegFrame, &u64Data, &cb);
716 * @param pCpu Disassembler CPU state.
720 static int iomInterpretMOVS(PVM pVM, bool fWriteAccess, PCPUMCTXCORE pRegFrame, RTGCPHYS GCPhysFault, PDISCPUSTATE pCpu, PIOMMMIORANGE pRange,
726 if (pCpu->fPrefix & (DISPREFIX_SEG | DISPREFIX_REPNE))
735 if (pCpu->fPrefix & DISPREFIX_REP)
757 unsigned cb = DISGetParamSize(pCpu, &pCpu->Param1);
823 if (pCpu->fPrefix & DISPREFIX_REP)
931 if (pCpu->fPrefix & DISPREFIX_REP)
977 * @param pCpu Disassembler CPU state.
981 PDISCPUSTATE pCpu, PIOMMMIORANGE pRange)
986 if (pCpu->fPrefix & (DISPREFIX_SEG | DISPREFIX_REPNE))
992 uint64_t const fAddrMask = iomDisModeToMask((DISCPUMODE)pCpu->uAddrMode);
994 if (pCpu->fPrefix & DISPREFIX_REP)
1012 unsigned cb = DISGetParamSize(pCpu, &pCpu->Param1);
1041 if (pCpu->fPrefix & DISPREFIX_REP)
1056 if (pCpu->fPrefix & DISPREFIX_REP)
1083 if (pCpu->fPrefix & DISPREFIX_REP)
1111 * @param pCpu Disassembler CPU state.
1114 static int iomInterpretLODS(PVM pVM, PVMCPU pVCpu, PCPUMCTXCORE pRegFrame, RTGCPHYS GCPhysFault, PDISCPUSTATE pCpu,
1122 if (pCpu->fPrefix & (DISPREFIX_SEG | DISPREFIX_REP | DISPREFIX_REPNE))
1128 unsigned cb = DISGetParamSize(pCpu, &pCpu->Param2);
1138 uint64_t const fAddrMask = iomDisModeToMask((DISCPUMODE)pCpu->uAddrMode);
1164 * @param pCpu Disassembler CPU state.
1167 static int iomInterpretCMP(PVM pVM, PVMCPU pVCpu, PCPUMCTXCORE pRegFrame, RTGCPHYS GCPhysFault, PDISCPUSTATE pCpu,
1179 if (iomGetRegImmData(pCpu, &pCpu->Param1, pRegFrame, &uData1, &cb))
1182 else if (iomGetRegImmData(pCpu, &pCpu->Param2, pRegFrame, &uData2, &cb))
1224 * @param pCpu Disassembler CPU state.
1228 static int iomInterpretOrXorAnd(PVM pVM, PVMCPU pVCpu, PCPUMCTXCORE pRegFrame, RTGCPHYS GCPhysFault, PDISCPUSTATE pCpu,
1240 if (pCpu->pCurInstr->uOpcode == OP_XOR)
1242 else if (pCpu->pCurInstr->uOpcode == OP_OR)
1244 else if (pCpu->pCurInstr->uOpcode == OP_AND)
1250 if (iomGetRegImmData(pCpu, &pCpu->Param1, pRegFrame, &uData1, &cb))
1262 else if (iomGetRegImmData(pCpu, &pCpu->Param2, pRegFrame, &uData2, &cb))
1296 bool fRc = iomSaveDataToReg(pCpu, &pCpu->Param1, pRegFrame, uData1);
1325 * @param pCpu Disassembler CPU state.
1328 static int iomInterpretTEST(PVM pVM, PVMCPU pVCpu, PCPUMCTXCORE pRegFrame, RTGCPHYS GCPhysFault, PDISCPUSTATE pCpu,
1338 if (iomGetRegImmData(pCpu, &pCpu->Param1, pRegFrame, &uData1, &cb))
1343 else if (iomGetRegImmData(pCpu, &pCpu->Param2, pRegFrame, &uData2, &cb))
1385 * @param pCpu Disassembler CPU state.
1388 static int iomInterpretBT(PVM pVM, PVMCPU pVCpu, PCPUMCTXCORE pRegFrame, RTGCPHYS GCPhysFault, PDISCPUSTATE pCpu,
1397 if (!iomGetRegImmData(pCpu, &pCpu->Param2, pRegFrame, &uBit, &cbIgnored))
1403 unsigned cbData = DISGetParamSize(pCpu, &pCpu->Param1);
1430 * @param pCpu Disassembler CPU state.
1433 static int iomInterpretXCHG(PVM pVM, PVMCPU pVCpu, PCPUMCTXCORE pRegFrame, RTGCPHYS GCPhysFault, PDISCPUSTATE pCpu,
1445 if (iomGetRegImmData(pCpu, &pCpu->Param1, pRegFrame, &uData1, &cb))
1457 bool fRc = iomSaveDataToReg(pCpu, &pCpu->Param1, pRegFrame, uData2);
1466 else if (iomGetRegImmData(pCpu, &pCpu->Param2, pRegFrame, &uData2, &cb))
1477 bool fRc = iomSaveDataToReg(pCpu, &pCpu->Param2, pRegFrame, uData1);
2223 * @param pCpu Disassembler CPU state.
2225 VMMDECL(VBOXSTRICTRC) IOMInterpretINS(PVM pVM, PVMCPU pVCpu, PCPUMCTXCORE pRegFrame, PDISCPUSTATE pCpu)
2233 if (pCpu->pCurInstr->uOpcode == OP_INSB)
2236 cb = (pCpu->uOpMode == DISCPUMODE_16BIT) ? 2 : 4; /* dword in both 32 & 64 bits mode */
2245 return IOMInterpretINSEx(pVM, pVCpu, pRegFrame, Port, pCpu->fPrefix, (DISCPUMODE)pCpu->uAddrMode, cb);
2392 * @param pCpu Disassembler CPU state.
2394 VMMDECL(VBOXSTRICTRC) IOMInterpretOUTS(PVM pVM, PVMCPU pVCpu, PCPUMCTXCORE pRegFrame, PDISCPUSTATE pCpu)
2402 bool fRc = iomGetRegImmData(pCpu, &pCpu->Param1, pRegFrame, &Port, &cb);
2404 if (pCpu->pCurInstr->uOpcode == OP_OUTSB)
2407 cb = (pCpu->uOpMode == DISCPUMODE_16BIT) ? 2 : 4; /* dword in both 32 & 64 bits mode */
2416 return IOMInterpretOUTSEx(pVM, pVCpu, pRegFrame, Port, pCpu->fPrefix, (DISCPUMODE)pCpu->uAddrMode, cb);