Lines Matching defs:bRm
33 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
38 if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
47 IEM_MC_FETCH_GREG_U8(u8Src, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
48 IEM_MC_REF_GREG_U8(pu8Dst, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
69 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0);
71 IEM_MC_FETCH_GREG_U8(u8Src, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
95 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
100 if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
112 IEM_MC_FETCH_GREG_U16(u16Src, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
113 IEM_MC_REF_GREG_U16(pu16Dst, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
127 IEM_MC_FETCH_GREG_U32(u32Src, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
128 IEM_MC_REF_GREG_U32(pu32Dst, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
144 IEM_MC_FETCH_GREG_U64(u64Src, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
145 IEM_MC_REF_GREG_U64(pu64Dst, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
171 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0);
173 IEM_MC_FETCH_GREG_U16(u16Src, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
193 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0);
195 IEM_MC_FETCH_GREG_U32(u32Src, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
215 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0);
217 IEM_MC_FETCH_GREG_U64(u64Src, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
243 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
249 if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
256 IEM_MC_FETCH_GREG_U8(u8Src, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
257 IEM_MC_REF_GREG_U8(pu8Dst, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
275 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0);
277 IEM_MC_REF_GREG_U8(pu8Dst, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
296 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
302 if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
312 IEM_MC_FETCH_GREG_U16(u16Src, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
313 IEM_MC_REF_GREG_U16(pu16Dst, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
327 IEM_MC_FETCH_GREG_U32(u32Src, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
328 IEM_MC_REF_GREG_U32(pu32Dst, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
343 IEM_MC_FETCH_GREG_U64(u64Src, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
344 IEM_MC_REF_GREG_U64(pu64Dst, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
367 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0);
369 IEM_MC_REF_GREG_U16(pu16Dst, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
384 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0);
386 IEM_MC_REF_GREG_U32(pu32Dst, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
402 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0);
404 IEM_MC_REF_GREG_U64(pu64Dst, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
540 FNIEMOP_DEF_1(iemOp_Grp6_sldt, uint8_t, bRm)
545 if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
554 IEM_MC_STORE_GREG_U16((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, u16Ldtr);
563 IEM_MC_STORE_GREG_U32((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, u32Ldtr);
572 IEM_MC_STORE_GREG_U64((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, u64Ldtr);
585 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0);
597 FNIEMOP_DEF_1(iemOp_Grp6_str, uint8_t, bRm)
602 if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
611 IEM_MC_STORE_GREG_U16((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, u16Tr);
620 IEM_MC_STORE_GREG_U32((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, u32Tr);
629 IEM_MC_STORE_GREG_U64((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, u64Tr);
642 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0);
654 FNIEMOP_DEF_1(iemOp_Grp6_lldt, uint8_t, bRm)
659 if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
664 IEM_MC_FETCH_GREG_U16(u16Sel, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
673 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0);
685 FNIEMOP_DEF_1(iemOp_Grp6_ltr, uint8_t, bRm)
690 if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
695 IEM_MC_FETCH_GREG_U16(u16Sel, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
704 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0);
716 FNIEMOP_DEF_2(iemOpCommonGrp6VerX, uint8_t, bRm, bool, fWrite)
720 if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
726 IEM_MC_FETCH_GREG_U16(u16Sel, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
736 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0);
747 FNIEMOP_DEF_1(iemOp_Grp6_verr, uint8_t, bRm)
750 return FNIEMOP_CALL_2(iemOpCommonGrp6VerX, bRm, false);
755 FNIEMOP_DEF_1(iemOp_Grp6_verw, uint8_t, bRm)
758 return FNIEMOP_CALL_2(iemOpCommonGrp6VerX, bRm, true);
765 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
766 switch ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK)
768 case 0: return FNIEMOP_CALL_1(iemOp_Grp6_sldt, bRm);
769 case 1: return FNIEMOP_CALL_1(iemOp_Grp6_str, bRm);
770 case 2: return FNIEMOP_CALL_1(iemOp_Grp6_lldt, bRm);
771 case 3: return FNIEMOP_CALL_1(iemOp_Grp6_ltr, bRm);
772 case 4: return FNIEMOP_CALL_1(iemOp_Grp6_verr, bRm);
773 case 5: return FNIEMOP_CALL_1(iemOp_Grp6_verw, bRm);
783 FNIEMOP_DEF_1(iemOp_Grp7_sgdt, uint8_t, bRm)
791 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0);
833 FNIEMOP_DEF_1(iemOp_Grp7_sidt, uint8_t, bRm)
841 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0);
869 FNIEMOP_DEF_1(iemOp_Grp7_lgdt, uint8_t, bRm)
877 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0);
913 FNIEMOP_DEF_1(iemOp_Grp7_lidt, uint8_t, bRm)
922 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0);
956 FNIEMOP_DEF_1(iemOp_Grp7_smsw, uint8_t, bRm)
960 if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
968 IEM_MC_STORE_GREG_U16((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, u16Tmp);
977 IEM_MC_STORE_GREG_U32((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, u32Tmp);
986 IEM_MC_STORE_GREG_U64((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, u64Tmp);
1000 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0);
1011 FNIEMOP_DEF_1(iemOp_Grp7_lmsw, uint8_t, bRm)
1017 if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
1021 IEM_MC_FETCH_GREG_U16(u16Tmp, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
1030 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0);
1040 FNIEMOP_DEF_1(iemOp_Grp7_invlpg, uint8_t, bRm)
1046 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0);
1075 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
1076 switch ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK)
1079 if ((bRm & X86_MODRM_MOD_MASK) != (3 << X86_MODRM_MOD_SHIFT))
1080 return FNIEMOP_CALL_1(iemOp_Grp7_sgdt, bRm);
1081 switch (bRm & X86_MODRM_RM_MASK)
1091 if ((bRm & X86_MODRM_MOD_MASK) != (3 << X86_MODRM_MOD_SHIFT))
1092 return FNIEMOP_CALL_1(iemOp_Grp7_sidt, bRm);
1093 switch (bRm & X86_MODRM_RM_MASK)
1101 if ((bRm & X86_MODRM_MOD_MASK) != (3 << X86_MODRM_MOD_SHIFT))
1102 return FNIEMOP_CALL_1(iemOp_Grp7_lgdt, bRm);
1103 switch (bRm & X86_MODRM_RM_MASK)
1111 if ((bRm & X86_MODRM_MOD_MASK) != (3 << X86_MODRM_MOD_SHIFT))
1112 return FNIEMOP_CALL_1(iemOp_Grp7_lidt, bRm);
1113 switch (bRm & X86_MODRM_RM_MASK)
1127 return FNIEMOP_CALL_1(iemOp_Grp7_smsw, bRm);
1133 return FNIEMOP_CALL_1(iemOp_Grp7_lmsw, bRm);
1136 if ((bRm & X86_MODRM_MOD_MASK) != (3 << X86_MODRM_MOD_SHIFT))
1137 return FNIEMOP_CALL_1(iemOp_Grp7_invlpg, bRm);
1138 switch (bRm & X86_MODRM_RM_MASK)
1153 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
1155 if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
1168 IEM_MC_REF_GREG_U16(pu16Dst, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
1169 IEM_MC_FETCH_GREG_U16(u16Sel, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
1186 IEM_MC_REF_GREG_U64(pu64Dst, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
1187 IEM_MC_FETCH_GREG_U16(u16Sel, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
1211 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0);
1215 IEM_MC_REF_GREG_U16(pu16Dst, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
1233 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0);
1238 IEM_MC_REF_GREG_U64(pu64Dst, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
1326 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
1327 if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
1334 switch ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK)
1349 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0);
1498 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
1499 if ((bRm & X86_MODRM_MOD_MASK) != (3 << X86_MODRM_MOD_SHIFT))
1502 switch ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK)
1517 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0);
1532 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
1533 if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
1543 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0);
1562 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
1563 uint8_t iCrReg = ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg;
1580 return IEM_MC_DEFER_TO_CIMPL_2(iemCImpl_mov_Rd_Cd, (X86_MODRM_RM_MASK & bRm) | pIemCpu->uRexB, iCrReg);
1588 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
1593 (X86_MODRM_RM_MASK & bRm) | pIemCpu->uRexB,
1594 ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK));
1608 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
1609 uint8_t iCrReg = ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg;
1626 return IEM_MC_DEFER_TO_CIMPL_2(iemCImpl_mov_Cd_Rd, iCrReg, (X86_MODRM_RM_MASK & bRm) | pIemCpu->uRexB);
1634 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
1639 ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK),
1640 (X86_MODRM_RM_MASK & bRm) | pIemCpu->uRexB);
1731 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm); \
1732 if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT)) \
1740 IEM_MC_FETCH_GREG_U16(u16Tmp, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB); \
1741 IEM_MC_STORE_GREG_U16(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u16Tmp); \
1751 IEM_MC_FETCH_GREG_U32(u32Tmp, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB); \
1752 IEM_MC_STORE_GREG_U32(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u32Tmp); \
1754 IEM_MC_CLEAR_HIGH_GREG_U64(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg); \
1764 IEM_MC_FETCH_GREG_U64(u64Tmp, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB); \
1765 IEM_MC_STORE_GREG_U64(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u64Tmp); \
1782 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0); \
1785 IEM_MC_STORE_GREG_U16(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u16Tmp); \
1795 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0); \
1798 IEM_MC_STORE_GREG_U32(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u32Tmp); \
1800 IEM_MC_CLEAR_HIGH_GREG_U64(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg); \
1810 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0); \
1813 IEM_MC_STORE_GREG_U64(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u64Tmp); \
2001 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
2005 if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
2015 IEM_MC_REF_XREG_U128(pDst, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
2016 IEM_MC_REF_XREG_U64_CONST(pSrc, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
2032 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0);
2037 IEM_MC_REF_XREG_U128(pDst, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
2048 if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
2060 IEM_MC_REF_MREG_U64(pDst, (bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK);
2061 IEM_MC_REF_MREG_U32_CONST(pSrc, bRm & X86_MODRM_RM_MASK);
2077 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0);
2082 IEM_MC_REF_MREG_U64(pDst, (bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK);
2145 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
2149 if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
2159 IEM_MC_REF_XREG_U128(pDst, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
2160 IEM_MC_REF_XREG_U128_CONST(pSrc, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
2176 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0);
2181 IEM_MC_REF_XREG_U128(pDst, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
2192 if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
2204 IEM_MC_REF_MREG_U64(pDst, (bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK);
2205 IEM_MC_REF_MREG_U64_CONST(pSrc, bRm & X86_MODRM_RM_MASK);
2221 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0);
2226 IEM_MC_REF_MREG_U64(pDst, (bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK);
2286 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
2291 if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
2300 IEM_MC_FETCH_GREG_U64(u64Tmp, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
2301 IEM_MC_STORE_XREG_U64_ZX_U128(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u64Tmp);
2306 IEM_MC_FETCH_GREG_U32(u32Tmp, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
2307 IEM_MC_STORE_XREG_U32_ZX_U128(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u32Tmp);
2318 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 1);
2324 IEM_MC_STORE_XREG_U64_ZX_U128(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u64Tmp);
2330 IEM_MC_STORE_XREG_U32_ZX_U128(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u32Tmp);
2339 if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
2347 IEM_MC_FETCH_GREG_U64(u64Tmp, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
2349 IEM_MC_FETCH_GREG_U32_ZX_U64(u64Tmp, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
2350 IEM_MC_STORE_MREG_U64((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK, u64Tmp);
2360 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 1);
2366 IEM_MC_STORE_MREG_U64((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK, u64Tmp);
2372 IEM_MC_STORE_MREG_U32_ZX_U64((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK, u32Tmp);
2389 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
2399 if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
2408 IEM_MC_FETCH_XREG_U128(u128Tmp, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
2409 IEM_MC_STORE_XREG_U128(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u128Tmp);
2422 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0);
2429 IEM_MC_STORE_XREG_U128(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u128Tmp);
2438 if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
2449 IEM_MC_FETCH_MREG_U64(u64Tmp, bRm & X86_MODRM_RM_MASK);
2450 IEM_MC_STORE_MREG_U64((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK, u64Tmp);
2463 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0);
2467 IEM_MC_STORE_MREG_U64((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK, u64Tmp);
2483 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
2507 if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
2520 IEM_MC_REF_XREG_U128(pDst, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
2521 IEM_MC_REF_XREG_U128_CONST(pSrc, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
2537 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0);
2544 IEM_MC_REF_XREG_U128(pDst, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
2555 if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
2568 IEM_MC_REF_MREG_U64(pDst, (bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK);
2569 IEM_MC_REF_MREG_U64_CONST(pSrc, bRm & X86_MODRM_RM_MASK);
2585 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0);
2592 IEM_MC_REF_MREG_U64(pDst, (bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK);
2607 FNIEMOP_STUB_1(iemOp_Grp12_psrlw_Nq_Ib, uint8_t, bRm);
2610 FNIEMOP_STUB_1(iemOp_Grp12_psrlw_Udq_Ib, uint8_t, bRm);
2613 FNIEMOP_STUB_1(iemOp_Grp12_psraw_Nq_Ib, uint8_t, bRm);
2616 FNIEMOP_STUB_1(iemOp_Grp12_psraw_Udq_Ib, uint8_t, bRm);
2619 FNIEMOP_STUB_1(iemOp_Grp12_psllw_Nq_Ib, uint8_t, bRm);
2622 FNIEMOP_STUB_1(iemOp_Grp12_psllw_Udq_Ib, uint8_t, bRm);
2628 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
2629 if ((bRm & X86_MODRM_MOD_MASK) != (3 << X86_MODRM_MOD_SHIFT))
2631 switch ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK)
2638 case 0: return FNIEMOP_CALL_1(iemOp_Grp12_psrlw_Nq_Ib, bRm);
2639 case IEM_OP_PRF_SIZE_OP: return FNIEMOP_CALL_1(iemOp_Grp12_psrlw_Udq_Ib, bRm);
2645 case 0: return FNIEMOP_CALL_1(iemOp_Grp12_psraw_Nq_Ib, bRm);
2646 case IEM_OP_PRF_SIZE_OP: return FNIEMOP_CALL_1(iemOp_Grp12_psraw_Udq_Ib, bRm);
2652 case 0: return FNIEMOP_CALL_1(iemOp_Grp12_psllw_Nq_Ib, bRm);
2653 case IEM_OP_PRF_SIZE_OP: return FNIEMOP_CALL_1(iemOp_Grp12_psllw_Udq_Ib, bRm);
2662 FNIEMOP_STUB_1(iemOp_Grp13_psrld_Nq_Ib, uint8_t, bRm);
2665 FNIEMOP_STUB_1(iemOp_Grp13_psrld_Udq_Ib, uint8_t, bRm);
2668 FNIEMOP_STUB_1(iemOp_Grp13_psrad_Nq_Ib, uint8_t, bRm);
2671 FNIEMOP_STUB_1(iemOp_Grp13_psrad_Udq_Ib, uint8_t, bRm);
2674 FNIEMOP_STUB_1(iemOp_Grp13_pslld_Nq_Ib, uint8_t, bRm);
2677 FNIEMOP_STUB_1(iemOp_Grp13_pslld_Udq_Ib, uint8_t, bRm);
2683 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
2684 if ((bRm & X86_MODRM_MOD_MASK) != (3 << X86_MODRM_MOD_SHIFT))
2686 switch ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK)
2693 case 0: return FNIEMOP_CALL_1(iemOp_Grp13_psrld_Nq_Ib, bRm);
2694 case IEM_OP_PRF_SIZE_OP: return FNIEMOP_CALL_1(iemOp_Grp13_psrld_Udq_Ib, bRm);
2700 case 0: return FNIEMOP_CALL_1(iemOp_Grp13_psrad_Nq_Ib, bRm);
2701 case IEM_OP_PRF_SIZE_OP: return FNIEMOP_CALL_1(iemOp_Grp13_psrad_Udq_Ib, bRm);
2707 case 0: return FNIEMOP_CALL_1(iemOp_Grp13_pslld_Nq_Ib, bRm);
2708 case IEM_OP_PRF_SIZE_OP: return FNIEMOP_CALL_1(iemOp_Grp13_pslld_Udq_Ib, bRm);
2717 FNIEMOP_STUB_1(iemOp_Grp14_psrlq_Nq_Ib, uint8_t, bRm);
2720 FNIEMOP_STUB_1(iemOp_Grp14_psrlq_Udq_Ib, uint8_t, bRm);
2723 FNIEMOP_STUB_1(iemOp_Grp14_psrldq_Udq_Ib, uint8_t, bRm); //NEXT
2726 FNIEMOP_STUB_1(iemOp_Grp14_psllq_Nq_Ib, uint8_t, bRm);
2729 FNIEMOP_STUB_1(iemOp_Grp14_psllq_Udq_Ib, uint8_t, bRm);
2732 FNIEMOP_STUB_1(iemOp_Grp14_pslldq_Udq_Ib, uint8_t, bRm); //NEXT
2738 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
2739 if ((bRm & X86_MODRM_MOD_MASK) != (3 << X86_MODRM_MOD_SHIFT))
2741 switch ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK)
2748 case 0: return FNIEMOP_CALL_1(iemOp_Grp14_psrlq_Nq_Ib, bRm);
2749 case IEM_OP_PRF_SIZE_OP: return FNIEMOP_CALL_1(iemOp_Grp14_psrlq_Udq_Ib, bRm);
2755 case IEM_OP_PRF_SIZE_OP: return FNIEMOP_CALL_1(iemOp_Grp14_psrldq_Udq_Ib, bRm);
2761 case 0: return FNIEMOP_CALL_1(iemOp_Grp14_psllq_Nq_Ib, bRm);
2762 case IEM_OP_PRF_SIZE_OP: return FNIEMOP_CALL_1(iemOp_Grp14_psllq_Udq_Ib, bRm);
2768 case IEM_OP_PRF_SIZE_OP: return FNIEMOP_CALL_1(iemOp_Grp14_pslldq_Udq_Ib, bRm);
2786 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
2790 if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
2800 IEM_MC_REF_XREG_U128(pDst, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
2801 IEM_MC_REF_XREG_U128_CONST(pSrc, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
2817 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0);
2822 IEM_MC_REF_XREG_U128(pDst, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
2831 if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
2843 IEM_MC_REF_MREG_U64(pDst, (bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK);
2844 IEM_MC_REF_MREG_U64_CONST(pSrc, bRm & X86_MODRM_RM_MASK);
2860 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0);
2865 IEM_MC_REF_MREG_U64(pDst, (bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK);
2918 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
2923 if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
2932 IEM_MC_FETCH_XREG_U64(u64Tmp, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
2933 IEM_MC_STORE_GREG_U64((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, u64Tmp);
2938 IEM_MC_FETCH_XREG_U32(u32Tmp, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
2939 IEM_MC_STORE_GREG_U32((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, u32Tmp);
2950 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 1);
2955 IEM_MC_FETCH_XREG_U64(u64Tmp, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
2961 IEM_MC_FETCH_XREG_U32(u32Tmp, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
2971 if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
2980 IEM_MC_FETCH_MREG_U64(u64Tmp, (bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK);
2981 IEM_MC_STORE_GREG_U64((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, u64Tmp);
2986 IEM_MC_FETCH_MREG_U32(u32Tmp, (bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK);
2987 IEM_MC_STORE_GREG_U32((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, u32Tmp);
2998 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 1);
3003 IEM_MC_FETCH_MREG_U64(u64Tmp, (bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK);
3009 IEM_MC_FETCH_MREG_U32(u32Tmp, (bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK);
3026 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
3037 if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
3046 IEM_MC_FETCH_XREG_U128(u128Tmp, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
3047 IEM_MC_STORE_XREG_U128((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, u128Tmp);
3060 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0);
3063 IEM_MC_FETCH_XREG_U128(u128Tmp, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
3077 if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
3088 IEM_MC_FETCH_MREG_U64(u64Tmp, (bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK);
3089 IEM_MC_STORE_MREG_U64(bRm & X86_MODRM_RM_MASK, u64Tmp);
3102 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0);
3105 IEM_MC_FETCH_MREG_U64(u64Tmp, (bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK);
3684 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
3690 if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
3695 IEM_MC_STORE_GREG_U8_CONST((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, 1);
3697 IEM_MC_STORE_GREG_U8_CONST((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, 0);
3707 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0);
3724 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
3730 if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
3735 IEM_MC_STORE_GREG_U8_CONST((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, 0);
3737 IEM_MC_STORE_GREG_U8_CONST((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, 1);
3747 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0);
3764 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
3770 if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
3775 IEM_MC_STORE_GREG_U8_CONST((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, 1);
3777 IEM_MC_STORE_GREG_U8_CONST((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, 0);
3787 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0);
3804 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
3810 if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
3815 IEM_MC_STORE_GREG_U8_CONST((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, 0);
3817 IEM_MC_STORE_GREG_U8_CONST((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, 1);
3827 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0);
3844 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
3850 if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
3855 IEM_MC_STORE_GREG_U8_CONST((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, 1);
3857 IEM_MC_STORE_GREG_U8_CONST((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, 0);
3867 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0);
3884 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
3890 if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
3895 IEM_MC_STORE_GREG_U8_CONST((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, 0);
3897 IEM_MC_STORE_GREG_U8_CONST((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, 1);
3907 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0);
3924 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
3930 if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
3935 IEM_MC_STORE_GREG_U8_CONST((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, 1);
3937 IEM_MC_STORE_GREG_U8_CONST((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, 0);
3947 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0);
3964 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
3970 if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
3975 IEM_MC_STORE_GREG_U8_CONST((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, 0);
3977 IEM_MC_STORE_GREG_U8_CONST((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, 1);
3987 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0);
4004 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
4010 if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
4015 IEM_MC_STORE_GREG_U8_CONST((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, 1);
4017 IEM_MC_STORE_GREG_U8_CONST((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, 0);
4027 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0);
4044 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
4050 if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
4055 IEM_MC_STORE_GREG_U8_CONST((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, 0);
4057 IEM_MC_STORE_GREG_U8_CONST((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, 1);
4067 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0);
4084 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
4090 if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
4095 IEM_MC_STORE_GREG_U8_CONST((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, 1);
4097 IEM_MC_STORE_GREG_U8_CONST((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, 0);
4107 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0);
4124 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
4130 if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
4135 IEM_MC_STORE_GREG_U8_CONST((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, 0);
4137 IEM_MC_STORE_GREG_U8_CONST((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, 1);
4147 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0);
4164 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
4170 if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
4175 IEM_MC_STORE_GREG_U8_CONST((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, 1);
4177 IEM_MC_STORE_GREG_U8_CONST((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, 0);
4187 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0);
4204 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
4210 if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
4215 IEM_MC_STORE_GREG_U8_CONST((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, 0);
4217 IEM_MC_STORE_GREG_U8_CONST((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, 1);
4227 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0);
4244 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
4250 if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
4255 IEM_MC_STORE_GREG_U8_CONST((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, 1);
4257 IEM_MC_STORE_GREG_U8_CONST((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, 0);
4267 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0);
4284 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
4290 if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
4295 IEM_MC_STORE_GREG_U8_CONST((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, 0);
4297 IEM_MC_STORE_GREG_U8_CONST((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, 1);
4307 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0);
4397 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
4400 if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
4412 IEM_MC_FETCH_GREG_U16(u16Src, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
4414 IEM_MC_REF_GREG_U16(pu16Dst, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
4428 IEM_MC_FETCH_GREG_U32(u32Src, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
4430 IEM_MC_REF_GREG_U32(pu32Dst, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
4445 IEM_MC_FETCH_GREG_U64(u64Src, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
4447 IEM_MC_REF_GREG_U64(pu64Dst, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
4484 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0);
4485 IEM_MC_FETCH_GREG_U16(u16Src, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
4513 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0);
4514 IEM_MC_FETCH_GREG_U32(u32Src, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
4542 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0);
4543 IEM_MC_FETCH_GREG_U64(u64Src, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
4582 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
4586 if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
4600 IEM_MC_FETCH_GREG_U16(u16Src, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
4601 IEM_MC_REF_GREG_U16(pu16Dst, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
4616 IEM_MC_FETCH_GREG_U32(u32Src, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
4617 IEM_MC_REF_GREG_U32(pu32Dst, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
4633 IEM_MC_FETCH_GREG_U64(u64Src, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
4634 IEM_MC_REF_GREG_U64(pu64Dst, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
4659 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 1);
4662 IEM_MC_FETCH_GREG_U16(u16Src, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
4681 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 1);
4684 IEM_MC_FETCH_GREG_U32(u32Src, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
4703 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 1);
4706 IEM_MC_FETCH_GREG_U64(u64Src, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
4728 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
4732 if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
4745 IEM_MC_FETCH_GREG_U16(u16Src, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
4746 IEM_MC_REF_GREG_U16(pu16Dst, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
4762 IEM_MC_FETCH_GREG_U32(u32Src, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
4763 IEM_MC_REF_GREG_U32(pu32Dst, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
4780 IEM_MC_FETCH_GREG_U64(u64Src, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
4781 IEM_MC_REF_GREG_U64(pu64Dst, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
4807 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0);
4808 IEM_MC_FETCH_GREG_U16(u16Src, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
4828 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0);
4829 IEM_MC_FETCH_GREG_U32(u32Src, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
4849 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0);
4850 IEM_MC_FETCH_GREG_U64(u64Src, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
4932 FNIEMOP_DEF_1(iemOp_Grp15_fxsave, uint8_t, bRm)
4942 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEff, bRm, 0);
4952 FNIEMOP_DEF_1(iemOp_Grp15_fxrstor, uint8_t, bRm)
4962 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEff, bRm, 0);
4972 FNIEMOP_STUB_1(iemOp_Grp15_ldmxcsr, uint8_t, bRm);
4975 FNIEMOP_STUB_1(iemOp_Grp15_stmxcsr, uint8_t, bRm);
4978 FNIEMOP_UD_STUB_1(iemOp_Grp15_xsave, uint8_t, bRm);
4981 FNIEMOP_UD_STUB_1(iemOp_Grp15_xrstor, uint8_t, bRm);
4984 FNIEMOP_UD_STUB_1(iemOp_Grp15_xsaveopt, uint8_t, bRm);
4987 FNIEMOP_STUB_1(iemOp_Grp15_clflush, uint8_t, bRm);
4991 FNIEMOP_DEF_1(iemOp_Grp15_lfence, uint8_t, bRm)
5010 FNIEMOP_DEF_1(iemOp_Grp15_mfence, uint8_t, bRm)
5029 FNIEMOP_DEF_1(iemOp_Grp15_sfence, uint8_t, bRm)
5048 FNIEMOP_UD_STUB_1(iemOp_Grp15_rdfsbase, uint8_t, bRm);
5051 FNIEMOP_UD_STUB_1(iemOp_Grp15_rdgsbase, uint8_t, bRm);
5054 FNIEMOP_UD_STUB_1(iemOp_Grp15_wrfsbase, uint8_t, bRm);
5057 FNIEMOP_UD_STUB_1(iemOp_Grp15_wrgsbase, uint8_t, bRm);
5063 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
5064 if ((bRm & X86_MODRM_MOD_MASK) != (3 << X86_MODRM_MOD_SHIFT))
5066 switch ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK)
5068 case 0: return FNIEMOP_CALL_1(iemOp_Grp15_fxsave, bRm);
5069 case 1: return FNIEMOP_CALL_1(iemOp_Grp15_fxrstor, bRm);
5070 case 2: return FNIEMOP_CALL_1(iemOp_Grp15_ldmxcsr, bRm);
5071 case 3: return FNIEMOP_CALL_1(iemOp_Grp15_stmxcsr, bRm);
5072 case 4: return FNIEMOP_CALL_1(iemOp_Grp15_xsave, bRm);
5073 case 5: return FNIEMOP_CALL_1(iemOp_Grp15_xrstor, bRm);
5074 case 6: return FNIEMOP_CALL_1(iemOp_Grp15_xsaveopt,bRm);
5075 case 7: return FNIEMOP_CALL_1(iemOp_Grp15_clflush, bRm);
5084 switch ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK)
5091 case 5: return FNIEMOP_CALL_1(iemOp_Grp15_lfence, bRm);
5092 case 6: return FNIEMOP_CALL_1(iemOp_Grp15_mfence, bRm);
5093 case 7: return FNIEMOP_CALL_1(iemOp_Grp15_sfence, bRm);
5099 switch ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK)
5101 case 0: return FNIEMOP_CALL_1(iemOp_Grp15_rdfsbase, bRm);
5102 case 1: return FNIEMOP_CALL_1(iemOp_Grp15_rdgsbase, bRm);
5103 case 2: return FNIEMOP_CALL_1(iemOp_Grp15_wrfsbase, bRm);
5104 case 3: return FNIEMOP_CALL_1(iemOp_Grp15_wrgsbase, bRm);
5133 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
5135 if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
5144 IEM_MC_FETCH_GREG_U8(u8Src, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
5145 IEM_MC_REF_GREG_U8(pu8Dst, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
5166 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0);
5169 IEM_MC_FETCH_GREG_U8(u8Src, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
5191 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
5193 if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
5205 IEM_MC_FETCH_GREG_U16(u16Src, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
5206 IEM_MC_REF_GREG_U16(pu16Dst, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
5225 IEM_MC_FETCH_GREG_U32(u32Src, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
5226 IEM_MC_REF_GREG_U32(pu32Dst, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
5251 IEM_MC_REF_GREG_U64(pu64Dst, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
5255 IEM_MC_REF_GREG_U64(pu64Src, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
5261 IEM_MC_FETCH_GREG_U64(u64Src, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
5288 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0);
5291 IEM_MC_FETCH_GREG_U16(u16Src, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
5316 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0);
5319 IEM_MC_FETCH_GREG_U32(u32Src, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
5348 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0);
5355 IEM_MC_REF_GREG_U64(pu64Src, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
5361 IEM_MC_FETCH_GREG_U64(u64Src, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
5381 FNIEMOP_DEF_2(iemOpCommonLoadSRegAndGreg, uint8_t, iSegReg, uint8_t, bRm)
5383 Assert((bRm & X86_MODRM_MOD_MASK) != (3 << X86_MODRM_MOD_SHIFT)); /* Caller checks this */
5384 uint8_t const iGReg = ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg;
5396 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEff, bRm, 0);
5412 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEff, bRm, 0);
5428 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEff, bRm, 0);
5448 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
5449 if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
5451 return FNIEMOP_CALL_2(iemOpCommonLoadSRegAndGreg, X86_SREG_SS, bRm);
5467 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
5468 if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
5470 return FNIEMOP_CALL_2(iemOpCommonLoadSRegAndGreg, X86_SREG_FS, bRm);
5478 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
5479 if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
5481 return FNIEMOP_CALL_2(iemOpCommonLoadSRegAndGreg, X86_SREG_GS, bRm);
5490 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
5496 if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
5503 IEM_MC_FETCH_GREG_U8_ZX_U16(u16Value, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
5504 IEM_MC_STORE_GREG_U16(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u16Value);
5512 IEM_MC_FETCH_GREG_U8_ZX_U32(u32Value, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
5513 IEM_MC_STORE_GREG_U32(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u32Value);
5521 IEM_MC_FETCH_GREG_U8_ZX_U64(u64Value, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
5522 IEM_MC_STORE_GREG_U64(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u64Value);
5541 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0);
5543 IEM_MC_STORE_GREG_U16(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u16Value);
5552 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0);
5554 IEM_MC_STORE_GREG_U32(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u32Value);
5563 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0);
5565 IEM_MC_STORE_GREG_U64(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u64Value);
5581 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
5590 if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
5596 IEM_MC_FETCH_GREG_U16_ZX_U32(u32Value, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
5597 IEM_MC_STORE_GREG_U32(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u32Value);
5605 IEM_MC_FETCH_GREG_U16_ZX_U64(u64Value, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
5606 IEM_MC_STORE_GREG_U64(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u64Value);
5621 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0);
5623 IEM_MC_STORE_GREG_U32(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u32Value);
5632 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0);
5634 IEM_MC_STORE_GREG_U64(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u64Value);
5658 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
5660 switch ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK)
5672 if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
5686 IEM_MC_REF_GREG_U16(pu16Dst, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
5700 IEM_MC_REF_GREG_U32(pu32Dst, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
5715 IEM_MC_REF_GREG_U64(pu64Dst, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
5749 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 1);
5772 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 1);
5795 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 1);
5849 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
5855 if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
5862 IEM_MC_FETCH_GREG_U8_SX_U16(u16Value, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
5863 IEM_MC_STORE_GREG_U16(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u16Value);
5871 IEM_MC_FETCH_GREG_U8_SX_U32(u32Value, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
5872 IEM_MC_STORE_GREG_U32(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u32Value);
5880 IEM_MC_FETCH_GREG_U8_SX_U64(u64Value, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
5881 IEM_MC_STORE_GREG_U64(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u64Value);
5900 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0);
5902 IEM_MC_STORE_GREG_U16(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u16Value);
5911 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0);
5913 IEM_MC_STORE_GREG_U32(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u32Value);
5922 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0);
5924 IEM_MC_STORE_GREG_U64(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u64Value);
5940 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
5949 if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
5955 IEM_MC_FETCH_GREG_U16_SX_U32(u32Value, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
5956 IEM_MC_STORE_GREG_U32(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u32Value);
5964 IEM_MC_FETCH_GREG_U16_SX_U64(u64Value, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
5965 IEM_MC_STORE_GREG_U64(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u64Value);
5980 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0);
5982 IEM_MC_STORE_GREG_U32(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u32Value);
5991 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0);
5993 IEM_MC_STORE_GREG_U64(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u64Value);
6005 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
6011 if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
6020 IEM_MC_REF_GREG_U8(pu8Dst, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
6021 IEM_MC_REF_GREG_U8(pu8Reg, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
6040 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0);
6042 IEM_MC_FETCH_GREG_U8(u8RegCopy, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
6052 IEM_MC_STORE_GREG_U8(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u8RegCopy);
6065 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
6070 if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
6082 IEM_MC_REF_GREG_U16(pu16Dst, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
6083 IEM_MC_REF_GREG_U16(pu16Reg, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
6097 IEM_MC_REF_GREG_U32(pu32Dst, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
6098 IEM_MC_REF_GREG_U32(pu32Reg, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
6114 IEM_MC_REF_GREG_U64(pu64Dst, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
6115 IEM_MC_REF_GREG_U64(pu64Reg, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
6141 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0);
6143 IEM_MC_FETCH_GREG_U16(u16RegCopy, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
6153 IEM_MC_STORE_GREG_U16(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u16RegCopy);
6166 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0);
6168 IEM_MC_FETCH_GREG_U32(u32RegCopy, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
6178 IEM_MC_STORE_GREG_U32(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u32RegCopy);
6191 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0);
6193 IEM_MC_FETCH_GREG_U64(u64RegCopy, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
6203 IEM_MC_STORE_GREG_U64(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u64RegCopy);
6230 FNIEMOP_DEF_1(iemOp_Grp9_cmpxchg8b_Mq, uint8_t, bRm)
6243 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0);
6276 FNIEMOP_UD_STUB_1(iemOp_Grp9_cmpxchg16b_Mdq, uint8_t, bRm);
6279 FNIEMOP_UD_STUB_1(iemOp_Grp9_rdrand_Rv, uint8_t, bRm);
6282 FNIEMOP_UD_STUB_1(iemOp_Grp9_vmptrld_Mq, uint8_t, bRm);
6285 FNIEMOP_UD_STUB_1(iemOp_Grp9_vmclear_Mq, uint8_t, bRm);
6288 FNIEMOP_UD_STUB_1(iemOp_Grp9_vmxon_Mq, uint8_t, bRm);
6291 FNIEMOP_UD_STUB_1(iemOp_Grp9_vmptrst_Mq, uint8_t, bRm);
6298 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
6299 switch ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK)
6305 if ( (bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT)
6308 if (bRm & IEM_OP_PRF_SIZE_REX_W)
6309 return FNIEMOP_CALL_1(iemOp_Grp9_cmpxchg16b_Mdq, bRm);
6310 return FNIEMOP_CALL_1(iemOp_Grp9_cmpxchg8b_Mq, bRm);
6312 if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
6313 return FNIEMOP_CALL_1(iemOp_Grp9_rdrand_Rv, bRm);
6317 return FNIEMOP_CALL_1(iemOp_Grp9_vmptrld_Mq, bRm);
6319 return FNIEMOP_CALL_1(iemOp_Grp9_vmclear_Mq, bRm);
6321 return FNIEMOP_CALL_1(iemOp_Grp9_vmxon_Mq, bRm);
6330 return FNIEMOP_CALL_1(iemOp_Grp9_vmptrst_Mq, bRm);
6468 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
6469 if ((bRm & X86_MODRM_MOD_MASK) != (3 << X86_MODRM_MOD_SHIFT)) /** @todo test that this is registers only. */
6486 IEM_MC_REF_GREG_U64(pDst, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
6487 IEM_MC_REF_XREG_U128_CONST(pSrc, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
6500 IEM_MC_REF_GREG_U64(pDst, (bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK);
6501 IEM_MC_REF_MREG_U64_CONST(pSrc, bRm & X86_MODRM_RM_MASK);
8115 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
8117 if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
8126 IEM_MC_FETCH_GREG_U16(u16Src, (bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK);
8127 IEM_MC_REF_GREG_U16(pu16Dst, (bRm & X86_MODRM_RM_MASK));
8143 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0);
8146 IEM_MC_FETCH_GREG_U16(u16Src, (bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK);
8169 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
8171 if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
8179 IEM_MC_FETCH_GREG_U32_SX_U64(u64Value, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
8180 IEM_MC_STORE_GREG_U64(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u64Value);
8192 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0);
8195 IEM_MC_STORE_GREG_U64(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u64Value);
8306 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
8313 if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
8325 IEM_MC_FETCH_GREG_U16(u16Tmp, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
8329 IEM_MC_STORE_GREG_U16(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u16Tmp);
8344 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 2);
8352 IEM_MC_STORE_GREG_U16(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u16Tmp);
8362 if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
8374 IEM_MC_FETCH_GREG_U32(u32Tmp, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
8378 IEM_MC_STORE_GREG_U32(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u32Tmp);
8393 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 4);
8401 IEM_MC_STORE_GREG_U32(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u32Tmp);
8411 if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
8423 IEM_MC_FETCH_GREG_U64(u64Tmp, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
8427 IEM_MC_STORE_GREG_U64(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u64Tmp);
8442 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 4);
8450 IEM_MC_STORE_GREG_U64(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u64Tmp);
8493 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
8499 if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
8511 IEM_MC_FETCH_GREG_U16(u16Tmp, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
8515 IEM_MC_STORE_GREG_U16(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u16Tmp);
8530 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 1);
8538 IEM_MC_STORE_GREG_U16(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u16Tmp);
8546 if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
8558 IEM_MC_FETCH_GREG_U32(u32Tmp, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
8562 IEM_MC_STORE_GREG_U32(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u32Tmp);
8577 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 1);
8585 IEM_MC_STORE_GREG_U32(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u32Tmp);
8593 if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
8605 IEM_MC_FETCH_GREG_U64(u64Tmp, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
8609 IEM_MC_STORE_GREG_U64(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u64Tmp);
8624 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 1);
8632 IEM_MC_STORE_GREG_U64(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u64Tmp);
9129 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
9130 IEMOP_MNEMONIC2("add\0or\0\0adc\0sbb\0and\0sub\0xor\0cmp" + ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK)*4, "Eb,Ib");
9131 PCIEMOPBINSIZES pImpl = g_apIemImplGrp1[(bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK];
9133 if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
9143 IEM_MC_REF_GREG_U8(pu8Dst, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
9166 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 1);
9189 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
9190 IEMOP_MNEMONIC2("add\0or\0\0adc\0sbb\0and\0sub\0xor\0cmp" + ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK)*4, "Ev,Iz");
9191 PCIEMOPBINSIZES pImpl = g_apIemImplGrp1[(bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK];
9197 if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
9207 IEM_MC_REF_GREG_U16(pu16Dst, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
9231 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 2);
9251 if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
9261 IEM_MC_REF_GREG_U32(pu32Dst, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
9286 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 4);
9306 if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
9316 IEM_MC_REF_GREG_U64(pu64Dst, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
9340 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 4);
9373 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
9374 IEMOP_MNEMONIC2("add\0or\0\0adc\0sbb\0and\0sub\0xor\0cmp" + ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK)*4, "Ev,Ib");
9375 PCIEMOPBINSIZES pImpl = g_apIemImplGrp1[(bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK];
9377 if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
9393 IEM_MC_REF_GREG_U16(pu16Dst, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
9409 IEM_MC_REF_GREG_U32(pu32Dst, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
9426 IEM_MC_REF_GREG_U64(pu64Dst, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
9460 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 1);
9485 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 1);
9510 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 1);
9555 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
9561 if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
9569 IEM_MC_FETCH_GREG_U8(uTmp1, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
9570 IEM_MC_FETCH_GREG_U8(uTmp2, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
9571 IEM_MC_STORE_GREG_U8((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, uTmp1);
9572 IEM_MC_STORE_GREG_U8(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, uTmp2);
9588 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0);
9590 IEM_MC_REF_GREG_U8(pu8Reg, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
9605 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
9610 if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
9621 IEM_MC_FETCH_GREG_U16(uTmp1, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
9622 IEM_MC_FETCH_GREG_U16(uTmp2, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
9623 IEM_MC_STORE_GREG_U16((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, uTmp1);
9624 IEM_MC_STORE_GREG_U16(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, uTmp2);
9635 IEM_MC_FETCH_GREG_U32(uTmp1, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
9636 IEM_MC_FETCH_GREG_U32(uTmp2, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
9637 IEM_MC_STORE_GREG_U32((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, uTmp1);
9638 IEM_MC_STORE_GREG_U32(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, uTmp2);
9649 IEM_MC_FETCH_GREG_U64(uTmp1, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
9650 IEM_MC_FETCH_GREG_U64(uTmp2, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
9651 IEM_MC_STORE_GREG_U64((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, uTmp1);
9652 IEM_MC_STORE_GREG_U64(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, uTmp2);
9675 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0);
9677 IEM_MC_REF_GREG_U16(pu16Reg, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
9691 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0);
9693 IEM_MC_REF_GREG_U32(pu32Reg, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
9708 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0);
9710 IEM_MC_REF_GREG_U64(pu64Reg, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
9729 uint8_t bRm;
9730 IEM_OPCODE_GET_NEXT_U8(&bRm);
9736 if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
9740 IEM_MC_FETCH_GREG_U8(u8Value, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
9741 IEM_MC_STORE_GREG_U8((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, u8Value);
9753 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0);
9754 IEM_MC_FETCH_GREG_U8(u8Value, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
9769 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
9775 if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
9782 IEM_MC_FETCH_GREG_U16(u16Value, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
9783 IEM_MC_STORE_GREG_U16((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, u16Value);
9791 IEM_MC_FETCH_GREG_U32(u32Value, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
9792 IEM_MC_STORE_GREG_U32((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, u32Value);
9800 IEM_MC_FETCH_GREG_U64(u64Value, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
9801 IEM_MC_STORE_GREG_U64((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, u64Value);
9818 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0);
9819 IEM_MC_FETCH_GREG_U16(u16Value, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
9829 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0);
9830 IEM_MC_FETCH_GREG_U32(u32Value, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
9840 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0);
9841 IEM_MC_FETCH_GREG_U64(u64Value, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
9857 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
9863 if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
9867 IEM_MC_FETCH_GREG_U8(u8Value, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
9868 IEM_MC_STORE_GREG_U8(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u8Value);
9880 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0);
9882 IEM_MC_STORE_GREG_U8(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u8Value);
9895 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
9901 if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
9908 IEM_MC_FETCH_GREG_U16(u16Value, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
9909 IEM_MC_STORE_GREG_U16(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u16Value);
9917 IEM_MC_FETCH_GREG_U32(u32Value, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
9918 IEM_MC_STORE_GREG_U32(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u32Value);
9926 IEM_MC_FETCH_GREG_U64(u64Value, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
9927 IEM_MC_STORE_GREG_U64(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u64Value);
9944 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0);
9946 IEM_MC_STORE_GREG_U16(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u16Value);
9955 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0);
9957 IEM_MC_STORE_GREG_U32(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u32Value);
9966 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0);
9968 IEM_MC_STORE_GREG_U64(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u64Value);
9994 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
10000 uint8_t const iSegReg = ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK);
10009 if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
10017 IEM_MC_STORE_GREG_U16((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, u16Value);
10026 IEM_MC_STORE_GREG_U32((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, u32Value);
10035 IEM_MC_STORE_GREG_U64((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, u64Value);
10053 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0);
10069 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
10071 if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
10080 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0);
10082 IEM_MC_STORE_GREG_U16(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u16Cast);
10091 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0);
10093 IEM_MC_STORE_GREG_U32(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u32Cast);
10101 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0);
10102 IEM_MC_STORE_GREG_U64(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, GCPtrEffSrc);
10116 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
10130 uint8_t const iSegReg = ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK);
10138 if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
10143 IEM_MC_FETCH_GREG_U16(u16Value, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
10157 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0);
10167 FNIEMOP_DEF_1(iemOp_pop_Ev, uint8_t, bRm)
10183 if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
10184 return FNIEMOP_CALL_1(iemOpCommonPopGReg, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
10204 rcStrict = iemOpHlpCalcRmEffAddr(pIemCpu, bRm, 0, &GCPtrEff);
10218 rcStrict = iemOpHlpCalcRmEffAddr(pIemCpu, bRm, 0, &GCPtrEff);
10272 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
10273 if ((bRm & X86_MODRM_REG_MASK) == (0 << X86_MODRM_REG_SHIFT)) /* /0 */
10274 return FNIEMOP_CALL_1(iemOp_pop_Ev, bRm);
11768 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
11770 switch ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK)
11784 if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
11793 IEM_MC_REF_GREG_U8(pu8Dst, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
11809 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 1);
11828 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
11830 switch ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK)
11844 if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
11856 IEM_MC_REF_GREG_U16(pu16Dst, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
11868 IEM_MC_REF_GREG_U32(pu32Dst, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
11881 IEM_MC_REF_GREG_U64(pu64Dst, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
11904 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 1);
11924 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 1);
11944 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 1);
11987 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
11989 || (bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
12002 return FNIEMOP_CALL_2(iemOpCommonLoadSRegAndGreg, X86_SREG_ES, bRm);
12014 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
12017 if ((bRm & X86_MODRM_MOD_MASK) != (3 << X86_MODRM_MOD_SHIFT))
12020 return FNIEMOP_CALL_2(iemOpCommonLoadSRegAndGreg, X86_SREG_DS, bRm);
12048 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
12050 if ((bRm & X86_MODRM_REG_MASK) != (0 << X86_MODRM_REG_SHIFT)) /* only mov Eb,Ib in this group. */
12054 if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
12059 IEM_MC_STORE_GREG_U8((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, u8Imm);
12068 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 1);
12081 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
12083 if ((bRm & X86_MODRM_REG_MASK) != (0 << X86_MODRM_REG_SHIFT)) /* only mov Eb,Ib in this group. */
12087 if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
12095 IEM_MC_STORE_GREG_U16((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, u16Imm);
12103 IEM_MC_STORE_GREG_U32((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, u32Imm);
12111 IEM_MC_STORE_GREG_U64((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, u64Imm);
12127 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 2);
12137 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 4);
12147 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 4);
12247 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
12249 switch ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK)
12263 if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
12271 IEM_MC_REF_GREG_U8(pu8Dst, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
12287 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0);
12305 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
12307 switch ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK)
12321 if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
12332 IEM_MC_REF_GREG_U16(pu16Dst, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
12344 IEM_MC_REF_GREG_U32(pu32Dst, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
12357 IEM_MC_REF_GREG_U64(pu64Dst, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
12380 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0);
12398 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0);
12416 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0);
12436 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
12438 switch ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK)
12452 if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
12460 IEM_MC_REF_GREG_U8(pu8Dst, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
12477 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0);
12495 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
12497 switch ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK)
12511 if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
12522 IEM_MC_REF_GREG_U16(pu16Dst, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
12535 IEM_MC_REF_GREG_U32(pu32Dst, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
12549 IEM_MC_REF_GREG_U64(pu64Dst, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
12573 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0);
12592 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0);
12611 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0);
12726 FNIEMOP_DEF_2(iemOpHlpFpu_st0_stN, uint8_t, bRm, PFNIEMAIMPLFPUR80, pfnAImpl)
12738 IEM_MC_IF_TWO_FPUREGS_NOT_EMPTY_REF_R80(pr80Value1, 0, pr80Value2, bRm & X86_MODRM_RM_MASK)
12758 FNIEMOP_DEF_2(iemOpHlpFpuNoStore_st0_stN, uint8_t, bRm, PFNIEMAIMPLFPUR80FSW, pfnAImpl)
12770 IEM_MC_IF_TWO_FPUREGS_NOT_EMPTY_REF_R80(pr80Value1, 0, pr80Value2, bRm & X86_MODRM_RM_MASK)
12790 FNIEMOP_DEF_2(iemOpHlpFpuNoStore_st0_stN_pop, uint8_t, bRm, PFNIEMAIMPLFPUR80FSW, pfnAImpl)
12802 IEM_MC_IF_TWO_FPUREGS_NOT_EMPTY_REF_R80(pr80Value1, 0, pr80Value2, bRm & X86_MODRM_RM_MASK)
12817 FNIEMOP_DEF_1(iemOp_fadd_stN, uint8_t, bRm)
12820 return FNIEMOP_CALL_2(iemOpHlpFpu_st0_stN, bRm, iemAImpl_fadd_r80_by_r80);
12825 FNIEMOP_DEF_1(iemOp_fmul_stN, uint8_t, bRm)
12828 return FNIEMOP_CALL_2(iemOpHlpFpu_st0_stN, bRm, iemAImpl_fmul_r80_by_r80);
12833 FNIEMOP_DEF_1(iemOp_fcom_stN, uint8_t, bRm)
12836 return FNIEMOP_CALL_2(iemOpHlpFpuNoStore_st0_stN, bRm, iemAImpl_fcom_r80_by_r80);
12841 FNIEMOP_DEF_1(iemOp_fcomp_stN, uint8_t, bRm)
12844 return FNIEMOP_CALL_2(iemOpHlpFpuNoStore_st0_stN_pop, bRm, iemAImpl_fcom_r80_by_r80);
12849 FNIEMOP_DEF_1(iemOp_fsub_stN, uint8_t, bRm)
12852 return FNIEMOP_CALL_2(iemOpHlpFpu_st0_stN, bRm, iemAImpl_fsub_r80_by_r80);
12857 FNIEMOP_DEF_1(iemOp_fsubr_stN, uint8_t, bRm)
12860 return FNIEMOP_CALL_2(iemOpHlpFpu_st0_stN, bRm, iemAImpl_fsubr_r80_by_r80);
12865 FNIEMOP_DEF_1(iemOp_fdiv_stN, uint8_t, bRm)
12868 return FNIEMOP_CALL_2(iemOpHlpFpu_st0_stN, bRm, iemAImpl_fdiv_r80_by_r80);
12873 FNIEMOP_DEF_1(iemOp_fdivr_stN, uint8_t, bRm)
12876 return FNIEMOP_CALL_2(iemOpHlpFpu_st0_stN, bRm, iemAImpl_fdivr_r80_by_r80);
12886 FNIEMOP_DEF_2(iemOpHlpFpu_st0_m32r, uint8_t, bRm, PFNIEMAIMPLFPUR32, pfnAImpl)
12896 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0);
12918 FNIEMOP_DEF_1(iemOp_fadd_m32r, uint8_t, bRm)
12921 return FNIEMOP_CALL_2(iemOpHlpFpu_st0_m32r, bRm, iemAImpl_fadd_r80_by_r32);
12926 FNIEMOP_DEF_1(iemOp_fmul_m32r, uint8_t, bRm)
12929 return FNIEMOP_CALL_2(iemOpHlpFpu_st0_m32r, bRm, iemAImpl_fmul_r80_by_r32);
12934 FNIEMOP_DEF_1(iemOp_fcom_m32r, uint8_t, bRm)
12946 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0);
12968 FNIEMOP_DEF_1(iemOp_fcomp_m32r, uint8_t, bRm)
12980 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0);
13002 FNIEMOP_DEF_1(iemOp_fsub_m32r, uint8_t, bRm)
13005 return FNIEMOP_CALL_2(iemOpHlpFpu_st0_m32r, bRm, iemAImpl_fsub_r80_by_r32);
13010 FNIEMOP_DEF_1(iemOp_fsubr_m32r, uint8_t, bRm)
13013 return FNIEMOP_CALL_2(iemOpHlpFpu_st0_m32r, bRm, iemAImpl_fsubr_r80_by_r32);
13018 FNIEMOP_DEF_1(iemOp_fdiv_m32r, uint8_t, bRm)
13021 return FNIEMOP_CALL_2(iemOpHlpFpu_st0_m32r, bRm, iemAImpl_fdiv_r80_by_r32);
13026 FNIEMOP_DEF_1(iemOp_fdivr_m32r, uint8_t, bRm)
13029 return FNIEMOP_CALL_2(iemOpHlpFpu_st0_m32r, bRm, iemAImpl_fdivr_r80_by_r32);
13037 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
13039 if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
13041 switch ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK)
13043 case 0: return FNIEMOP_CALL_1(iemOp_fadd_stN, bRm);
13044 case 1: return FNIEMOP_CALL_1(iemOp_fmul_stN, bRm);
13045 case 2: return FNIEMOP_CALL_1(iemOp_fcom_stN, bRm);
13046 case 3: return FNIEMOP_CALL_1(iemOp_fcomp_stN, bRm);
13047 case 4: return FNIEMOP_CALL_1(iemOp_fsub_stN, bRm);
13048 case 5: return FNIEMOP_CALL_1(iemOp_fsubr_stN, bRm);
13049 case 6: return FNIEMOP_CALL_1(iemOp_fdiv_stN, bRm);
13050 case 7: return FNIEMOP_CALL_1(iemOp_fdivr_stN, bRm);
13056 switch ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK)
13058 case 0: return FNIEMOP_CALL_1(iemOp_fadd_m32r, bRm);
13059 case 1: return FNIEMOP_CALL_1(iemOp_fmul_m32r, bRm);
13060 case 2: return FNIEMOP_CALL_1(iemOp_fcom_m32r, bRm);
13061 case 3: return FNIEMOP_CALL_1(iemOp_fcomp_m32r, bRm);
13062 case 4: return FNIEMOP_CALL_1(iemOp_fsub_m32r, bRm);
13063 case 5: return FNIEMOP_CALL_1(iemOp_fsubr_m32r, bRm);
13064 case 6: return FNIEMOP_CALL_1(iemOp_fdiv_m32r, bRm);
13065 case 7: return FNIEMOP_CALL_1(iemOp_fdivr_m32r, bRm);
13074 FNIEMOP_DEF_1(iemOp_fld_m32r, uint8_t, bRm)
13085 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0);
13107 FNIEMOP_DEF_1(iemOp_fst_m32r, uint8_t, bRm)
13117 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0);
13143 FNIEMOP_DEF_1(iemOp_fstp_m32r, uint8_t, bRm)
13153 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0);
13179 FNIEMOP_DEF_1(iemOp_fldenv, uint8_t, bRm)
13186 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0);
13197 FNIEMOP_DEF_1(iemOp_fldcw, uint8_t, bRm)
13203 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0);
13214 FNIEMOP_DEF_1(iemOp_fnstenv, uint8_t, bRm)
13221 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0);
13232 FNIEMOP_DEF_1(iemOp_fnstcw, uint8_t, bRm)
13238 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0);
13269 FNIEMOP_DEF_1(iemOp_fld_stN, uint8_t, bRm)
13281 IEM_MC_IF_FPUREG_NOT_EMPTY_REF_R80(pr80Value, bRm & X86_MODRM_RM_MASK)
13296 FNIEMOP_DEF_1(iemOp_fxch_stN, uint8_t, bRm)
13307 IEM_MC_ARG_CONST(uint8_t, iStReg, /*=*/ bRm & X86_MODRM_RM_MASK, 0);
13310 IEM_MC_IF_TWO_FPUREGS_NOT_EMPTY_REF_R80(pr80Value1, 0, pr80Value2, bRm & X86_MODRM_RM_MASK)
13312 IEM_MC_STORE_FPUREG_R80_SRC_REF(bRm & X86_MODRM_RM_MASK, pr80Value1);
13326 FNIEMOP_DEF_1(iemOp_fstp_stN, uint8_t, bRm)
13332 uint8_t const iDstReg = bRm & X86_MODRM_RM_MASK;
13606 FNIEMOP_DEF_2(iemOpHlpFpu_stN_st0_pop, uint8_t, bRm, PFNIEMAIMPLFPUR80, pfnAImpl)
13619 IEM_MC_IF_TWO_FPUREGS_NOT_EMPTY_REF_R80(pr80Value1, bRm & X86_MODRM_RM_MASK, pr80Value2, 0)
13621 IEM_MC_STORE_FPU_RESULT_THEN_POP(FpuRes, bRm & X86_MODRM_RM_MASK);
13623 IEM_MC_FPU_STACK_UNDERFLOW_THEN_POP(bRm & X86_MODRM_RM_MASK);
13811 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
13812 if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
13814 switch ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK)
13816 case 0: return FNIEMOP_CALL_1(iemOp_fld_stN, bRm);
13817 case 1: return FNIEMOP_CALL_1(iemOp_fxch_stN, bRm);
13819 if (bRm == 0xd0)
13822 case 3: return FNIEMOP_CALL_1(iemOp_fstp_stN, bRm); /* Reserved. Intel behavior seems to be FSTP ST(i) though. */
13827 Assert((unsigned)bRm - 0xe0U < RT_ELEMENTS(g_apfnEscF1_E0toFF));
13828 return FNIEMOP_CALL(g_apfnEscF1_E0toFF[bRm - 0xe0]);
13834 switch ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK)
13836 case 0: return FNIEMOP_CALL_1(iemOp_fld_m32r, bRm);
13838 case 2: return FNIEMOP_CALL_1(iemOp_fst_m32r, bRm);
13839 case 3: return FNIEMOP_CALL_1(iemOp_fstp_m32r, bRm);
13840 case 4: return FNIEMOP_CALL_1(iemOp_fldenv, bRm);
13841 case 5: return FNIEMOP_CALL_1(iemOp_fldcw, bRm);
13842 case 6: return FNIEMOP_CALL_1(iemOp_fnstenv, bRm);
13843 case 7: return FNIEMOP_CALL_1(iemOp_fnstcw, bRm);
13851 FNIEMOP_DEF_1(iemOp_fcmovb_stN, uint8_t, bRm)
13862 IEM_MC_IF_TWO_FPUREGS_NOT_EMPTY_REF_R80_FIRST(pr80ValueN, bRm & X86_MODRM_RM_MASK, 0)
13879 FNIEMOP_DEF_1(iemOp_fcmove_stN, uint8_t, bRm)
13890 IEM_MC_IF_TWO_FPUREGS_NOT_EMPTY_REF_R80_FIRST(pr80ValueN, bRm & X86_MODRM_RM_MASK, 0)
13907 FNIEMOP_DEF_1(iemOp_fcmovbe_stN, uint8_t, bRm)
13918 IEM_MC_IF_TWO_FPUREGS_NOT_EMPTY_REF_R80_FIRST(pr80ValueN, bRm & X86_MODRM_RM_MASK, 0)
13935 FNIEMOP_DEF_1(iemOp_fcmovu_stN, uint8_t, bRm)
13946 IEM_MC_IF_TWO_FPUREGS_NOT_EMPTY_REF_R80_FIRST(pr80ValueN, bRm & X86_MODRM_RM_MASK, 0)
14008 FNIEMOP_DEF_2(iemOpHlpFpu_st0_m32i, uint8_t, bRm, PFNIEMAIMPLFPUI32, pfnAImpl)
14018 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0);
14040 FNIEMOP_DEF_1(iemOp_fiadd_m32i, uint8_t, bRm)
14043 return FNIEMOP_CALL_2(iemOpHlpFpu_st0_m32i, bRm, iemAImpl_fiadd_r80_by_i32);
14048 FNIEMOP_DEF_1(iemOp_fimul_m32i, uint8_t, bRm)
14051 return FNIEMOP_CALL_2(iemOpHlpFpu_st0_m32i, bRm, iemAImpl_fimul_r80_by_i32);
14056 FNIEMOP_DEF_1(iemOp_ficom_m32i, uint8_t, bRm)
14068 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0);
14090 FNIEMOP_DEF_1(iemOp_ficomp_m32i, uint8_t, bRm)
14102 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0);
14124 FNIEMOP_DEF_1(iemOp_fisub_m32i, uint8_t, bRm)
14127 return FNIEMOP_CALL_2(iemOpHlpFpu_st0_m32i, bRm, iemAImpl_fisub_r80_by_i32);
14132 FNIEMOP_DEF_1(iemOp_fisubr_m32i, uint8_t, bRm)
14135 return FNIEMOP_CALL_2(iemOpHlpFpu_st0_m32i, bRm, iemAImpl_fisubr_r80_by_i32);
14140 FNIEMOP_DEF_1(iemOp_fidiv_m32i, uint8_t, bRm)
14143 return FNIEMOP_CALL_2(iemOpHlpFpu_st0_m32i, bRm, iemAImpl_fidiv_r80_by_i32);
14148 FNIEMOP_DEF_1(iemOp_fidivr_m32i, uint8_t, bRm)
14151 return FNIEMOP_CALL_2(iemOpHlpFpu_st0_m32i, bRm, iemAImpl_fidivr_r80_by_i32);
14159 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
14160 if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
14162 switch ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK)
14164 case 0: return FNIEMOP_CALL_1(iemOp_fcmovb_stN, bRm);
14165 case 1: return FNIEMOP_CALL_1(iemOp_fcmove_stN, bRm);
14166 case 2: return FNIEMOP_CALL_1(iemOp_fcmovbe_stN, bRm);
14167 case 3: return FNIEMOP_CALL_1(iemOp_fcmovu_stN, bRm);
14170 if (bRm == 0xe9)
14180 switch ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK)
14182 case 0: return FNIEMOP_CALL_1(iemOp_fiadd_m32i, bRm);
14183 case 1: return FNIEMOP_CALL_1(iemOp_fimul_m32i, bRm);
14184 case 2: return FNIEMOP_CALL_1(iemOp_ficom_m32i, bRm);
14185 case 3: return FNIEMOP_CALL_1(iemOp_ficomp_m32i, bRm);
14186 case 4: return FNIEMOP_CALL_1(iemOp_fisub_m32i, bRm);
14187 case 5: return FNIEMOP_CALL_1(iemOp_fisubr_m32i, bRm);
14188 case 6: return FNIEMOP_CALL_1(iemOp_fidiv_m32i, bRm);
14189 case 7: return FNIEMOP_CALL_1(iemOp_fidivr_m32i, bRm);
14197 FNIEMOP_DEF_1(iemOp_fild_m32i, uint8_t, bRm)
14208 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0);
14230 FNIEMOP_DEF_1(iemOp_fisttp_m32i, uint8_t, bRm)
14240 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0);
14266 FNIEMOP_DEF_1(iemOp_fist_m32i, uint8_t, bRm)
14276 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0);
14302 FNIEMOP_DEF_1(iemOp_fistp_m32i, uint8_t, bRm)
14312 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0);
14338 FNIEMOP_DEF_1(iemOp_fld_m80r, uint8_t, bRm)
14349 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0);
14371 FNIEMOP_DEF_1(iemOp_fstp_m80r, uint8_t, bRm)
14381 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0);
14407 FNIEMOP_DEF_1(iemOp_fcmovnb_stN, uint8_t, bRm)
14418 IEM_MC_IF_TWO_FPUREGS_NOT_EMPTY_REF_R80_FIRST(pr80ValueN, bRm & X86_MODRM_RM_MASK, 0)
14435 FNIEMOP_DEF_1(iemOp_fcmovne_stN, uint8_t, bRm)
14446 IEM_MC_IF_TWO_FPUREGS_NOT_EMPTY_REF_R80_FIRST(pr80ValueN, bRm & X86_MODRM_RM_MASK, 0)
14463 FNIEMOP_DEF_1(iemOp_fcmovnbe_stN, uint8_t, bRm)
14474 IEM_MC_IF_TWO_FPUREGS_NOT_EMPTY_REF_R80_FIRST(pr80ValueN, bRm & X86_MODRM_RM_MASK, 0)
14491 FNIEMOP_DEF_1(iemOp_fcmovnnu_stN, uint8_t, bRm)
14502 IEM_MC_IF_TWO_FPUREGS_NOT_EMPTY_REF_R80_FIRST(pr80ValueN, bRm & X86_MODRM_RM_MASK, 0)
14599 FNIEMOP_DEF_1(iemOp_fucomi_stN, uint8_t, bRm)
14602 return IEM_MC_DEFER_TO_CIMPL_3(iemCImpl_fcomi_fucomi, bRm & X86_MODRM_RM_MASK, iemAImpl_fucomi_r80_by_r80, false /*fPop*/);
14607 FNIEMOP_DEF_1(iemOp_fcomi_stN, uint8_t, bRm)
14610 return IEM_MC_DEFER_TO_CIMPL_3(iemCImpl_fcomi_fucomi, bRm & X86_MODRM_RM_MASK, iemAImpl_fcomi_r80_by_r80, false /*fPop*/);
14618 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
14619 if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
14621 switch ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK)
14623 case 0: return FNIEMOP_CALL_1(iemOp_fcmovnb_stN, bRm);
14624 case 1: return FNIEMOP_CALL_1(iemOp_fcmovne_stN, bRm);
14625 case 2: return FNIEMOP_CALL_1(iemOp_fcmovnbe_stN, bRm);
14626 case 3: return FNIEMOP_CALL_1(iemOp_fcmovnnu_stN, bRm);
14628 switch (bRm)
14641 case 5: return FNIEMOP_CALL_1(iemOp_fucomi_stN, bRm);
14642 case 6: return FNIEMOP_CALL_1(iemOp_fcomi_stN, bRm);
14649 switch ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK)
14651 case 0: return FNIEMOP_CALL_1(iemOp_fild_m32i, bRm);
14652 case 1: return FNIEMOP_CALL_1(iemOp_fisttp_m32i,bRm);
14653 case 2: return FNIEMOP_CALL_1(iemOp_fist_m32i, bRm);
14654 case 3: return FNIEMOP_CALL_1(iemOp_fistp_m32i, bRm);
14656 case 5: return FNIEMOP_CALL_1(iemOp_fld_m80r, bRm);
14658 case 7: return FNIEMOP_CALL_1(iemOp_fstp_m80r, bRm);
14671 FNIEMOP_DEF_2(iemOpHlpFpu_stN_st0, uint8_t, bRm, PFNIEMAIMPLFPUR80, pfnAImpl)
14684 IEM_MC_IF_TWO_FPUREGS_NOT_EMPTY_REF_R80(pr80Value1, bRm & X86_MODRM_RM_MASK, pr80Value2, 0)
14686 IEM_MC_STORE_FPU_RESULT(FpuRes, bRm & X86_MODRM_RM_MASK);
14688 IEM_MC_FPU_STACK_UNDERFLOW(bRm & X86_MODRM_RM_MASK);
14699 FNIEMOP_DEF_1(iemOp_fadd_stN_st0, uint8_t, bRm)
14702 return FNIEMOP_CALL_2(iemOpHlpFpu_stN_st0, bRm, iemAImpl_fadd_r80_by_r80);
14707 FNIEMOP_DEF_1(iemOp_fmul_stN_st0, uint8_t, bRm)
14710 return FNIEMOP_CALL_2(iemOpHlpFpu_stN_st0, bRm, iemAImpl_fmul_r80_by_r80);
14715 FNIEMOP_DEF_1(iemOp_fsubr_stN_st0, uint8_t, bRm)
14718 return FNIEMOP_CALL_2(iemOpHlpFpu_stN_st0, bRm, iemAImpl_fsubr_r80_by_r80);
14723 FNIEMOP_DEF_1(iemOp_fsub_stN_st0, uint8_t, bRm)
14726 return FNIEMOP_CALL_2(iemOpHlpFpu_stN_st0, bRm, iemAImpl_fsub_r80_by_r80);
14731 FNIEMOP_DEF_1(iemOp_fdivr_stN_st0, uint8_t, bRm)
14734 return FNIEMOP_CALL_2(iemOpHlpFpu_stN_st0, bRm, iemAImpl_fdivr_r80_by_r80);
14739 FNIEMOP_DEF_1(iemOp_fdiv_stN_st0, uint8_t, bRm)
14742 return FNIEMOP_CALL_2(iemOpHlpFpu_stN_st0, bRm, iemAImpl_fdiv_r80_by_r80);
14752 FNIEMOP_DEF_2(iemOpHlpFpu_ST0_m64r, uint8_t, bRm, PFNIEMAIMPLFPUR64, pfnImpl)
14762 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0);
14783 FNIEMOP_DEF_1(iemOp_fadd_m64r, uint8_t, bRm)
14786 return FNIEMOP_CALL_2(iemOpHlpFpu_ST0_m64r, bRm, iemAImpl_fadd_r80_by_r64);
14791 FNIEMOP_DEF_1(iemOp_fmul_m64r, uint8_t, bRm)
14794 return FNIEMOP_CALL_2(iemOpHlpFpu_ST0_m64r, bRm, iemAImpl_fmul_r80_by_r64);
14799 FNIEMOP_DEF_1(iemOp_fcom_m64r, uint8_t, bRm)
14811 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0);
14833 FNIEMOP_DEF_1(iemOp_fcomp_m64r, uint8_t, bRm)
14845 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0);
14867 FNIEMOP_DEF_1(iemOp_fsub_m64r, uint8_t, bRm)
14870 return FNIEMOP_CALL_2(iemOpHlpFpu_ST0_m64r, bRm, iemAImpl_fsub_r80_by_r64);
14875 FNIEMOP_DEF_1(iemOp_fsubr_m64r, uint8_t, bRm)
14878 return FNIEMOP_CALL_2(iemOpHlpFpu_ST0_m64r, bRm, iemAImpl_fsubr_r80_by_r64);
14883 FNIEMOP_DEF_1(iemOp_fdiv_m64r, uint8_t, bRm)
14886 return FNIEMOP_CALL_2(iemOpHlpFpu_ST0_m64r, bRm, iemAImpl_fdiv_r80_by_r64);
14891 FNIEMOP_DEF_1(iemOp_fdivr_m64r, uint8_t, bRm)
14894 return FNIEMOP_CALL_2(iemOpHlpFpu_ST0_m64r, bRm, iemAImpl_fdivr_r80_by_r64);
14902 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
14903 if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
14905 switch ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK)
14907 case 0: return FNIEMOP_CALL_1(iemOp_fadd_stN_st0, bRm);
14908 case 1: return FNIEMOP_CALL_1(iemOp_fmul_stN_st0, bRm);
14909 case 2: return FNIEMOP_CALL_1(iemOp_fcom_stN, bRm); /* Marked reserved, intel behavior is that of FCOM ST(i). */
14910 case 3: return FNIEMOP_CALL_1(iemOp_fcomp_stN, bRm); /* Marked reserved, intel behavior is that of FCOMP ST(i). */
14911 case 4: return FNIEMOP_CALL_1(iemOp_fsubr_stN_st0, bRm);
14912 case 5: return FNIEMOP_CALL_1(iemOp_fsub_stN_st0, bRm);
14913 case 6: return FNIEMOP_CALL_1(iemOp_fdivr_stN_st0, bRm);
14914 case 7: return FNIEMOP_CALL_1(iemOp_fdiv_stN_st0, bRm);
14920 switch ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK)
14922 case 0: return FNIEMOP_CALL_1(iemOp_fadd_m64r, bRm);
14923 case 1: return FNIEMOP_CALL_1(iemOp_fmul_m64r, bRm);
14924 case 2: return FNIEMOP_CALL_1(iemOp_fcom_m64r, bRm);
14925 case 3: return FNIEMOP_CALL_1(iemOp_fcomp_m64r, bRm);
14926 case 4: return FNIEMOP_CALL_1(iemOp_fsub_m64r, bRm);
14927 case 5: return FNIEMOP_CALL_1(iemOp_fsubr_m64r, bRm);
14928 case 6: return FNIEMOP_CALL_1(iemOp_fdiv_m64r, bRm);
14929 case 7: return FNIEMOP_CALL_1(iemOp_fdivr_m64r, bRm);
14938 FNIEMOP_DEF_1(iemOp_fld_m64r, uint8_t, bRm)
14949 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0);
14970 FNIEMOP_DEF_1(iemOp_fisttp_m64i, uint8_t, bRm)
14980 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0);
15006 FNIEMOP_DEF_1(iemOp_fst_m64r, uint8_t, bRm)
15016 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0);
15044 FNIEMOP_DEF_1(iemOp_fstp_m64r, uint8_t, bRm)
15054 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0);
15080 FNIEMOP_DEF_1(iemOp_frstor, uint8_t, bRm)
15087 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0);
15098 FNIEMOP_DEF_1(iemOp_fnsave, uint8_t, bRm)
15105 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0);
15116 FNIEMOP_DEF_1(iemOp_fnstsw, uint8_t, bRm)
15124 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0);
15141 FNIEMOP_DEF_1(iemOp_ffree_stN, uint8_t, bRm)
15153 IEM_MC_FPU_STACK_FREE(bRm & X86_MODRM_RM_MASK);
15164 FNIEMOP_DEF_1(iemOp_fst_stN, uint8_t, bRm)
15176 IEM_MC_STORE_FPU_RESULT(FpuRes, bRm & X86_MODRM_RM_MASK);
15178 IEM_MC_FPU_STACK_UNDERFLOW(bRm & X86_MODRM_RM_MASK);
15188 FNIEMOP_DEF_1(iemOp_fucom_stN_st0, uint8_t, bRm)
15191 return FNIEMOP_CALL_2(iemOpHlpFpuNoStore_st0_stN, bRm, iemAImpl_fucom_r80_by_r80);
15196 FNIEMOP_DEF_1(iemOp_fucomp_stN, uint8_t, bRm)
15199 return FNIEMOP_CALL_2(iemOpHlpFpuNoStore_st0_stN_pop, bRm, iemAImpl_fucom_r80_by_r80);
15207 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
15208 if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
15210 switch ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK)
15212 case 0: return FNIEMOP_CALL_1(iemOp_ffree_stN, bRm);
15213 case 1: return FNIEMOP_CALL_1(iemOp_fxch_stN, bRm); /* Reserved, intel behavior is that of XCHG ST(i). */
15214 case 2: return FNIEMOP_CALL_1(iemOp_fst_stN, bRm);
15215 case 3: return FNIEMOP_CALL_1(iemOp_fstp_stN, bRm);
15216 case 4: return FNIEMOP_CALL_1(iemOp_fucom_stN_st0,bRm);
15217 case 5: return FNIEMOP_CALL_1(iemOp_fucomp_stN, bRm);
15225 switch ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK)
15227 case 0: return FNIEMOP_CALL_1(iemOp_fld_m64r, bRm);
15228 case 1: return FNIEMOP_CALL_1(iemOp_fisttp_m64i, bRm);
15229 case 2: return FNIEMOP_CALL_1(iemOp_fst_m64r, bRm);
15230 case 3: return FNIEMOP_CALL_1(iemOp_fstp_m64r, bRm);
15231 case 4: return FNIEMOP_CALL_1(iemOp_frstor, bRm);
15233 case 6: return FNIEMOP_CALL_1(iemOp_fnsave, bRm);
15234 case 7: return FNIEMOP_CALL_1(iemOp_fnstsw, bRm);
15242 FNIEMOP_DEF_1(iemOp_faddp_stN_st0, uint8_t, bRm)
15245 return FNIEMOP_CALL_2(iemOpHlpFpu_stN_st0_pop, bRm, iemAImpl_fadd_r80_by_r80);
15250 FNIEMOP_DEF_1(iemOp_fmulp_stN_st0, uint8_t, bRm)
15253 return FNIEMOP_CALL_2(iemOpHlpFpu_stN_st0_pop, bRm, iemAImpl_fmul_r80_by_r80);
15266 FNIEMOP_DEF_1(iemOp_fsubrp_stN_st0, uint8_t, bRm)
15269 return FNIEMOP_CALL_2(iemOpHlpFpu_stN_st0_pop, bRm, iemAImpl_fsubr_r80_by_r80);
15274 FNIEMOP_DEF_1(iemOp_fsubp_stN_st0, uint8_t, bRm)
15277 return FNIEMOP_CALL_2(iemOpHlpFpu_stN_st0_pop, bRm, iemAImpl_fsub_r80_by_r80);
15282 FNIEMOP_DEF_1(iemOp_fdivrp_stN_st0, uint8_t, bRm)
15285 return FNIEMOP_CALL_2(iemOpHlpFpu_stN_st0_pop, bRm, iemAImpl_fdivr_r80_by_r80);
15290 FNIEMOP_DEF_1(iemOp_fdivp_stN_st0, uint8_t, bRm)
15293 return FNIEMOP_CALL_2(iemOpHlpFpu_stN_st0_pop, bRm, iemAImpl_fdiv_r80_by_r80);
15303 FNIEMOP_DEF_2(iemOpHlpFpu_st0_m16i, uint8_t, bRm, PFNIEMAIMPLFPUI16, pfnAImpl)
15313 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0);
15335 FNIEMOP_DEF_1(iemOp_fiadd_m16i, uint8_t, bRm)
15338 return FNIEMOP_CALL_2(iemOpHlpFpu_st0_m16i, bRm, iemAImpl_fiadd_r80_by_i16);
15343 FNIEMOP_DEF_1(iemOp_fimul_m16i, uint8_t, bRm)
15346 return FNIEMOP_CALL_2(iemOpHlpFpu_st0_m16i, bRm, iemAImpl_fimul_r80_by_i16);
15351 FNIEMOP_DEF_1(iemOp_ficom_m16i, uint8_t, bRm)
15363 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0);
15385 FNIEMOP_DEF_1(iemOp_ficomp_m16i, uint8_t, bRm)
15397 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0);
15419 FNIEMOP_DEF_1(iemOp_fisub_m16i, uint8_t, bRm)
15422 return FNIEMOP_CALL_2(iemOpHlpFpu_st0_m16i, bRm, iemAImpl_fisub_r80_by_i16);
15427 FNIEMOP_DEF_1(iemOp_fisubr_m16i, uint8_t, bRm)
15430 return FNIEMOP_CALL_2(iemOpHlpFpu_st0_m16i, bRm, iemAImpl_fisubr_r80_by_i16);
15435 FNIEMOP_DEF_1(iemOp_fidiv_m16i, uint8_t, bRm)
15438 return FNIEMOP_CALL_2(iemOpHlpFpu_st0_m16i, bRm, iemAImpl_fidiv_r80_by_i16);
15443 FNIEMOP_DEF_1(iemOp_fidivr_m16i, uint8_t, bRm)
15446 return FNIEMOP_CALL_2(iemOpHlpFpu_st0_m16i, bRm, iemAImpl_fidivr_r80_by_i16);
15454 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
15455 if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
15457 switch ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK)
15459 case 0: return FNIEMOP_CALL_1(iemOp_faddp_stN_st0, bRm);
15460 case 1: return FNIEMOP_CALL_1(iemOp_fmulp_stN_st0, bRm);
15461 case 2: return FNIEMOP_CALL_1(iemOp_fcomp_stN, bRm);
15462 case 3: if (bRm == 0xd9)
15465 case 4: return FNIEMOP_CALL_1(iemOp_fsubrp_stN_st0, bRm);
15466 case 5: return FNIEMOP_CALL_1(iemOp_fsubp_stN_st0, bRm);
15467 case 6: return FNIEMOP_CALL_1(iemOp_fdivrp_stN_st0, bRm);
15468 case 7: return FNIEMOP_CALL_1(iemOp_fdivp_stN_st0, bRm);
15474 switch ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK)
15476 case 0: return FNIEMOP_CALL_1(iemOp_fiadd_m16i, bRm);
15477 case 1: return FNIEMOP_CALL_1(iemOp_fimul_m16i, bRm);
15478 case 2: return FNIEMOP_CALL_1(iemOp_ficom_m16i, bRm);
15479 case 3: return FNIEMOP_CALL_1(iemOp_ficomp_m16i, bRm);
15480 case 4: return FNIEMOP_CALL_1(iemOp_fisub_m16i, bRm);
15481 case 5: return FNIEMOP_CALL_1(iemOp_fisubr_m16i, bRm);
15482 case 6: return FNIEMOP_CALL_1(iemOp_fidiv_m16i, bRm);
15483 case 7: return FNIEMOP_CALL_1(iemOp_fidivr_m16i, bRm);
15492 FNIEMOP_DEF_1(iemOp_ffreep_stN, uint8_t, bRm)
15502 IEM_MC_FPU_STACK_FREE(bRm & X86_MODRM_RM_MASK);
15531 FNIEMOP_DEF_1(iemOp_fucomip_st0_stN, uint8_t, bRm)
15534 return IEM_MC_DEFER_TO_CIMPL_3(iemCImpl_fcomi_fucomi, bRm & X86_MODRM_RM_MASK, iemAImpl_fcomi_r80_by_r80, true /*fPop*/);
15539 FNIEMOP_DEF_1(iemOp_fcomip_st0_stN, uint8_t, bRm)
15542 return IEM_MC_DEFER_TO_CIMPL_3(iemCImpl_fcomi_fucomi, bRm & X86_MODRM_RM_MASK, iemAImpl_fcomi_r80_by_r80, true /*fPop*/);
15547 FNIEMOP_DEF_1(iemOp_fild_m16i, uint8_t, bRm)
15558 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0);
15580 FNIEMOP_DEF_1(iemOp_fisttp_m16i, uint8_t, bRm)
15590 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0);
15616 FNIEMOP_DEF_1(iemOp_fist_m16i, uint8_t, bRm)
15626 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0);
15652 FNIEMOP_DEF_1(iemOp_fistp_m16i, uint8_t, bRm)
15662 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0);
15688 FNIEMOP_STUB_1(iemOp_fbld_m80d, uint8_t, bRm);
15692 FNIEMOP_DEF_1(iemOp_fild_m64i, uint8_t, bRm)
15703 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0);
15725 FNIEMOP_STUB_1(iemOp_fbstp_m80d, uint8_t, bRm);
15729 FNIEMOP_DEF_1(iemOp_fistp_m64i, uint8_t, bRm)
15739 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0);
15767 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
15768 if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
15770 switch ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK)
15772 case 0: return FNIEMOP_CALL_1(iemOp_ffreep_stN, bRm); /* ffree + pop afterwards, since forever according to AMD. */
15773 case 1: return FNIEMOP_CALL_1(iemOp_fxch_stN, bRm); /* Reserved, behaves like FXCH ST(i) on intel. */
15774 case 2: return FNIEMOP_CALL_1(iemOp_fstp_stN, bRm); /* Reserved, behaves like FSTP ST(i) on intel. */
15775 case 3: return FNIEMOP_CALL_1(iemOp_fstp_stN, bRm); /* Reserved, behaves like FSTP ST(i) on intel. */
15776 case 4: if (bRm == 0xe0)
15779 case 5: return FNIEMOP_CALL_1(iemOp_fucomip_st0_stN, bRm);
15780 case 6: return FNIEMOP_CALL_1(iemOp_fcomip_st0_stN, bRm);
15787 switch ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK)
15789 case 0: return FNIEMOP_CALL_1(iemOp_fild_m16i, bRm);
15790 case 1: return FNIEMOP_CALL_1(iemOp_fisttp_m16i, bRm);
15791 case 2: return FNIEMOP_CALL_1(iemOp_fist_m16i, bRm);
15792 case 3: return FNIEMOP_CALL_1(iemOp_fistp_m16i, bRm);
15793 case 4: return FNIEMOP_CALL_1(iemOp_fbld_m80d, bRm);
15794 case 5: return FNIEMOP_CALL_1(iemOp_fild_m64i, bRm);
15795 case 6: return FNIEMOP_CALL_1(iemOp_fbstp_m80d, bRm);
15796 case 7: return FNIEMOP_CALL_1(iemOp_fistp_m64i, bRm);
16259 * @param bRm The RM byte.
16262 FNIEMOP_DEF_2(iemOpCommonUnaryEb, uint8_t, bRm, PCIEMOPUNARYSIZES, pImpl)
16264 if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
16270 IEM_MC_REF_GREG_U8(pu8Dst, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
16284 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0);
16304 * @param bRm The RM byte.
16307 FNIEMOP_DEF_2(iemOpCommonUnaryEv, uint8_t, bRm, PCIEMOPUNARYSIZES, pImpl)
16310 if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
16311 return FNIEMOP_CALL_2(iemOpCommonUnaryGReg, pImpl, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
16322 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0);
16342 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0);
16362 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0);
16382 FNIEMOP_DEF_1(iemOp_grp3_test_Eb, uint8_t, bRm)
16387 if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
16397 IEM_MC_REF_GREG_U8(pu8Dst, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
16414 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 1);
16431 FNIEMOP_DEF_1(iemOp_grp3_test_Ev, uint8_t, bRm)
16437 if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
16449 IEM_MC_REF_GREG_U16(pu16Dst, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
16464 IEM_MC_REF_GREG_U32(pu32Dst, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
16480 IEM_MC_REF_GREG_U64(pu64Dst, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
16504 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 2);
16526 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 4);
16548 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 4);
16569 FNIEMOP_DEF_2(iemOpCommonGrp3MulDivEb, uint8_t, bRm, PFNIEMAIMPLMULDIVU8, pfnU8)
16573 if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
16583 IEM_MC_FETCH_GREG_U8(u8Value, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
16607 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0);
16625 FNIEMOP_DEF_2(iemOpCommonGrp3MulDivEv, uint8_t, bRm, PCIEMOPMULDIVSIZES, pImpl)
16630 if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
16645 IEM_MC_FETCH_GREG_U16(u16Value, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
16670 IEM_MC_FETCH_GREG_U32(u32Value, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
16697 IEM_MC_FETCH_GREG_U64(u64Value, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
16731 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0);
16758 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0);
16787 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0);
16811 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
16812 switch ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK)
16815 return FNIEMOP_CALL_1(iemOp_grp3_test_Eb, bRm);
16820 return FNIEMOP_CALL_2(iemOpCommonUnaryEb, bRm, &g_iemAImpl_not);
16823 return FNIEMOP_CALL_2(iemOpCommonUnaryEb, bRm, &g_iemAImpl_neg);
16827 return FNIEMOP_CALL_2(iemOpCommonGrp3MulDivEb, bRm, iemAImpl_mul_u8);
16831 return FNIEMOP_CALL_2(iemOpCommonGrp3MulDivEb, bRm, iemAImpl_imul_u8);
16835 return FNIEMOP_CALL_2(iemOpCommonGrp3MulDivEb, bRm, iemAImpl_div_u8);
16839 return FNIEMOP_CALL_2(iemOpCommonGrp3MulDivEb, bRm, iemAImpl_idiv_u8);
16848 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
16849 switch ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK)
16852 return FNIEMOP_CALL_1(iemOp_grp3_test_Ev, bRm);
16857 return FNIEMOP_CALL_2(iemOpCommonUnaryEv, bRm, &g_iemAImpl_not);
16860 return FNIEMOP_CALL_2(iemOpCommonUnaryEv, bRm, &g_iemAImpl_neg);
16864 return FNIEMOP_CALL_2(iemOpCommonGrp3MulDivEv, bRm, &g_iemAImpl_mul);
16868 return FNIEMOP_CALL_2(iemOpCommonGrp3MulDivEv, bRm, &g_iemAImpl_imul);
16872 return FNIEMOP_CALL_2(iemOpCommonGrp3MulDivEv, bRm, &g_iemAImpl_div);
16876 return FNIEMOP_CALL_2(iemOpCommonGrp3MulDivEv, bRm, &g_iemAImpl_idiv);
16954 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
16955 switch ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK)
16959 return FNIEMOP_CALL_2(iemOpCommonUnaryEb, bRm, &g_iemAImpl_inc);
16962 return FNIEMOP_CALL_2(iemOpCommonUnaryEb, bRm, &g_iemAImpl_dec);
16972 * @param bRm The RM byte.
16974 FNIEMOP_DEF_1(iemOp_Grp5_calln_Ev, uint8_t, bRm)
16980 if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
16988 IEM_MC_FETCH_GREG_U16(u16Target, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
16996 IEM_MC_FETCH_GREG_U32(u32Target, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
17004 IEM_MC_FETCH_GREG_U64(u64Target, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
17021 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0);
17031 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0);
17041 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0);
17054 FNIEMOP_DEF_2(iemOpHlp_Grp5_far_Ep, uint8_t, bRm, FNIEMCIMPLFARBRANCH *, pfnCImpl)
17057 if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
17069 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0);
17088 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0);
17104 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0);
17119 * @param bRm The RM byte.
17121 FNIEMOP_DEF_1(iemOp_Grp5_callf_Ep, uint8_t, bRm)
17124 return FNIEMOP_CALL_2(iemOpHlp_Grp5_far_Ep, bRm, iemCImpl_callf);
17130 * @param bRm The RM byte.
17132 FNIEMOP_DEF_1(iemOp_Grp5_jmpn_Ev, uint8_t, bRm)
17138 if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
17146 IEM_MC_FETCH_GREG_U16(u16Target, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
17154 IEM_MC_FETCH_GREG_U32(u32Target, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
17162 IEM_MC_FETCH_GREG_U64(u64Target, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
17179 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0);
17189 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0);
17199 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0);
17213 * @param bRm The RM byte.
17215 FNIEMOP_DEF_1(iemOp_Grp5_jmpf_Ep, uint8_t, bRm)
17218 return FNIEMOP_CALL_2(iemOpHlp_Grp5_far_Ep, bRm, iemCImpl_FarJmp);
17224 * @param bRm The RM byte.
17226 FNIEMOP_DEF_1(iemOp_Grp5_push_Ev, uint8_t, bRm)
17232 if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
17233 return FNIEMOP_CALL_1(iemOpCommonPushGReg, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
17243 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0);
17254 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0);
17265 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0);
17280 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
17281 switch ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK)
17285 return FNIEMOP_CALL_2(iemOpCommonUnaryEv, bRm, &g_iemAImpl_inc);
17288 return FNIEMOP_CALL_2(iemOpCommonUnaryEv, bRm, &g_iemAImpl_dec);
17290 return FNIEMOP_CALL_1(iemOp_Grp5_calln_Ev, bRm);
17292 return FNIEMOP_CALL_1(iemOp_Grp5_callf_Ep, bRm);
17294 return FNIEMOP_CALL_1(iemOp_Grp5_jmpn_Ev, bRm);
17296 return FNIEMOP_CALL_1(iemOp_Grp5_jmpf_Ep, bRm);
17298 return FNIEMOP_CALL_1(iemOp_Grp5_push_Ev, bRm);