Cross Reference: /vbox/src/VBox/VMM/VMMAll/IEMAllCImpl.cpp.h

Lines Matching refs:pFpuCtx
6529     PX86FXSTATE pFpuCtx = &pCtx->CTX_SUFF(pXState)->x87;
6532     for (uint32_t i = 0; i < RT_ELEMENTS(pFpuCtx->aRegs); i++)
6534         paRegs[i].au32[0] = pFpuCtx->aRegs[i].au32[0];
6535         paRegs[i].au32[1] = pFpuCtx->aRegs[i].au32[1];
6536         paRegs[i].au16[4] = pFpuCtx->aRegs[i].au16[4];
6546     pFpuCtx->FCW   = 0x37f;
6547     pFpuCtx->FSW   = 0;
6548     pFpuCtx->FTW   = 0x00;       /* 0 - empty */
6549     pFpuCtx->FPUDP = 0;
6550     pFpuCtx->DS    = 0;
6551     pFpuCtx->Rsrvd2= 0;
6552     pFpuCtx->FPUIP = 0;
6553     pFpuCtx->CS    = 0;
6554     pFpuCtx->Rsrvd1= 0;
6555     pFpuCtx->FOP   = 0;
6607     PX86FXSTATE pFpuCtx = &pCtx->CTX_SUFF(pXState)->x87;
6610     for (uint32_t i = 0; i < RT_ELEMENTS(pFpuCtx->aRegs); i++)
6612         pFpuCtx->aRegs[i].au32[0] = paRegs[i].au32[0];
6613         pFpuCtx->aRegs[i].au32[1] = paRegs[i].au32[1];
6614         pFpuCtx->aRegs[i].au32[2] = paRegs[i].au16[4];
6615         pFpuCtx->aRegs[i].au32[3] = 0;
6642     PX86FXSTATE pFpuCtx = &pCtx->CTX_SUFF(pXState)->x87;
6643     pFpuCtx->FCW = u16Fcw & ~X86_FCW_ZERO_MASK;
6644     iemFpuRecalcExceptionStatus(pFpuCtx);
6663     PX86FXSTATE pFpuCtx = &pCtx->CTX_SUFF(pXState)->x87;
6664     unsigned const iReg1 = X86_FSW_TOP_GET(pFpuCtx->FSW);
6666     Assert(!(RT_BIT(iReg1) & pFpuCtx->FTW) || !(RT_BIT(iReg2) & pFpuCtx->FTW));
6671     if (pFpuCtx->FCW & X86_FCW_IM)
6673         if (RT_BIT(iReg1) & pFpuCtx->FTW)
6675             if (RT_BIT(iReg2) & pFpuCtx->FTW)
6676                 iemFpuStoreQNan(&pFpuCtx->aRegs[0].r80);
6678                 pFpuCtx->aRegs[0].r80 = pFpuCtx->aRegs[iStReg].r80;
6679             iemFpuStoreQNan(&pFpuCtx->aRegs[iStReg].r80);
6683             pFpuCtx->aRegs[iStReg].r80 = pFpuCtx->aRegs[0].r80;
6684             iemFpuStoreQNan(&pFpuCtx->aRegs[0].r80);
6686         pFpuCtx->FSW &= ~X86_FSW_C_MASK;
6687         pFpuCtx->FSW |= X86_FSW_C1 | X86_FSW_IE | X86_FSW_SF;
6692         pFpuCtx->FSW &= ~(X86_FSW_TOP_MASK | X86_FSW_XCPT_MASK);
6693         pFpuCtx->FSW |= X86_FSW_C1 | X86_FSW_IE | X86_FSW_SF | X86_FSW_ES | X86_FSW_B;
6696     iemFpuUpdateOpcodeAndIpWorker(pIemCpu, pCtx, pFpuCtx);
6719     PX86FXSTATE pFpuCtx = &pCtx->CTX_SUFF(pXState)->x87;
6720     uint16_t u16Fsw = pFpuCtx->FSW;
6729     if ((pFpuCtx->FTW & (RT_BIT(iReg1) | RT_BIT(iReg2))) == (RT_BIT(iReg1) | RT_BIT(iReg2)))
6731         uint32_t u32Eflags = pfnAImpl(pFpuCtx, &u16Fsw, &pFpuCtx->aRegs[0].r80, &pFpuCtx->aRegs[iStReg].r80);
6734         pFpuCtx->FSW &= ~X86_FSW_C1;
6735         pFpuCtx->FSW |= u16Fsw & ~X86_FSW_TOP_MASK;
6737             || (pFpuCtx->FCW & X86_FCW_IM) )
6743     else if (pFpuCtx->FCW & X86_FCW_IM)
6746         pFpuCtx->FSW &= ~X86_FSW_C1;
6747         pFpuCtx->FSW |= X86_FSW_IE | X86_FSW_SF;
6754         pFpuCtx->FSW &= ~X86_FSW_C1;
6755         pFpuCtx->FSW |= X86_FSW_IE | X86_FSW_SF | X86_FSW_ES | X86_FSW_B;
6764         pFpuCtx->FTW &= ~RT_BIT(iReg1);
6765         pFpuCtx->FSW &= X86_FSW_TOP_MASK;
6766         pFpuCtx->FSW |= ((iReg1 + 7) & X86_FSW_TOP_SMASK) << X86_FSW_TOP_SHIFT;
6769     iemFpuUpdateOpcodeAndIpWorker(pIemCpu, pCtx, pFpuCtx);