Lines Matching defs:uNewCrX

4776  * @param   uNewCrX         The new value.
4778 IEM_CIMPL_DEF_2(iemCImpl_load_CrX, uint8_t, iCrReg, uint64_t, uNewCrX)
4797 uNewCrX |= X86_CR0_ET; /* hardcoded */
4803 if (uNewCrX & ~(uint64_t)fValid)
4805 Log(("Trying to set reserved CR0 bits: NewCR0=%#llx InvalidBits=%#llx\n", uNewCrX, uNewCrX & ~(uint64_t)fValid));
4810 if ( (uNewCrX & X86_CR0_PG)
4811 && !(uNewCrX & X86_CR0_PE) )
4817 if ( !(uNewCrX & X86_CR0_CD)
4818 && (uNewCrX & X86_CR0_NW) )
4825 if ( (uNewCrX & X86_CR0_PG)
4847 CPUMSetGuestCR0(pVCpu, uNewCrX);
4849 pCtx->cr0 = uNewCrX;
4850 Assert(pCtx->cr0 == uNewCrX);
4855 if ( (uNewCrX & X86_CR0_PG) != (uOldCrX & X86_CR0_PG)
4859 if (uNewCrX & X86_CR0_PG)
4876 if ( (uNewCrX & (X86_CR0_PG | X86_CR0_WP | X86_CR0_PE))
4891 && ( (uNewCrX & (X86_CR0_WP | X86_CR0_AM))
4902 pCtx->cr2 = uNewCrX;
4916 if (uNewCrX & UINT64_C(0xfff0000000000000))
4918 Log(("Trying to load CR3 with invalid high bits set: %#llx\n", uNewCrX));
4930 if (uNewCrX & ~fValid)
4933 uNewCrX, uNewCrX & ~fValid));
4934 uNewCrX &= fValid;
4943 rc = CPUMSetGuestCR3(pVCpu, uNewCrX);
4947 pCtx->cr3 = uNewCrX;
4985 if (uNewCrX & ~(uint64_t)fValid)
4987 Log(("Trying to set reserved CR4 bits: NewCR4=%#llx InvalidBits=%#llx\n", uNewCrX, uNewCrX & ~(uint64_t)fValid));
4993 && !(uNewCrX & X86_CR4_PAE)
5006 rc = CPUMSetGuestCR4(pVCpu, uNewCrX);
5010 pCtx->cr4 = uNewCrX;
5011 Assert(pCtx->cr4 == uNewCrX);
5019 if ((uNewCrX ^ uOldCrX) & X86_CR4_VME)
5022 RT_BOOL(uOldCrX & X86_CR4_VME), RT_BOOL(uNewCrX & X86_CR4_VME) ));
5030 if ((uNewCrX ^ uOldCrX) & (X86_CR4_PSE | X86_CR4_PAE | X86_CR4_PGE))
5047 if (uNewCrX & ~(uint64_t)0xf)
5049 Log(("Trying to set reserved CR8 bits (%#RX64)\n", uNewCrX));
5054 PDMApicSetTPR(IEMCPU_TO_VMCPU(pIemCpu), (uint8_t)uNewCrX << 4);
5090 uint64_t uNewCrX;
5092 uNewCrX = iemGRegFetchU64(pIemCpu, iGReg);
5094 uNewCrX = iemGRegFetchU32(pIemCpu, iGReg);
5095 return IEM_CIMPL_CALL_2(iemCImpl_load_CrX, iCrReg, uNewCrX);