Lines Matching refs:pVCpu
769 PVMCPU pVCpu = IEMCPU_TO_VMCPU(pIemCpu);
772 Assert(CPUMSELREG_ARE_HIDDEN_PARTS_VALID(pVCpu, &pCtx->cs));
773 Assert(CPUMSELREG_ARE_HIDDEN_PARTS_VALID(pVCpu, &pCtx->ss));
774 Assert(CPUMSELREG_ARE_HIDDEN_PARTS_VALID(pVCpu, &pCtx->es));
775 Assert(CPUMSELREG_ARE_HIDDEN_PARTS_VALID(pVCpu, &pCtx->ds));
776 Assert(CPUMSELREG_ARE_HIDDEN_PARTS_VALID(pVCpu, &pCtx->fs));
777 Assert(CPUMSELREG_ARE_HIDDEN_PARTS_VALID(pVCpu, &pCtx->gs));
778 Assert(CPUMSELREG_ARE_HIDDEN_PARTS_VALID(pVCpu, &pCtx->ldtr));
779 Assert(CPUMSELREG_ARE_HIDDEN_PARTS_VALID(pVCpu, &pCtx->tr));
783 CPUMGuestLazyLoadHiddenCsAndSs(pVCpu);
785 pIemCpu->uCpl = CPUMGetGuestCPL(pVCpu);
816 CPUMRawLeave(pVCpu, VINF_SUCCESS);
830 PVMCPU pVCpu = IEMCPU_TO_VMCPU(pIemCpu);
833 Assert(CPUMSELREG_ARE_HIDDEN_PARTS_VALID(pVCpu, &pCtx->cs));
834 Assert(CPUMSELREG_ARE_HIDDEN_PARTS_VALID(pVCpu, &pCtx->ss));
835 Assert(CPUMSELREG_ARE_HIDDEN_PARTS_VALID(pVCpu, &pCtx->es));
836 Assert(CPUMSELREG_ARE_HIDDEN_PARTS_VALID(pVCpu, &pCtx->ds));
837 Assert(CPUMSELREG_ARE_HIDDEN_PARTS_VALID(pVCpu, &pCtx->fs));
838 Assert(CPUMSELREG_ARE_HIDDEN_PARTS_VALID(pVCpu, &pCtx->gs));
839 Assert(CPUMSELREG_ARE_HIDDEN_PARTS_VALID(pVCpu, &pCtx->ldtr));
840 Assert(CPUMSELREG_ARE_HIDDEN_PARTS_VALID(pVCpu, &pCtx->tr));
844 CPUMGuestLazyLoadHiddenCsAndSs(pVCpu);
846 pIemCpu->uCpl = CPUMGetGuestCPL(pVCpu);
886 CPUMRawLeave(pVCpu, VINF_SUCCESS);
893 RTTraceBufAddMsgF(pVCpu->CTX_SUFF(pVM)->CTX_SUFF(hTraceBuf), "I64/%u %08llx", pIemCpu->uCpl, pCtx->rip);
896 RTTraceBufAddMsgF(pVCpu->CTX_SUFF(pVM)->CTX_SUFF(hTraceBuf), "I32/%u %04x:%08x", pIemCpu->uCpl, pCtx->cs.Sel, pCtx->eip);
899 RTTraceBufAddMsgF(pVCpu->CTX_SUFF(pVM)->CTX_SUFF(hTraceBuf), "I16/%u %04x:%04x", pIemCpu->uCpl, pCtx->cs.Sel, pCtx->eip);
3917 PVMCPU pVCpu = IEMCPU_TO_VMCPU(pIemCpu);
3919 DBGFR3RegPrintf(pVM->pUVM, pVCpu->idCpu, &szRegs[0], sizeof(szRegs),
3947 DBGFR3DisasInstrEx(pVM->pUVM, pVCpu->idCpu, 0, 0,
4323 PVMCPU pVCpu = IEMCPU_TO_VMCPU(pIemCpu);
4325 DBGFR3RegPrintf(pVM->pUVM, pVCpu->idCpu, &szRegs[0], sizeof(szRegs),
4353 DBGFR3DisasInstrEx(pVM->pUVM, pVCpu->idCpu, 0, 0,
9550 PVMCPU pVCpu = IEMCPU_TO_VMCPU(pIemCpu);
9568 && TRPMHasTrap(pVCpu)
9569 && EMGetInhibitInterruptsPC(pVCpu) != pOrgCtx->rip) )
9650 CPUMSetChangedFlags(pVCpu, CPUM_CHANGED_ALL);
9672 && TRPMHasTrap(pVCpu)
9673 && EMGetInhibitInterruptsPC(pVCpu) != pOrgCtx->rip)
9679 int rc2 = TRPMQueryTrapAll(pVCpu, &u8TrapNo, &enmType, &uErrCode, &uCr2, NULL /* pu8InstLen */); AssertRC(rc2);
9680 IEMInjectTrap(pVCpu, u8TrapNo, enmType, (uint16_t)uErrCode, uCr2, 0 /* cbInstr */);
9682 TRPMResetTrap(pVCpu);
9753 PVMCPU pVCpu = VMMGetCpu(pVM);
9754 if (!pVCpu)
9756 PIEMCPU pIemCpu = &pVCpu->iem.s;
9773 PVMCPU pVCpu = VMMGetCpu(pVM);
9774 if (!pVCpu)
9776 PIEMCPU pIemCpu = &pVCpu->iem.s;
9797 PVMCPU pVCpu = VMMGetCpu(pVM);
9798 if (!pVCpu)
9800 PIEMCPU pIemCpu = &pVCpu->iem.s;
9816 PVMCPU pVCpu = VMMGetCpu(pVM);
9817 if (!pVCpu)
9819 PIEMCPU pIemCpu = &pVCpu->iem.s;
9904 PVMCPU pVCpu = IEMCPU_TO_VMCPU(pIemCpu);
9906 DBGFR3RegPrintf(pVM->pUVM, pVCpu->idCpu, &szRegs[0], sizeof(szRegs),
9934 DBGFR3DisasInstrEx(pVM->pUVM, pVCpu->idCpu, pIemCpu->uOldCs, pIemCpu->uOldRip,
9938 DBGFR3DisasInstrEx(pVM->pUVM, pVCpu->idCpu, 0, 0,
10090 PVMCPU pVCpu = IEMCPU_TO_VMCPU(pIemCpu);
10102 rc = EMR3HmSingleInstruction(pVM, pVCpu, EM_ONE_INS_FLAGS_RIP_CHANGE);
10106 && VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_INHIBIT_INTERRUPTS)
10107 && EMGetInhibitInterruptsPC(pVCpu) == pOrgCtx->rip)
10127 rc = REMR3EmulateInstruction(pVM, pVCpu);
10464 * @param pVCpu The cross context virtual CPU structure of the caller.
10471 static void iemLogCurInstr(PVMCPU pVCpu, PCPUMCTX pCtx, bool fSameCtx)
10479 DBGFR3DisasInstrEx(pVCpu->pVMR3->pUVM, pVCpu->idCpu, 0, 0,
10485 switch (pVCpu->iem.s.enmCpuMode)
10496 DBGFR3DisasInstrEx(pVCpu->pVMR3->pUVM, pVCpu->idCpu, pCtx->cs.Sel, pCtx->rip, fFlags,
10516 DBGFR3Info(pVCpu->pVMR3->pUVM, "cpumguest", "verbose", NULL);
10592 * @param pVCpu The current virtual CPU.
10597 DECL_FORCE_INLINE(VBOXSTRICTRC) iemExecOneInner(PVMCPU pVCpu, PIEMCPU pIemCpu, bool fExecuteInhibit)
10613 && VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_INHIBIT_INTERRUPTS)
10614 && EMGetInhibitInterruptsPC(pVCpu) == pIemCpu->CTX_SUFF(pCtx)->rip )
10629 EMSetInhibitInterruptsPC(pVCpu, UINT64_C(0x7777555533331111));
10637 Assert(CPUMSELREG_ARE_HIDDEN_PARTS_VALID(pVCpu, &pIemCpu->CTX_SUFF(pCtx)->cs));
10638 Assert(CPUMSELREG_ARE_HIDDEN_PARTS_VALID(pVCpu, &pIemCpu->CTX_SUFF(pCtx)->ss));
10640 Assert(CPUMSELREG_ARE_HIDDEN_PARTS_VALID(pVCpu, &pIemCpu->CTX_SUFF(pCtx)->es));
10641 Assert(CPUMSELREG_ARE_HIDDEN_PARTS_VALID(pVCpu, &pIemCpu->CTX_SUFF(pCtx)->ds));
10642 Assert(CPUMSELREG_ARE_HIDDEN_PARTS_VALID(pVCpu, &pIemCpu->CTX_SUFF(pCtx)->fs));
10643 Assert(CPUMSELREG_ARE_HIDDEN_PARTS_VALID(pVCpu, &pIemCpu->CTX_SUFF(pCtx)->gs));
10655 * @param pVCpu The cross context virtual CPU structure of the caller.
10659 DECLINLINE(VBOXSTRICTRC) iemRCRawMaybeReenter(PIEMCPU pIemCpu, PVMCPU pVCpu, PCPUMCTX pCtx, VBOXSTRICTRC rcStrict)
10662 CPUMRawEnter(pVCpu);
10672 * @param pVCpu The current virtual CPU.
10674 VMMDECL(VBOXSTRICTRC) IEMExecOne(PVMCPU pVCpu)
10676 PIEMCPU pIemCpu = &pVCpu->iem.s;
10683 iemLogCurInstr(pVCpu, pCtx, true);
10691 rcStrict = iemExecOneInner(pVCpu, pIemCpu, true);
10700 rcStrict = iemRCRawMaybeReenter(pIemCpu, pVCpu, pIemCpu->CTX_SUFF(pCtx), rcStrict);
10709 VMMDECL(VBOXSTRICTRC) IEMExecOneEx(PVMCPU pVCpu, PCPUMCTXCORE pCtxCore, uint32_t *pcbWritten)
10711 PIEMCPU pIemCpu = &pVCpu->iem.s;
10712 PCPUMCTX pCtx = pVCpu->iem.s.CTX_SUFF(pCtx);
10719 rcStrict = iemExecOneInner(pVCpu, pIemCpu, true);
10725 rcStrict = iemRCRawMaybeReenter(pIemCpu, pVCpu, pCtx, rcStrict);
10731 VMMDECL(VBOXSTRICTRC) IEMExecOneWithPrefetchedByPC(PVMCPU pVCpu, PCPUMCTXCORE pCtxCore, uint64_t OpcodeBytesPC,
10734 PIEMCPU pIemCpu = &pVCpu->iem.s;
10735 PCPUMCTX pCtx = pVCpu->iem.s.CTX_SUFF(pCtx);
10751 rcStrict = iemExecOneInner(pVCpu, pIemCpu, true);
10755 rcStrict = iemRCRawMaybeReenter(pIemCpu, pVCpu, pCtx, rcStrict);
10761 VMMDECL(VBOXSTRICTRC) IEMExecOneBypassEx(PVMCPU pVCpu, PCPUMCTXCORE pCtxCore, uint32_t *pcbWritten)
10763 PIEMCPU pIemCpu = &pVCpu->iem.s;
10764 PCPUMCTX pCtx = pVCpu->iem.s.CTX_SUFF(pCtx);
10771 rcStrict = iemExecOneInner(pVCpu, pIemCpu, false);
10777 rcStrict = iemRCRawMaybeReenter(pIemCpu, pVCpu, pCtx, rcStrict);
10783 VMMDECL(VBOXSTRICTRC) IEMExecOneBypassWithPrefetchedByPC(PVMCPU pVCpu, PCPUMCTXCORE pCtxCore, uint64_t OpcodeBytesPC,
10786 PIEMCPU pIemCpu = &pVCpu->iem.s;
10787 PCPUMCTX pCtx = pVCpu->iem.s.CTX_SUFF(pCtx);
10802 rcStrict = iemExecOneInner(pVCpu, pIemCpu, false);
10805 rcStrict = iemRCRawMaybeReenter(pIemCpu, pVCpu, pCtx, rcStrict);
10811 VMMDECL(VBOXSTRICTRC) IEMExecLots(PVMCPU pVCpu)
10813 PIEMCPU pIemCpu = &pVCpu->iem.s;
10824 && TRPMHasTrap(pVCpu)
10825 && EMGetInhibitInterruptsPC(pVCpu) != pCtx->rip)
10831 int rc2 = TRPMQueryTrapAll(pVCpu, &u8TrapNo, &enmType, &uErrCode, &uCr2, NULL /* pu8InstLen */); AssertRC(rc2);
10832 IEMInjectTrap(pVCpu, u8TrapNo, enmType, (uint16_t)uErrCode, uCr2, 0 /* cbInstr */);
10834 TRPMResetTrap(pVCpu);
10845 iemLogCurInstr(pVCpu, pCtx, true);
10853 rcStrict = iemExecOneInner(pVCpu, pIemCpu, true);
10866 rcStrict = iemRCRawMaybeReenter(pIemCpu, pVCpu, pIemCpu->CTX_SUFF(pCtx), rcStrict);
10882 * @param pVCpu The current virtual CPU.
10891 VMM_INT_DECL(VBOXSTRICTRC) IEMInjectTrap(PVMCPU pVCpu, uint8_t u8TrapNo, TRPMEVENT enmType, uint16_t uErrCode, RTGCPTR uCr2,
10894 iemInitDecoder(&pVCpu->iem.s, false);
10896 RTTraceBufAddMsgF(pVCpu->CTX_SUFF(pVM)->CTX_SUFF(hTraceBuf), "IEMInjectTrap: %x %d %x %llx",
10932 VMCPU_FF_SET(pVCpu, VMCPU_FF_BLOCK_NMIS);
10940 return iemRaiseXcptOrInt(&pVCpu->iem.s, cbInstr, u8TrapNo, fFlags, uErrCode, uCr2);
10948 * @param pVCpu Pointer to the VMCPU.
10950 VMMDECL(VBOXSTRICTRC) IEMInjectTrpmEvent(PVMCPU pVCpu)
10960 int rc = TRPMQueryTrapAll(pVCpu, &u8TrapNo, &enmType, &uErrCode, &uCr2, &cbInstr);
10964 VBOXSTRICTRC rcStrict = IEMInjectTrap(pVCpu, u8TrapNo, enmType, uErrCode, uCr2, cbInstr);
10971 TRPMResetTrap(pVCpu);
10997 * @param pVCpu The current virtual CPU.
11000 VMM_INT_DECL(int) IEMExecInstr_iret(PVMCPU pVCpu, PCPUMCTXCORE pCtxCore)
11002 PIEMCPU pIemCpu = &pVCpu->iem.s;
11003 PCPUMCTX pCtx = pVCpu->iem.s.CTX_SUFF(pCtx);
11039 * @param pVCpu The cross context per virtual CPU structure.
11047 VMM_INT_DECL(VBOXSTRICTRC) IEMExecStringIoWrite(PVMCPU pVCpu, uint8_t cbValue, IEMMODE enmAddrMode,
11056 PIEMCPU pIemCpu = &pVCpu->iem.s;
11158 * @param pVCpu The cross context per virtual CPU structure.
11165 VMM_INT_DECL(VBOXSTRICTRC) IEMExecStringIoRead(PVMCPU pVCpu, uint8_t cbValue, IEMMODE enmAddrMode,
11173 PIEMCPU pIemCpu = &pVCpu->iem.s;
11272 * @param pVCpu The cross context per virtual CPU structure.
11279 VMM_INT_DECL(VBOXSTRICTRC) IEMExecDecodedMovCRxWrite(PVMCPU pVCpu, uint8_t cbInstr, uint8_t iCrReg, uint8_t iGReg)
11285 PIEMCPU pIemCpu = &pVCpu->iem.s;
11296 * @param pVCpu The cross context per virtual CPU structure.
11303 VMM_INT_DECL(VBOXSTRICTRC) IEMExecDecodedMovCRxRead(PVMCPU pVCpu, uint8_t cbInstr, uint8_t iGReg, uint8_t iCrReg)
11309 PIEMCPU pIemCpu = &pVCpu->iem.s;
11320 * @param pVCpu The cross context per virtual CPU structure.
11325 VMM_INT_DECL(VBOXSTRICTRC) IEMExecDecodedClts(PVMCPU pVCpu, uint8_t cbInstr)
11329 PIEMCPU pIemCpu = &pVCpu->iem.s;
11340 * @param pVCpu The cross context per virtual CPU structure.
11346 VMM_INT_DECL(VBOXSTRICTRC) IEMExecDecodedLmsw(PVMCPU pVCpu, uint8_t cbInstr, uint16_t uValue)
11350 PIEMCPU pIemCpu = &pVCpu->iem.s;
11363 * @param pVCpu The cross context per virtual CPU structure of the
11367 * @threads EMT(pVCpu)
11369 VMM_INT_DECL(VBOXSTRICTRC) IEMExecDecodedXsetbv(PVMCPU pVCpu, uint8_t cbInstr)
11373 PIEMCPU pIemCpu = &pVCpu->iem.s;