Cross Reference: /vbox/src/VBox/VMM/VMMAll/IEMAll.cpp

Lines Matching refs:aRegs
5215     RTFLOAT80U r80Tmp = pFpuCtx->aRegs[7].r80;
5216     pFpuCtx->aRegs[7].r80 = pFpuCtx->aRegs[6].r80;
5217     pFpuCtx->aRegs[6].r80 = pFpuCtx->aRegs[5].r80;
5218     pFpuCtx->aRegs[5].r80 = pFpuCtx->aRegs[4].r80;
5219     pFpuCtx->aRegs[4].r80 = pFpuCtx->aRegs[3].r80;
5220     pFpuCtx->aRegs[3].r80 = pFpuCtx->aRegs[2].r80;
5221     pFpuCtx->aRegs[2].r80 = pFpuCtx->aRegs[1].r80;
5222     pFpuCtx->aRegs[1].r80 = pFpuCtx->aRegs[0].r80;
5223     pFpuCtx->aRegs[0].r80 = r80Tmp;
5236     RTFLOAT80U r80Tmp = pFpuCtx->aRegs[0].r80;
5237     pFpuCtx->aRegs[0].r80 = pFpuCtx->aRegs[1].r80;
5238     pFpuCtx->aRegs[1].r80 = pFpuCtx->aRegs[2].r80;
5239     pFpuCtx->aRegs[2].r80 = pFpuCtx->aRegs[3].r80;
5240     pFpuCtx->aRegs[3].r80 = pFpuCtx->aRegs[4].r80;
5241     pFpuCtx->aRegs[4].r80 = pFpuCtx->aRegs[5].r80;
5242     pFpuCtx->aRegs[5].r80 = pFpuCtx->aRegs[6].r80;
5243     pFpuCtx->aRegs[6].r80 = pFpuCtx->aRegs[7].r80;
5244     pFpuCtx->aRegs[7].r80 = r80Tmp;
5273         pFpuCtx->aRegs[7].r80 = pResult->r80Result;
5279         iemFpuStoreQNan(&pFpuCtx->aRegs[7].r80);
5311     pFpuCtx->aRegs[iStReg].r80 = pResult->r80Result;
5419         pFpuCtx->aRegs[0].r80 = pResult->r80Result1;
5420         pFpuCtx->aRegs[7].r80 = pResult->r80Result2;
5426         iemFpuStoreQNan(&pFpuCtx->aRegs[0].r80);
5427         iemFpuStoreQNan(&pFpuCtx->aRegs[7].r80);
5692             iemFpuStoreQNan(&pFpuCtx->aRegs[iStReg].r80);
5779         iemFpuStoreQNan(&pFpuCtx->aRegs[7].r80);
5806         iemFpuStoreQNan(&pFpuCtx->aRegs[0].r80);
5807         iemFpuStoreQNan(&pFpuCtx->aRegs[7].r80);
5834         iemFpuStoreQNan(&pFpuCtx->aRegs[7].r80);
5894         *ppRef = &pFpuCtx->aRegs[iStReg].r80;
5910         *ppRef0 = &pFpuCtx->aRegs[iStReg0].r80;
5911         *ppRef1 = &pFpuCtx->aRegs[iStReg1].r80;
5926         *ppRef0 = &pFpuCtx->aRegs[iStReg0].r80;
5968             PCRTFLOAT80U const pr80Reg = &pFpuCtx->aRegs[iSt].r80;
8346     do { pIemCpu->CTX_SUFF(pCtx)->CTX_SUFF(pXState)->x87.aRegs[a_iSt].r80 = *(a_pr80Src); } while (0)
8441     do { (a_u64Value) = pIemCpu->CTX_SUFF(pCtx)->CTX_SUFF(pXState)->x87.aRegs[(a_iMReg)].mmx; } while (0)
8443     do { (a_u32Value) = pIemCpu->CTX_SUFF(pCtx)->CTX_SUFF(pXState)->x87.aRegs[(a_iMReg)].au32[0]; } while (0)
8445     do { pIemCpu->CTX_SUFF(pCtx)->CTX_SUFF(pXState)->x87.aRegs[(a_iMReg)].mmx = (a_u64Value); } while (0)
8447     do { pIemCpu->CTX_SUFF(pCtx)->CTX_SUFF(pXState)->x87.aRegs[(a_iMReg)].mmx = (uint32_t)(a_u32Value); } while (0)
8449         (a_pu64Dst) = (&pIemCpu->CTX_SUFF(pCtx)->CTX_SUFF(pXState)->x87.aRegs[(a_iMReg)].mmx)
8451         (a_pu64Dst) = ((uint64_t const *)&pIemCpu->CTX_SUFF(pCtx)->CTX_SUFF(pXState)->x87.aRegs[(a_iMReg)].mmx)
8453         (a_pu32Dst) = ((uint32_t const *)&pIemCpu->CTX_SUFF(pCtx)->CTX_SUFF(pXState)->x87.aRegs[(a_iMReg)].mmx)
10229             CHECK_XSTATE_FIELD(x87.aRegs[0].au64[0]); CHECK_XSTATE_FIELD(x87.aRegs[0].au64[1]);
10230             CHECK_XSTATE_FIELD(x87.aRegs[1].au64[0]); CHECK_XSTATE_FIELD(x87.aRegs[1].au64[1]);
10231             CHECK_XSTATE_FIELD(x87.aRegs[2].au64[0]); CHECK_XSTATE_FIELD(x87.aRegs[2].au64[1]);
10232             CHECK_XSTATE_FIELD(x87.aRegs[3].au64[0]); CHECK_XSTATE_FIELD(x87.aRegs[3].au64[1]);
10233             CHECK_XSTATE_FIELD(x87.aRegs[4].au64[0]); CHECK_XSTATE_FIELD(x87.aRegs[4].au64[1]);
10234             CHECK_XSTATE_FIELD(x87.aRegs[5].au64[0]); CHECK_XSTATE_FIELD(x87.aRegs[5].au64[1]);
10235             CHECK_XSTATE_FIELD(x87.aRegs[6].au64[0]); CHECK_XSTATE_FIELD(x87.aRegs[6].au64[1]);
10236             CHECK_XSTATE_FIELD(x87.aRegs[7].au64[0]); CHECK_XSTATE_FIELD(x87.aRegs[7].au64[1]);