Lines Matching defs:pVCpu
41 * @param pVCpu Pointer to the VMCPU.
44 VMM_INT_DECL(int) gimHvHypercall(PVMCPU pVCpu, PCPUMCTX pCtx)
46 PVM pVM = pVCpu->CTX_SUFF(pVM);
60 * @param pVCpu Pointer to the VMCPU.
62 VMM_INT_DECL(bool) gimHvAreHypercallsEnabled(PVMCPU pVCpu)
64 return MSR_GIM_HV_HYPERCALL_IS_ENABLED(pVCpu->CTX_SUFF(pVM)->gim.s.u.Hv.u64HypercallMsr);
88 * @param pVCpu Pointer to the VMCPU.
93 VMM_INT_DECL(VBOXSTRICTRC) gimHvReadMsr(PVMCPU pVCpu, uint32_t idMsr, PCCPUMMSRRANGE pRange, uint64_t *puValue)
96 PVM pVM = pVCpu->CTX_SUFF(pVM);
104 uint64_t u64Tsc = TMCpuTickGet(pVCpu);
112 *puValue = pVCpu->idCpu;
116 PDMApicReadMSR(pVM, pVCpu->idCpu, 0x80, puValue);
120 PDMApicReadMSR(pVM, pVCpu->idCpu, 0x0B, puValue);
124 PDMApicReadMSR(pVM, pVCpu->idCpu, 0x30, puValue);
178 * @param pVCpu Pointer to the VMCPU.
183 VMM_INT_DECL(VBOXSTRICTRC) gimHvWriteMsr(PVMCPU pVCpu, uint32_t idMsr, PCCPUMMSRRANGE pRange, uint64_t uRawValue)
186 PVM pVM = pVCpu->CTX_SUFF(pVM);
192 PDMApicWriteMSR(pVM, pVCpu->idCpu, 0x80, uRawValue);
196 PDMApicWriteMSR(pVM, pVCpu->idCpu, 0x0B, uRawValue);
200 PDMApicWriteMSR(pVM, pVCpu->idCpu, 0x30, uRawValue);