Lines Matching refs:pVCpu
89 * @param pVCpu The current Virtual CPU.
92 static void cpumGuestLazyLoadHiddenSelectorReg(PVMCPU pVCpu, PCPUMSELREG pSReg)
94 Assert(!CPUMSELREG_ARE_HIDDEN_PARTS_VALID(pVCpu, pSReg));
95 Assert(!HMIsEnabled(pVCpu->CTX_SUFF(pVM)));
96 Assert((uintptr_t)(pSReg - &pVCpu->cpum.s.Guest.es) < X86_SREG_COUNT);
98 if (pVCpu->cpum.s.Guest.eflags.Bits.u1VM)
102 pSReg->Attr.n.u4Type = pSReg == &pVCpu->cpum.s.Guest.cs ? X86_SEL_TYPE_ER_ACC : X86_SEL_TYPE_RW_ACC;
112 else if (!(pVCpu->cpum.s.Guest.cr0 & X86_CR0_PE))
124 Assert(!CPUMIsGuestInLongMode(pVCpu));
134 SELMLoadHiddenSelectorReg(pVCpu, &pVCpu->cpum.s.Guest, pSReg);
143 * @param pVCpu The current virtual CPU.
145 VMM_INT_DECL(void) CPUMGuestLazyLoadHiddenCsAndSs(PVMCPU pVCpu)
147 CPUMSELREG_LAZY_LOAD_HIDDEN_PARTS(pVCpu, &pVCpu->cpum.s.Guest.cs);
148 CPUMSELREG_LAZY_LOAD_HIDDEN_PARTS(pVCpu, &pVCpu->cpum.s.Guest.ss);
155 * @param pVCpu The current virtual CPU.
157 VMM_INT_DECL(void) CPUMGuestLazyLoadHiddenSelectorReg(PVMCPU pVCpu, PCPUMSELREG pSReg)
159 CPUMSELREG_LAZY_LOAD_HIDDEN_PARTS(pVCpu, pSReg);
173 VMMDECL(PCCPUMCTXCORE) CPUMGetHyperCtxCore(PVMCPU pVCpu)
175 return CPUMCTX2CORE(&pVCpu->cpum.s.Hyper);
182 * @param pVCpu Pointer to the VMCPU.
184 VMMDECL(PCPUMCTX) CPUMGetHyperCtxPtr(PVMCPU pVCpu)
186 return &pVCpu->cpum.s.Hyper;
190 VMMDECL(void) CPUMSetHyperGDTR(PVMCPU pVCpu, uint32_t addr, uint16_t limit)
192 pVCpu->cpum.s.Hyper.gdtr.cbGdt = limit;
193 pVCpu->cpum.s.Hyper.gdtr.pGdt = addr;
197 VMMDECL(void) CPUMSetHyperIDTR(PVMCPU pVCpu, uint32_t addr, uint16_t limit)
199 pVCpu->cpum.s.Hyper.idtr.cbIdt = limit;
200 pVCpu->cpum.s.Hyper.idtr.pIdt = addr;
204 VMMDECL(void) CPUMSetHyperCR3(PVMCPU pVCpu, uint32_t cr3)
206 pVCpu->cpum.s.Hyper.cr3 = cr3;
214 VMMDECL(uint32_t) CPUMGetHyperCR3(PVMCPU pVCpu)
216 return pVCpu->cpum.s.Hyper.cr3;
220 VMMDECL(void) CPUMSetHyperCS(PVMCPU pVCpu, RTSEL SelCS)
222 pVCpu->cpum.s.Hyper.cs.Sel = SelCS;
226 VMMDECL(void) CPUMSetHyperDS(PVMCPU pVCpu, RTSEL SelDS)
228 pVCpu->cpum.s.Hyper.ds.Sel = SelDS;
232 VMMDECL(void) CPUMSetHyperES(PVMCPU pVCpu, RTSEL SelES)
234 pVCpu->cpum.s.Hyper.es.Sel = SelES;
238 VMMDECL(void) CPUMSetHyperFS(PVMCPU pVCpu, RTSEL SelFS)
240 pVCpu->cpum.s.Hyper.fs.Sel = SelFS;
244 VMMDECL(void) CPUMSetHyperGS(PVMCPU pVCpu, RTSEL SelGS)
246 pVCpu->cpum.s.Hyper.gs.Sel = SelGS;
250 VMMDECL(void) CPUMSetHyperSS(PVMCPU pVCpu, RTSEL SelSS)
252 pVCpu->cpum.s.Hyper.ss.Sel = SelSS;
256 VMMDECL(void) CPUMSetHyperESP(PVMCPU pVCpu, uint32_t u32ESP)
258 pVCpu->cpum.s.Hyper.esp = u32ESP;
262 VMMDECL(void) CPUMSetHyperEDX(PVMCPU pVCpu, uint32_t u32ESP)
264 pVCpu->cpum.s.Hyper.esp = u32ESP;
268 VMMDECL(int) CPUMSetHyperEFlags(PVMCPU pVCpu, uint32_t Efl)
270 pVCpu->cpum.s.Hyper.eflags.u32 = Efl;
275 VMMDECL(void) CPUMSetHyperEIP(PVMCPU pVCpu, uint32_t u32EIP)
277 pVCpu->cpum.s.Hyper.eip = u32EIP;
289 * @param pVCpu The current virtual CPU.
295 VMM_INT_DECL(void) CPUMSetHyperState(PVMCPU pVCpu, uint32_t u32EIP, uint32_t u32ESP, uint32_t u32EAX, uint32_t u32EDX)
297 pVCpu->cpum.s.Hyper.eip = u32EIP;
298 pVCpu->cpum.s.Hyper.esp = u32ESP;
299 pVCpu->cpum.s.Hyper.eax = u32EAX;
300 pVCpu->cpum.s.Hyper.edx = u32EDX;
301 pVCpu->cpum.s.Hyper.ecx = 0;
302 pVCpu->cpum.s.Hyper.ebx = 0;
303 pVCpu->cpum.s.Hyper.ebp = 0;
304 pVCpu->cpum.s.Hyper.esi = 0;
305 pVCpu->cpum.s.Hyper.edi = 0;
306 pVCpu->cpum.s.Hyper.eflags.u = X86_EFL_1;
310 VMMDECL(void) CPUMSetHyperTR(PVMCPU pVCpu, RTSEL SelTR)
312 pVCpu->cpum.s.Hyper.tr.Sel = SelTR;
316 VMMDECL(void) CPUMSetHyperLDTR(PVMCPU pVCpu, RTSEL SelLDTR)
318 pVCpu->cpum.s.Hyper.ldtr.Sel = SelLDTR;
360 VMMDECL(void) CPUMSetHyperDR0(PVMCPU pVCpu, RTGCUINTREG uDr0)
362 pVCpu->cpum.s.Hyper.dr[0] = uDr0;
363 MAYBE_LOAD_DRx(pVCpu, ASMSetDR0, uDr0);
367 VMMDECL(void) CPUMSetHyperDR1(PVMCPU pVCpu, RTGCUINTREG uDr1)
369 pVCpu->cpum.s.Hyper.dr[1] = uDr1;
370 MAYBE_LOAD_DRx(pVCpu, ASMSetDR1, uDr1);
374 VMMDECL(void) CPUMSetHyperDR2(PVMCPU pVCpu, RTGCUINTREG uDr2)
376 pVCpu->cpum.s.Hyper.dr[2] = uDr2;
377 MAYBE_LOAD_DRx(pVCpu, ASMSetDR2, uDr2);
381 VMMDECL(void) CPUMSetHyperDR3(PVMCPU pVCpu, RTGCUINTREG uDr3)
383 pVCpu->cpum.s.Hyper.dr[3] = uDr3;
384 MAYBE_LOAD_DRx(pVCpu, ASMSetDR3, uDr3);
388 VMMDECL(void) CPUMSetHyperDR6(PVMCPU pVCpu, RTGCUINTREG uDr6)
390 pVCpu->cpum.s.Hyper.dr[6] = uDr6;
394 VMMDECL(void) CPUMSetHyperDR7(PVMCPU pVCpu, RTGCUINTREG uDr7)
396 pVCpu->cpum.s.Hyper.dr[7] = uDr7;
398 MAYBE_LOAD_DRx(pVCpu, ASMSetDR7, uDr7);
403 VMMDECL(RTSEL) CPUMGetHyperCS(PVMCPU pVCpu)
405 return pVCpu->cpum.s.Hyper.cs.Sel;
409 VMMDECL(RTSEL) CPUMGetHyperDS(PVMCPU pVCpu)
411 return pVCpu->cpum.s.Hyper.ds.Sel;
415 VMMDECL(RTSEL) CPUMGetHyperES(PVMCPU pVCpu)
417 return pVCpu->cpum.s.Hyper.es.Sel;
421 VMMDECL(RTSEL) CPUMGetHyperFS(PVMCPU pVCpu)
423 return pVCpu->cpum.s.Hyper.fs.Sel;
427 VMMDECL(RTSEL) CPUMGetHyperGS(PVMCPU pVCpu)
429 return pVCpu->cpum.s.Hyper.gs.Sel;
433 VMMDECL(RTSEL) CPUMGetHyperSS(PVMCPU pVCpu)
435 return pVCpu->cpum.s.Hyper.ss.Sel;
439 VMMDECL(uint32_t) CPUMGetHyperEAX(PVMCPU pVCpu)
441 return pVCpu->cpum.s.Hyper.eax;
445 VMMDECL(uint32_t) CPUMGetHyperEBX(PVMCPU pVCpu)
447 return pVCpu->cpum.s.Hyper.ebx;
451 VMMDECL(uint32_t) CPUMGetHyperECX(PVMCPU pVCpu)
453 return pVCpu->cpum.s.Hyper.ecx;
457 VMMDECL(uint32_t) CPUMGetHyperEDX(PVMCPU pVCpu)
459 return pVCpu->cpum.s.Hyper.edx;
463 VMMDECL(uint32_t) CPUMGetHyperESI(PVMCPU pVCpu)
465 return pVCpu->cpum.s.Hyper.esi;
469 VMMDECL(uint32_t) CPUMGetHyperEDI(PVMCPU pVCpu)
471 return pVCpu->cpum.s.Hyper.edi;
475 VMMDECL(uint32_t) CPUMGetHyperEBP(PVMCPU pVCpu)
477 return pVCpu->cpum.s.Hyper.ebp;
481 VMMDECL(uint32_t) CPUMGetHyperESP(PVMCPU pVCpu)
483 return pVCpu->cpum.s.Hyper.esp;
487 VMMDECL(uint32_t) CPUMGetHyperEFlags(PVMCPU pVCpu)
489 return pVCpu->cpum.s.Hyper.eflags.u32;
493 VMMDECL(uint32_t) CPUMGetHyperEIP(PVMCPU pVCpu)
495 return pVCpu->cpum.s.Hyper.eip;
499 VMMDECL(uint64_t) CPUMGetHyperRIP(PVMCPU pVCpu)
501 return pVCpu->cpum.s.Hyper.rip;
505 VMMDECL(uint32_t) CPUMGetHyperIDTR(PVMCPU pVCpu, uint16_t *pcbLimit)
508 *pcbLimit = pVCpu->cpum.s.Hyper.idtr.cbIdt;
509 return pVCpu->cpum.s.Hyper.idtr.pIdt;
513 VMMDECL(uint32_t) CPUMGetHyperGDTR(PVMCPU pVCpu, uint16_t *pcbLimit)
516 *pcbLimit = pVCpu->cpum.s.Hyper.gdtr.cbGdt;
517 return pVCpu->cpum.s.Hyper.gdtr.pGdt;
521 VMMDECL(RTSEL) CPUMGetHyperLDTR(PVMCPU pVCpu)
523 return pVCpu->cpum.s.Hyper.ldtr.Sel;
527 VMMDECL(RTGCUINTREG) CPUMGetHyperDR0(PVMCPU pVCpu)
529 return pVCpu->cpum.s.Hyper.dr[0];
533 VMMDECL(RTGCUINTREG) CPUMGetHyperDR1(PVMCPU pVCpu)
535 return pVCpu->cpum.s.Hyper.dr[1];
539 VMMDECL(RTGCUINTREG) CPUMGetHyperDR2(PVMCPU pVCpu)
541 return pVCpu->cpum.s.Hyper.dr[2];
545 VMMDECL(RTGCUINTREG) CPUMGetHyperDR3(PVMCPU pVCpu)
547 return pVCpu->cpum.s.Hyper.dr[3];
551 VMMDECL(RTGCUINTREG) CPUMGetHyperDR6(PVMCPU pVCpu)
553 return pVCpu->cpum.s.Hyper.dr[6];
557 VMMDECL(RTGCUINTREG) CPUMGetHyperDR7(PVMCPU pVCpu)
559 return pVCpu->cpum.s.Hyper.dr[7];
567 * @param pVCpu Handle to the virtual cpu.
569 VMMDECL(PCCPUMCTXCORE) CPUMGetGuestCtxCore(PVMCPU pVCpu)
571 return CPUMCTX2CORE(&pVCpu->cpum.s.Guest);
579 * @param pVCpu Handle to the virtual cpu.
581 VMMDECL(PCPUMCTX) CPUMQueryGuestCtxPtr(PVMCPU pVCpu)
583 return &pVCpu->cpum.s.Guest;
586 VMMDECL(int) CPUMSetGuestGDTR(PVMCPU pVCpu, uint64_t GCPtrBase, uint16_t cbLimit)
590 if (!HMIsEnabled(pVCpu->CTX_SUFF(pVM)))
591 VMCPU_FF_SET(pVCpu, VMCPU_FF_SELM_SYNC_GDT);
594 pVCpu->cpum.s.Guest.gdtr.cbGdt = cbLimit;
595 pVCpu->cpum.s.Guest.gdtr.pGdt = GCPtrBase;
596 pVCpu->cpum.s.fChanged |= CPUM_CHANGED_GDTR;
600 VMMDECL(int) CPUMSetGuestIDTR(PVMCPU pVCpu, uint64_t GCPtrBase, uint16_t cbLimit)
604 if (!HMIsEnabled(pVCpu->CTX_SUFF(pVM)))
605 VMCPU_FF_SET(pVCpu, VMCPU_FF_TRPM_SYNC_IDT);
608 pVCpu->cpum.s.Guest.idtr.cbIdt = cbLimit;
609 pVCpu->cpum.s.Guest.idtr.pIdt = GCPtrBase;
610 pVCpu->cpum.s.fChanged |= CPUM_CHANGED_IDTR;
614 VMMDECL(int) CPUMSetGuestTR(PVMCPU pVCpu, uint16_t tr)
618 if (!HMIsEnabled(pVCpu->CTX_SUFF(pVM)))
619 VMCPU_FF_SET(pVCpu, VMCPU_FF_SELM_SYNC_TSS);
622 pVCpu->cpum.s.Guest.tr.Sel = tr;
623 pVCpu->cpum.s.fChanged |= CPUM_CHANGED_TR;
627 VMMDECL(int) CPUMSetGuestLDTR(PVMCPU pVCpu, uint16_t ldtr)
632 || pVCpu->cpum.s.Guest.ldtr.Sel != 0)
633 && !HMIsEnabled(pVCpu->CTX_SUFF(pVM)))
634 VMCPU_FF_SET(pVCpu, VMCPU_FF_SELM_SYNC_LDT);
637 pVCpu->cpum.s.Guest.ldtr.Sel = ldtr;
639 pVCpu->cpum.s.Guest.ldtr.ValidSel = 0;
640 pVCpu->cpum.s.Guest.ldtr.fFlags = 0;
641 pVCpu->cpum.s.fChanged |= CPUM_CHANGED_LDTR;
654 * @param pVCpu Handle to the virtual cpu.
657 VMMDECL(int) CPUMSetGuestCR0(PVMCPU pVCpu, uint64_t cr0)
665 != (pVCpu->cpum.s.Guest.cr0 & (X86_CR0_TS | X86_CR0_EM | X86_CR0_MP)))
667 if (!(pVCpu->cpum.s.fUseFlags & CPUM_USED_FPU))
673 if ((cr0 & X86_CR0_EM) != (pVCpu->cpum.s.Guest.cr0 & X86_CR0_EM))
677 AssertMsg((HyperCR0 & X86_CR0_EM) == (pVCpu->cpum.s.Guest.cr0 & X86_CR0_EM), ("%#x\n", HyperCR0));
688 AssertMsg((HyperCR0 & X86_CR0_EM) == (pVCpu->cpum.s.Guest.cr0 & X86_CR0_EM), ("%#x\n", HyperCR0));
700 == (pVCpu->cpum.s.Guest.cr0 & (X86_CR0_TS | X86_CR0_EM | X86_CR0_MP)),
701 ("%#x %#x\n", HyperCR0, pVCpu->cpum.s.Guest.cr0));
715 != (pVCpu->cpum.s.Guest.cr0 & (X86_CR0_PG | X86_CR0_WP | X86_CR0_PE)))
716 pVCpu->cpum.s.fChanged |= CPUM_CHANGED_GLOBAL_TLB_FLUSH;
717 pVCpu->cpum.s.fChanged |= CPUM_CHANGED_CR0;
722 if (((cr0 ^ pVCpu->cpum.s.Guest.cr0) & X86_CR0_WP) && (cr0 & X86_CR0_WP))
723 PGMCr0WpEnabled(pVCpu);
725 pVCpu->cpum.s.Guest.cr0 = cr0 | X86_CR0_ET;
730 VMMDECL(int) CPUMSetGuestCR2(PVMCPU pVCpu, uint64_t cr2)
732 pVCpu->cpum.s.Guest.cr2 = cr2;
737 VMMDECL(int) CPUMSetGuestCR3(PVMCPU pVCpu, uint64_t cr3)
739 pVCpu->cpum.s.Guest.cr3 = cr3;
740 pVCpu->cpum.s.fChanged |= CPUM_CHANGED_CR3;
745 VMMDECL(int) CPUMSetGuestCR4(PVMCPU pVCpu, uint64_t cr4)
751 != (pVCpu->cpum.s.Guest.cr4 & X86_CR4_OSXSAVE) )
753 PVM pVM = pVCpu->CTX_SUFF(pVM);
761 != (pVCpu->cpum.s.Guest.cr4 & (X86_CR4_PGE | X86_CR4_PAE | X86_CR4_PSE)))
762 pVCpu->cpum.s.fChanged |= CPUM_CHANGED_GLOBAL_TLB_FLUSH;
764 pVCpu->cpum.s.fChanged |= CPUM_CHANGED_CR4;
765 pVCpu->cpum.s.Guest.cr4 = cr4;
770 VMMDECL(int) CPUMSetGuestEFlags(PVMCPU pVCpu, uint32_t eflags)
772 pVCpu->cpum.s.Guest.eflags.u32 = eflags;
777 VMMDECL(int) CPUMSetGuestEIP(PVMCPU pVCpu, uint32_t eip)
779 pVCpu->cpum.s.Guest.eip = eip;
784 VMMDECL(int) CPUMSetGuestEAX(PVMCPU pVCpu, uint32_t eax)
786 pVCpu->cpum.s.Guest.eax = eax;
791 VMMDECL(int) CPUMSetGuestEBX(PVMCPU pVCpu, uint32_t ebx)
793 pVCpu->cpum.s.Guest.ebx = ebx;
798 VMMDECL(int) CPUMSetGuestECX(PVMCPU pVCpu, uint32_t ecx)
800 pVCpu->cpum.s.Guest.ecx = ecx;
805 VMMDECL(int) CPUMSetGuestEDX(PVMCPU pVCpu, uint32_t edx)
807 pVCpu->cpum.s.Guest.edx = edx;
812 VMMDECL(int) CPUMSetGuestESP(PVMCPU pVCpu, uint32_t esp)
814 pVCpu->cpum.s.Guest.esp = esp;
819 VMMDECL(int) CPUMSetGuestEBP(PVMCPU pVCpu, uint32_t ebp)
821 pVCpu->cpum.s.Guest.ebp = ebp;
826 VMMDECL(int) CPUMSetGuestESI(PVMCPU pVCpu, uint32_t esi)
828 pVCpu->cpum.s.Guest.esi = esi;
833 VMMDECL(int) CPUMSetGuestEDI(PVMCPU pVCpu, uint32_t edi)
835 pVCpu->cpum.s.Guest.edi = edi;
840 VMMDECL(int) CPUMSetGuestSS(PVMCPU pVCpu, uint16_t ss)
842 pVCpu->cpum.s.Guest.ss.Sel = ss;
847 VMMDECL(int) CPUMSetGuestCS(PVMCPU pVCpu, uint16_t cs)
849 pVCpu->cpum.s.Guest.cs.Sel = cs;
854 VMMDECL(int) CPUMSetGuestDS(PVMCPU pVCpu, uint16_t ds)
856 pVCpu->cpum.s.Guest.ds.Sel = ds;
861 VMMDECL(int) CPUMSetGuestES(PVMCPU pVCpu, uint16_t es)
863 pVCpu->cpum.s.Guest.es.Sel = es;
868 VMMDECL(int) CPUMSetGuestFS(PVMCPU pVCpu, uint16_t fs)
870 pVCpu->cpum.s.Guest.fs.Sel = fs;
875 VMMDECL(int) CPUMSetGuestGS(PVMCPU pVCpu, uint16_t gs)
877 pVCpu->cpum.s.Guest.gs.Sel = gs;
882 VMMDECL(void) CPUMSetGuestEFER(PVMCPU pVCpu, uint64_t val)
884 pVCpu->cpum.s.Guest.msrEFER = val;
888 VMMDECL(RTGCPTR) CPUMGetGuestIDTR(PVMCPU pVCpu, uint16_t *pcbLimit)
891 *pcbLimit = pVCpu->cpum.s.Guest.idtr.cbIdt;
892 return pVCpu->cpum.s.Guest.idtr.pIdt;
896 VMMDECL(RTSEL) CPUMGetGuestTR(PVMCPU pVCpu, PCPUMSELREGHID pHidden)
899 *pHidden = pVCpu->cpum.s.Guest.tr;
900 return pVCpu->cpum.s.Guest.tr.Sel;
904 VMMDECL(RTSEL) CPUMGetGuestCS(PVMCPU pVCpu)
906 return pVCpu->cpum.s.Guest.cs.Sel;
910 VMMDECL(RTSEL) CPUMGetGuestDS(PVMCPU pVCpu)
912 return pVCpu->cpum.s.Guest.ds.Sel;
916 VMMDECL(RTSEL) CPUMGetGuestES(PVMCPU pVCpu)
918 return pVCpu->cpum.s.Guest.es.Sel;
922 VMMDECL(RTSEL) CPUMGetGuestFS(PVMCPU pVCpu)
924 return pVCpu->cpum.s.Guest.fs.Sel;
928 VMMDECL(RTSEL) CPUMGetGuestGS(PVMCPU pVCpu)
930 return pVCpu->cpum.s.Guest.gs.Sel;
934 VMMDECL(RTSEL) CPUMGetGuestSS(PVMCPU pVCpu)
936 return pVCpu->cpum.s.Guest.ss.Sel;
940 VMMDECL(RTSEL) CPUMGetGuestLDTR(PVMCPU pVCpu)
942 return pVCpu->cpum.s.Guest.ldtr.Sel;
946 VMMDECL(RTSEL) CPUMGetGuestLdtrEx(PVMCPU pVCpu, uint64_t *pGCPtrBase, uint32_t *pcbLimit)
948 *pGCPtrBase = pVCpu->cpum.s.Guest.ldtr.u64Base;
949 *pcbLimit = pVCpu->cpum.s.Guest.ldtr.u32Limit;
950 return pVCpu->cpum.s.Guest.ldtr.Sel;
954 VMMDECL(uint64_t) CPUMGetGuestCR0(PVMCPU pVCpu)
956 return pVCpu->cpum.s.Guest.cr0;
960 VMMDECL(uint64_t) CPUMGetGuestCR2(PVMCPU pVCpu)
962 return pVCpu->cpum.s.Guest.cr2;
966 VMMDECL(uint64_t) CPUMGetGuestCR3(PVMCPU pVCpu)
968 return pVCpu->cpum.s.Guest.cr3;
972 VMMDECL(uint64_t) CPUMGetGuestCR4(PVMCPU pVCpu)
974 return pVCpu->cpum.s.Guest.cr4;
978 VMMDECL(uint64_t) CPUMGetGuestCR8(PVMCPU pVCpu)
981 int rc = CPUMGetGuestCRx(pVCpu, DISCREG_CR8, &u64);
988 VMMDECL(void) CPUMGetGuestGDTR(PVMCPU pVCpu, PVBOXGDTR pGDTR)
990 *pGDTR = pVCpu->cpum.s.Guest.gdtr;
994 VMMDECL(uint32_t) CPUMGetGuestEIP(PVMCPU pVCpu)
996 return pVCpu->cpum.s.Guest.eip;
1000 VMMDECL(uint64_t) CPUMGetGuestRIP(PVMCPU pVCpu)
1002 return pVCpu->cpum.s.Guest.rip;
1006 VMMDECL(uint32_t) CPUMGetGuestEAX(PVMCPU pVCpu)
1008 return pVCpu->cpum.s.Guest.eax;
1012 VMMDECL(uint32_t) CPUMGetGuestEBX(PVMCPU pVCpu)
1014 return pVCpu->cpum.s.Guest.ebx;
1018 VMMDECL(uint32_t) CPUMGetGuestECX(PVMCPU pVCpu)
1020 return pVCpu->cpum.s.Guest.ecx;
1024 VMMDECL(uint32_t) CPUMGetGuestEDX(PVMCPU pVCpu)
1026 return pVCpu->cpum.s.Guest.edx;
1030 VMMDECL(uint32_t) CPUMGetGuestESI(PVMCPU pVCpu)
1032 return pVCpu->cpum.s.Guest.esi;
1036 VMMDECL(uint32_t) CPUMGetGuestEDI(PVMCPU pVCpu)
1038 return pVCpu->cpum.s.Guest.edi;
1042 VMMDECL(uint32_t) CPUMGetGuestESP(PVMCPU pVCpu)
1044 return pVCpu->cpum.s.Guest.esp;
1048 VMMDECL(uint32_t) CPUMGetGuestEBP(PVMCPU pVCpu)
1050 return pVCpu->cpum.s.Guest.ebp;
1054 VMMDECL(uint32_t) CPUMGetGuestEFlags(PVMCPU pVCpu)
1056 return pVCpu->cpum.s.Guest.eflags.u32;
1060 VMMDECL(int) CPUMGetGuestCRx(PVMCPU pVCpu, unsigned iReg, uint64_t *pValue)
1065 *pValue = pVCpu->cpum.s.Guest.cr0;
1069 *pValue = pVCpu->cpum.s.Guest.cr2;
1073 *pValue = pVCpu->cpum.s.Guest.cr3;
1077 *pValue = pVCpu->cpum.s.Guest.cr4;
1083 int rc = PDMApicGetTPR(pVCpu, &u8Tpr, NULL /* pfPending */, NULL /* pu8PendingIrq */);
1101 VMMDECL(uint64_t) CPUMGetGuestDR0(PVMCPU pVCpu)
1103 return pVCpu->cpum.s.Guest.dr[0];
1107 VMMDECL(uint64_t) CPUMGetGuestDR1(PVMCPU pVCpu)
1109 return pVCpu->cpum.s.Guest.dr[1];
1113 VMMDECL(uint64_t) CPUMGetGuestDR2(PVMCPU pVCpu)
1115 return pVCpu->cpum.s.Guest.dr[2];
1119 VMMDECL(uint64_t) CPUMGetGuestDR3(PVMCPU pVCpu)
1121 return pVCpu->cpum.s.Guest.dr[3];
1125 VMMDECL(uint64_t) CPUMGetGuestDR6(PVMCPU pVCpu)
1127 return pVCpu->cpum.s.Guest.dr[6];
1131 VMMDECL(uint64_t) CPUMGetGuestDR7(PVMCPU pVCpu)
1133 return pVCpu->cpum.s.Guest.dr[7];
1137 VMMDECL(int) CPUMGetGuestDRx(PVMCPU pVCpu, uint32_t iReg, uint64_t *pValue)
1143 *pValue = pVCpu->cpum.s.Guest.dr[iReg];
1148 VMMDECL(uint64_t) CPUMGetGuestEFER(PVMCPU pVCpu)
1150 return pVCpu->cpum.s.Guest.msrEFER;
1276 * @param pVCpu Pointer to the VMCPU.
1284 VMMDECL(void) CPUMGetGuestCpuId(PVMCPU pVCpu, uint32_t uLeaf, uint32_t uSubLeaf,
1288 PVM pVM = pVCpu->CTX_SUFF(pVM);
1308 Assert(pVCpu->idCpu <= 255);
1310 *pEbx = (pLeaf->uEbx & UINT32_C(0x00ffffff)) | (pVCpu->idCpu << 24);
1314 | (pVCpu->cpum.s.Guest.cr4 & X86_CR4_OSXSAVE ? X86_CPUID_FEATURE_ECX_OSXSAVE : 0);
1320 *pEdx = pVCpu->idCpu;
1326 *pEax = pVCpu->idCpu;
1342 *pEdx = pVCpu->idCpu;
1636 PVMCPU pVCpu = &pVM->aCpus[i];
1637 pVCpu->cpum.s.fChanged |= CPUM_CHANGED_CPUID;
1797 PVMCPU pVCpu = &pVM->aCpus[i];
1798 pVCpu->cpum.s.fChanged |= CPUM_CHANGED_CPUID;
1827 VMMDECL(int) CPUMSetGuestDR0(PVMCPU pVCpu, uint64_t uDr0)
1829 pVCpu->cpum.s.Guest.dr[0] = uDr0;
1830 return CPUMRecalcHyperDRx(pVCpu, 0, false);
1834 VMMDECL(int) CPUMSetGuestDR1(PVMCPU pVCpu, uint64_t uDr1)
1836 pVCpu->cpum.s.Guest.dr[1] = uDr1;
1837 return CPUMRecalcHyperDRx(pVCpu, 1, false);
1841 VMMDECL(int) CPUMSetGuestDR2(PVMCPU pVCpu, uint64_t uDr2)
1843 pVCpu->cpum.s.Guest.dr[2] = uDr2;
1844 return CPUMRecalcHyperDRx(pVCpu, 2, false);
1848 VMMDECL(int) CPUMSetGuestDR3(PVMCPU pVCpu, uint64_t uDr3)
1850 pVCpu->cpum.s.Guest.dr[3] = uDr3;
1851 return CPUMRecalcHyperDRx(pVCpu, 3, false);
1855 VMMDECL(int) CPUMSetGuestDR6(PVMCPU pVCpu, uint64_t uDr6)
1857 pVCpu->cpum.s.Guest.dr[6] = uDr6;
1862 VMMDECL(int) CPUMSetGuestDR7(PVMCPU pVCpu, uint64_t uDr7)
1864 pVCpu->cpum.s.Guest.dr[7] = uDr7;
1865 return CPUMRecalcHyperDRx(pVCpu, 7, false);
1869 VMMDECL(int) CPUMSetGuestDRx(PVMCPU pVCpu, uint32_t iReg, uint64_t Value)
1875 pVCpu->cpum.s.Guest.dr[iReg] = Value;
1876 return CPUMRecalcHyperDRx(pVCpu, iReg, false);
1904 * @param pVCpu Pointer to the VMCPU.
1910 VMMDECL(int) CPUMRecalcHyperDRx(PVMCPU pVCpu, uint8_t iGstReg, bool fForceHyper)
1912 PVM pVM = pVCpu->CTX_SUFF(pVM);
1922 RTGCUINTREG uGstDr7 = CPUMGetGuestDR7(pVCpu);
1933 if (!fForceHyper && (pVCpu->cpum.s.fUseFlags & CPUM_USED_DEBUG_REGS_HYPER))
1936 if (( HMIsEnabled(pVCpu->CTX_SUFF(pVM)) && !fForceHyper ? uDbgfDr7 : (uGstDr7 | uDbgfDr7)) & X86_DR7_ENABLED_MASK)
1938 Assert(!CPUMIsGuestDebugStateActive(pVCpu));
1961 uNewDr0 = CPUMGetGuestDR0(pVCpu);
1981 uNewDr1 = CPUMGetGuestDR1(pVCpu);
2001 uNewDr2 = CPUMGetGuestDR2(pVCpu);
2021 uNewDr3 = CPUMGetGuestDR3(pVCpu);
2037 if (!(pVCpu->cpum.s.fUseFlags & CPUM_USED_DEBUG_REGS_HOST))
2039 if (!(pVCpu->cpum.s.fUseFlags & CPUM_USE_DEBUG_REGS_HOST))
2041 pVCpu->cpum.s.Host.dr6 = ASMGetDR6();
2042 pVCpu->cpum.s.Host.dr7 = ASMGetDR7();
2044 pVCpu->cpum.s.Host.dr0 = ASMGetDR0();
2045 pVCpu->cpum.s.Host.dr1 = ASMGetDR1();
2046 pVCpu->cpum.s.Host.dr2 = ASMGetDR2();
2047 pVCpu->cpum.s.Host.dr3 = ASMGetDR3();
2048 pVCpu->cpum.s.fUseFlags |= CPUM_USED_DEBUG_REGS_HOST | CPUM_USE_DEBUG_REGS_HYPER | CPUM_USED_DEBUG_REGS_HYPER;
2051 pVCpu->cpum.s.Hyper.dr[0] = uNewDr0;
2053 pVCpu->cpum.s.Hyper.dr[1] = uNewDr1;
2055 pVCpu->cpum.s.Hyper.dr[2] = uNewDr2;
2057 pVCpu->cpum.s.Hyper.dr[3] = uNewDr3;
2060 pVCpu->cpum.s.Hyper.dr[7] = uNewDr7;
2066 pVCpu->cpum.s.fUseFlags |= CPUM_USE_DEBUG_REGS_HYPER;
2067 if (uNewDr3 != pVCpu->cpum.s.Hyper.dr[3])
2068 CPUMSetHyperDR3(pVCpu, uNewDr3);
2069 if (uNewDr2 != pVCpu->cpum.s.Hyper.dr[2])
2070 CPUMSetHyperDR2(pVCpu, uNewDr2);
2071 if (uNewDr1 != pVCpu->cpum.s.Hyper.dr[1])
2072 CPUMSetHyperDR1(pVCpu, uNewDr1);
2073 if (uNewDr0 != pVCpu->cpum.s.Hyper.dr[0])
2074 CPUMSetHyperDR0(pVCpu, uNewDr0);
2075 if (uNewDr7 != pVCpu->cpum.s.Hyper.dr[7])
2076 CPUMSetHyperDR7(pVCpu, uNewDr7);
2080 else if (CPUMIsGuestDebugStateActive(pVCpu))
2090 case 0: ASMSetDR0(CPUMGetGuestDR0(pVCpu)); break;
2091 case 1: ASMSetDR1(CPUMGetGuestDR1(pVCpu)); break;
2092 case 2: ASMSetDR2(CPUMGetGuestDR2(pVCpu)); break;
2093 case 3: ASMSetDR3(CPUMGetGuestDR3(pVCpu)); break;
2107 if (pVCpu->cpum.s.fUseFlags & CPUM_USED_DEBUG_REGS_HYPER)
2112 if (pVCpu->cpum.s.Hyper.dr[0])
2114 if (pVCpu->cpum.s.Hyper.dr[1])
2116 if (pVCpu->cpum.s.Hyper.dr[2])
2118 if (pVCpu->cpum.s.Hyper.dr[3])
2120 pVCpu->cpum.s.fUseFlags &= ~CPUM_USED_DEBUG_REGS_HYPER;
2123 pVCpu->cpum.s.fUseFlags &= ~CPUM_USE_DEBUG_REGS_HYPER;
2126 pVCpu->cpum.s.Hyper.dr[7] = X86_DR7_RA1_MASK;
2127 pVCpu->cpum.s.Hyper.dr[3] = 0;
2128 pVCpu->cpum.s.Hyper.dr[2] = 0;
2129 pVCpu->cpum.s.Hyper.dr[1] = 0;
2130 pVCpu->cpum.s.Hyper.dr[0] = 0;
2134 pVCpu->cpum.s.fUseFlags, pVCpu->cpum.s.Hyper.dr[0], pVCpu->cpum.s.Hyper.dr[1],
2135 pVCpu->cpum.s.Hyper.dr[2], pVCpu->cpum.s.Hyper.dr[3], pVCpu->cpum.s.Hyper.dr[6],
2136 pVCpu->cpum.s.Hyper.dr[7]));
2150 * @param pVCpu Pointer to the cross context VMCPU structure for the
2153 * @thread EMT(pVCpu)
2155 VMM_INT_DECL(int) CPUMSetGuestXcr0(PVMCPU pVCpu, uint64_t uNewValue)
2157 if ( (uNewValue & ~pVCpu->CTX_SUFF(pVM)->cpum.s.fXStateGuestMask) == 0
2168 pVCpu->cpum.s.Guest.aXcr[0] = uNewValue;
2173 uint64_t fNewComponents = ~pVCpu->cpum.s.Guest.fXStateMask & uNewValue;
2177 if (pVCpu->cpum.s.fUseFlags & CPUM_USED_FPU)
2179 if (pVCpu->cpum.s.Guest.fXStateMask != 0)
2181 ASMXRstor(pVCpu->cpum.s.Guest.CTX_SUFF(pXState), fNewComponents);
2185 pVCpu->cpum.s.Guest.fXStateMask |= XSAVE_C_X87 | XSAVE_C_SSE;
2187 ASMXRstor(pVCpu->cpum.s.Guest.CTX_SUFF(pXState), uNewValue & ~(XSAVE_C_X87 | XSAVE_C_SSE));
2191 pVCpu->cpum.s.Guest.fXStateMask |= uNewValue;
2203 * @param pVCpu Pointer to the VMCPU.
2205 VMMDECL(bool) CPUMIsGuestNXEnabled(PVMCPU pVCpu)
2207 return !!(pVCpu->cpum.s.Guest.msrEFER & MSR_K6_EFER_NXE);
2215 * @param pVCpu Pointer to the VMCPU.
2217 VMMDECL(bool) CPUMIsGuestPageSizeExtEnabled(PVMCPU pVCpu)
2220 return !!(pVCpu->cpum.s.Guest.cr4 & (X86_CR4_PSE | X86_CR4_PAE));
2228 * @param pVCpu Pointer to the VMCPU.
2230 VMMDECL(bool) CPUMIsGuestPagingEnabled(PVMCPU pVCpu)
2232 return !!(pVCpu->cpum.s.Guest.cr0 & X86_CR0_PG);
2240 * @param pVCpu Pointer to the VMCPU.
2242 VMMDECL(bool) CPUMIsGuestR0WriteProtEnabled(PVMCPU pVCpu)
2244 return !!(pVCpu->cpum.s.Guest.cr0 & X86_CR0_WP);
2252 * @param pVCpu Pointer to the VMCPU.
2254 VMMDECL(bool) CPUMIsGuestInRealMode(PVMCPU pVCpu)
2256 return !(pVCpu->cpum.s.Guest.cr0 & X86_CR0_PE);
2264 * @param pVCpu Pointer to the VMCPU.
2266 VMMDECL(bool) CPUMIsGuestInRealOrV86Mode(PVMCPU pVCpu)
2268 return !(pVCpu->cpum.s.Guest.cr0 & X86_CR0_PE)
2269 || pVCpu->cpum.s.Guest.eflags.Bits.u1VM; /** @todo verify that this cannot be set in long mode. */
2277 * @param pVCpu Pointer to the VMCPU.
2279 VMMDECL(bool) CPUMIsGuestInProtectedMode(PVMCPU pVCpu)
2281 return !!(pVCpu->cpum.s.Guest.cr0 & X86_CR0_PE);
2289 * @param pVCpu Pointer to the VMCPU.
2291 VMMDECL(bool) CPUMIsGuestInPagedProtectedMode(PVMCPU pVCpu)
2293 return (pVCpu->cpum.s.Guest.cr0 & (X86_CR0_PE | X86_CR0_PG)) == (X86_CR0_PE | X86_CR0_PG);
2301 * @param pVCpu Pointer to the VMCPU.
2303 VMMDECL(bool) CPUMIsGuestInLongMode(PVMCPU pVCpu)
2305 return (pVCpu->cpum.s.Guest.msrEFER & MSR_K6_EFER_LMA) == MSR_K6_EFER_LMA;
2313 * @param pVCpu Pointer to the VMCPU.
2315 VMMDECL(bool) CPUMIsGuestInPAEMode(PVMCPU pVCpu)
2319 return (pVCpu->cpum.s.Guest.cr4 & X86_CR4_PAE)
2320 && (pVCpu->cpum.s.Guest.cr0 & X86_CR0_PG)
2321 && !(pVCpu->cpum.s.Guest.msrEFER & MSR_K6_EFER_LMA);
2329 * @param pVCpu The current virtual CPU.
2331 VMMDECL(bool) CPUMIsGuestIn64BitCode(PVMCPU pVCpu)
2333 if (!CPUMIsGuestInLongMode(pVCpu))
2335 CPUMSELREG_LAZY_LOAD_HIDDEN_PARTS(pVCpu, &pVCpu->cpum.s.Guest.cs);
2336 return pVCpu->cpum.s.Guest.cs.Attr.n.u1Long;
2358 * @param pVCpu The current virtual CPU.
2360 VMM_INT_DECL(bool) CPUMIsGuestInRawMode(PVMCPU pVCpu)
2362 return pVCpu->cpum.s.fRawEntered;
2371 * @param pVCpu Pointer to the VMCPU.
2374 VMM_INT_DECL(int) CPUMRawEnter(PVMCPU pVCpu)
2376 PVM pVM = pVCpu->CTX_SUFF(pVM);
2378 Assert(!pVCpu->cpum.s.fRawEntered);
2379 Assert(!pVCpu->cpum.s.fRemEntered);
2380 PCPUMCTX pCtx = &pVCpu->cpum.s.Guest;
2430 Assert((pVCpu->cpum.s.Guest.cr0 & (X86_CR0_PG | X86_CR0_WP | X86_CR0_PE)) == (X86_CR0_PG | X86_CR0_PE | X86_CR0_WP));
2434 pVCpu->cpum.s.fRawEntered = true;
2445 * @param pVCpu Pointer to the VMCPU.
2449 VMM_INT_DECL(int) CPUMRawLeave(PVMCPU pVCpu, int rc)
2451 PVM pVM = pVCpu->CTX_SUFF(pVM);
2456 Assert(!pVCpu->cpum.s.fRemEntered);
2457 if (!pVCpu->cpum.s.fRawEntered)
2459 pVCpu->cpum.s.fRawEntered = false;
2461 PCPUMCTX pCtx = &pVCpu->cpum.s.Guest;
2550 * @param pVCpu Pointer to the VMCPU.
2553 VMMDECL(void) CPUMRawSetEFlags(PVMCPU pVCpu, uint32_t fEfl)
2556 if (pVCpu->cpum.s.fRawEntered)
2557 PATMRawSetEFlags(pVCpu->CTX_SUFF(pVM), &pVCpu->cpum.s.Guest, fEfl);
2560 pVCpu->cpum.s.Guest.eflags.u32 = fEfl;
2568 * @param pVCpu Pointer to the current virtual CPU.
2570 VMMDECL(uint32_t) CPUMRawGetEFlags(PVMCPU pVCpu)
2573 if (pVCpu->cpum.s.fRawEntered)
2574 return PATMRawGetEFlags(pVCpu->CTX_SUFF(pVM), &pVCpu->cpum.s.Guest);
2576 return pVCpu->cpum.s.Guest.eflags.u32;
2583 * @param pVCpu Pointer to the current virtual CPU.
2585 VMMDECL(void) CPUMSetChangedFlags(PVMCPU pVCpu, uint32_t fChangedFlags)
2587 pVCpu->cpum.s.fChanged |= fChangedFlags;
2633 * @param pVCpu Pointer to the VMCPU.
2635 VMMDECL(int) CPUMHandleLazyFPU(PVMCPU pVCpu)
2637 return cpumHandleLazyFPUAsm(&pVCpu->cpum.s);
2646 * @param pVCpu Pointer to the VMCPU.
2648 VMMDECL(bool) CPUMIsGuestFPUStateActive(PVMCPU pVCpu)
2650 return RT_BOOL(pVCpu->cpum.s.fUseFlags & CPUM_USED_FPU);
2660 VMMDECL(bool) CPUMIsGuestDebugStateActive(PVMCPU pVCpu)
2662 return RT_BOOL(pVCpu->cpum.s.fUseFlags & CPUM_USED_DEBUG_REGS_GUEST);
2673 VMMDECL(bool) CPUMIsGuestDebugStateActivePending(PVMCPU pVCpu)
2675 return RT_BOOL(pVCpu->cpum.s.fUseFlags & CPUM_SYNC_DEBUG_REGS_GUEST);
2685 VMMDECL(bool) CPUMIsHyperDebugStateActive(PVMCPU pVCpu)
2687 return RT_BOOL(pVCpu->cpum.s.fUseFlags & CPUM_USED_DEBUG_REGS_HYPER);
2698 VMMDECL(bool) CPUMIsHyperDebugStateActivePending(PVMCPU pVCpu)
2700 return RT_BOOL(pVCpu->cpum.s.fUseFlags & CPUM_SYNC_DEBUG_REGS_HYPER);
2711 VMMDECL(void) CPUMDeactivateGuestDebugState(PVMCPU pVCpu)
2713 Assert(!(pVCpu->cpum.s.fUseFlags & (CPUM_USED_DEBUG_REGS_GUEST | CPUM_USED_DEBUG_REGS_HYPER | CPUM_USED_DEBUG_REGS_HOST)));
2721 * @param pVCpu Pointer to the current virtual CPU.
2723 VMMDECL(uint32_t) CPUMGetGuestCPL(PVMCPU pVCpu)
2755 if (pVCpu->cpum.s.Guest.cr0 & X86_CR0_PE)
2757 if (!pVCpu->cpum.s.Guest.eflags.Bits.u1VM)
2759 if (CPUMSELREG_ARE_HIDDEN_PARTS_VALID(pVCpu, &pVCpu->cpum.s.Guest.ss))
2760 uCpl = pVCpu->cpum.s.Guest.ss.Attr.n.u2Dpl;
2763 uCpl = (pVCpu->cpum.s.Guest.ss.Sel & X86_SEL_RPL);
2766 if (pVCpu->cpum.s.fRawEntered)
2769 && EMIsRawRing1Enabled(pVCpu->CTX_SUFF(pVM)))
2797 * @param pVCpu Pointer to the VMCPU.
2799 VMMDECL(CPUMMODE) CPUMGetGuestMode(PVMCPU pVCpu)
2802 if (!(pVCpu->cpum.s.Guest.cr0 & X86_CR0_PE))
2804 else if (!(pVCpu->cpum.s.Guest.msrEFER & MSR_K6_EFER_LMA))
2817 * @param pVCpu The current virtual CPU.
2819 VMMDECL(uint32_t) CPUMGetGuestCodeBits(PVMCPU pVCpu)
2821 if (!(pVCpu->cpum.s.Guest.cr0 & X86_CR0_PE))
2824 if (pVCpu->cpum.s.Guest.eflags.Bits.u1VM)
2826 Assert(!(pVCpu->cpum.s.Guest.msrEFER & MSR_K6_EFER_LMA));
2830 CPUMSELREG_LAZY_LOAD_HIDDEN_PARTS(pVCpu, &pVCpu->cpum.s.Guest.cs);
2831 if ( pVCpu->cpum.s.Guest.cs.Attr.n.u1Long
2832 && (pVCpu->cpum.s.Guest.msrEFER & MSR_K6_EFER_LMA))
2835 if (pVCpu->cpum.s.Guest.cs.Attr.n.u1DefBig)
2842 VMMDECL(DISCPUMODE) CPUMGetGuestDisMode(PVMCPU pVCpu)
2844 if (!(pVCpu->cpum.s.Guest.cr0 & X86_CR0_PE))
2847 if (pVCpu->cpum.s.Guest.eflags.Bits.u1VM)
2849 Assert(!(pVCpu->cpum.s.Guest.msrEFER & MSR_K6_EFER_LMA));
2853 CPUMSELREG_LAZY_LOAD_HIDDEN_PARTS(pVCpu, &pVCpu->cpum.s.Guest.cs);
2854 if ( pVCpu->cpum.s.Guest.cs.Attr.n.u1Long
2855 && (pVCpu->cpum.s.Guest.msrEFER & MSR_K6_EFER_LMA))
2858 if (pVCpu->cpum.s.Guest.cs.Attr.n.u1DefBig)