Lines Matching refs:cpum
23 #include <VBox/vmm/cpum.h>
52 AssertCompile2MemberOffsets(VM, cpum.s.HostFeatures, cpum.ro.HostFeatures);
53 AssertCompile2MemberOffsets(VM, cpum.s.GuestFeatures, cpum.ro.GuestFeatures);
65 #define CPUM_GUEST_CTX_TO_VMCPU(a_pGuestCtx) RT_FROM_MEMBER(a_pGuestCtx, VMCPU, cpum.s.Guest)
96 Assert((uintptr_t)(pSReg - &pVCpu->cpum.s.Guest.es) < X86_SREG_COUNT);
98 if (pVCpu->cpum.s.Guest.eflags.Bits.u1VM)
102 pSReg->Attr.n.u4Type = pSReg == &pVCpu->cpum.s.Guest.cs ? X86_SEL_TYPE_ER_ACC : X86_SEL_TYPE_RW_ACC;
112 else if (!(pVCpu->cpum.s.Guest.cr0 & X86_CR0_PE))
134 SELMLoadHiddenSelectorReg(pVCpu, &pVCpu->cpum.s.Guest, pSReg);
147 CPUMSELREG_LAZY_LOAD_HIDDEN_PARTS(pVCpu, &pVCpu->cpum.s.Guest.cs);
148 CPUMSELREG_LAZY_LOAD_HIDDEN_PARTS(pVCpu, &pVCpu->cpum.s.Guest.ss);
175 return CPUMCTX2CORE(&pVCpu->cpum.s.Hyper);
186 return &pVCpu->cpum.s.Hyper;
192 pVCpu->cpum.s.Hyper.gdtr.cbGdt = limit;
193 pVCpu->cpum.s.Hyper.gdtr.pGdt = addr;
199 pVCpu->cpum.s.Hyper.idtr.cbIdt = limit;
200 pVCpu->cpum.s.Hyper.idtr.pIdt = addr;
206 pVCpu->cpum.s.Hyper.cr3 = cr3;
216 return pVCpu->cpum.s.Hyper.cr3;
222 pVCpu->cpum.s.Hyper.cs.Sel = SelCS;
228 pVCpu->cpum.s.Hyper.ds.Sel = SelDS;
234 pVCpu->cpum.s.Hyper.es.Sel = SelES;
240 pVCpu->cpum.s.Hyper.fs.Sel = SelFS;
246 pVCpu->cpum.s.Hyper.gs.Sel = SelGS;
252 pVCpu->cpum.s.Hyper.ss.Sel = SelSS;
258 pVCpu->cpum.s.Hyper.esp = u32ESP;
264 pVCpu->cpum.s.Hyper.esp = u32ESP;
270 pVCpu->cpum.s.Hyper.eflags.u32 = Efl;
277 pVCpu->cpum.s.Hyper.eip = u32EIP;
297 pVCpu->cpum.s.Hyper.eip = u32EIP;
298 pVCpu->cpum.s.Hyper.esp = u32ESP;
299 pVCpu->cpum.s.Hyper.eax = u32EAX;
300 pVCpu->cpum.s.Hyper.edx = u32EDX;
301 pVCpu->cpum.s.Hyper.ecx = 0;
302 pVCpu->cpum.s.Hyper.ebx = 0;
303 pVCpu->cpum.s.Hyper.ebp = 0;
304 pVCpu->cpum.s.Hyper.esi = 0;
305 pVCpu->cpum.s.Hyper.edi = 0;
306 pVCpu->cpum.s.Hyper.eflags.u = X86_EFL_1;
312 pVCpu->cpum.s.Hyper.tr.Sel = SelTR;
318 pVCpu->cpum.s.Hyper.ldtr.Sel = SelLDTR;
330 if (!CPUMIsGuestInLongModeEx(&(a_pVCpu)->cpum.s.Guest)) \
333 (a_pVCpu)->cpum.s.fUseFlags |= CPUM_SYNC_DEBUG_REGS_HYPER; \
352 if ((a_pVCpu)->cpum.s.fUseFlags & CPUM_USED_DEBUG_REGS_HYPER) \
362 pVCpu->cpum.s.Hyper.dr[0] = uDr0;
369 pVCpu->cpum.s.Hyper.dr[1] = uDr1;
376 pVCpu->cpum.s.Hyper.dr[2] = uDr2;
383 pVCpu->cpum.s.Hyper.dr[3] = uDr3;
390 pVCpu->cpum.s.Hyper.dr[6] = uDr6;
396 pVCpu->cpum.s.Hyper.dr[7] = uDr7;
405 return pVCpu->cpum.s.Hyper.cs.Sel;
411 return pVCpu->cpum.s.Hyper.ds.Sel;
417 return pVCpu->cpum.s.Hyper.es.Sel;
423 return pVCpu->cpum.s.Hyper.fs.Sel;
429 return pVCpu->cpum.s.Hyper.gs.Sel;
435 return pVCpu->cpum.s.Hyper.ss.Sel;
441 return pVCpu->cpum.s.Hyper.eax;
447 return pVCpu->cpum.s.Hyper.ebx;
453 return pVCpu->cpum.s.Hyper.ecx;
459 return pVCpu->cpum.s.Hyper.edx;
465 return pVCpu->cpum.s.Hyper.esi;
471 return pVCpu->cpum.s.Hyper.edi;
477 return pVCpu->cpum.s.Hyper.ebp;
483 return pVCpu->cpum.s.Hyper.esp;
489 return pVCpu->cpum.s.Hyper.eflags.u32;
495 return pVCpu->cpum.s.Hyper.eip;
501 return pVCpu->cpum.s.Hyper.rip;
508 *pcbLimit = pVCpu->cpum.s.Hyper.idtr.cbIdt;
509 return pVCpu->cpum.s.Hyper.idtr.pIdt;
516 *pcbLimit = pVCpu->cpum.s.Hyper.gdtr.cbGdt;
517 return pVCpu->cpum.s.Hyper.gdtr.pGdt;
523 return pVCpu->cpum.s.Hyper.ldtr.Sel;
529 return pVCpu->cpum.s.Hyper.dr[0];
535 return pVCpu->cpum.s.Hyper.dr[1];
541 return pVCpu->cpum.s.Hyper.dr[2];
547 return pVCpu->cpum.s.Hyper.dr[3];
553 return pVCpu->cpum.s.Hyper.dr[6];
559 return pVCpu->cpum.s.Hyper.dr[7];
571 return CPUMCTX2CORE(&pVCpu->cpum.s.Guest);
583 return &pVCpu->cpum.s.Guest;
594 pVCpu->cpum.s.Guest.gdtr.cbGdt = cbLimit;
595 pVCpu->cpum.s.Guest.gdtr.pGdt = GCPtrBase;
596 pVCpu->cpum.s.fChanged |= CPUM_CHANGED_GDTR;
608 pVCpu->cpum.s.Guest.idtr.cbIdt = cbLimit;
609 pVCpu->cpum.s.Guest.idtr.pIdt = GCPtrBase;
610 pVCpu->cpum.s.fChanged |= CPUM_CHANGED_IDTR;
622 pVCpu->cpum.s.Guest.tr.Sel = tr;
623 pVCpu->cpum.s.fChanged |= CPUM_CHANGED_TR;
632 || pVCpu->cpum.s.Guest.ldtr.Sel != 0)
637 pVCpu->cpum.s.Guest.ldtr.Sel = ldtr;
639 pVCpu->cpum.s.Guest.ldtr.ValidSel = 0;
640 pVCpu->cpum.s.Guest.ldtr.fFlags = 0;
641 pVCpu->cpum.s.fChanged |= CPUM_CHANGED_LDTR;
665 != (pVCpu->cpum.s.Guest.cr0 & (X86_CR0_TS | X86_CR0_EM | X86_CR0_MP)))
667 if (!(pVCpu->cpum.s.fUseFlags & CPUM_USED_FPU))
673 if ((cr0 & X86_CR0_EM) != (pVCpu->cpum.s.Guest.cr0 & X86_CR0_EM))
677 AssertMsg((HyperCR0 & X86_CR0_EM) == (pVCpu->cpum.s.Guest.cr0 & X86_CR0_EM), ("%#x\n", HyperCR0));
688 AssertMsg((HyperCR0 & X86_CR0_EM) == (pVCpu->cpum.s.Guest.cr0 & X86_CR0_EM), ("%#x\n", HyperCR0));
700 == (pVCpu->cpum.s.Guest.cr0 & (X86_CR0_TS | X86_CR0_EM | X86_CR0_MP)),
701 ("%#x %#x\n", HyperCR0, pVCpu->cpum.s.Guest.cr0));
715 != (pVCpu->cpum.s.Guest.cr0 & (X86_CR0_PG | X86_CR0_WP | X86_CR0_PE)))
716 pVCpu->cpum.s.fChanged |= CPUM_CHANGED_GLOBAL_TLB_FLUSH;
717 pVCpu->cpum.s.fChanged |= CPUM_CHANGED_CR0;
722 if (((cr0 ^ pVCpu->cpum.s.Guest.cr0) & X86_CR0_WP) && (cr0 & X86_CR0_WP))
725 pVCpu->cpum.s.Guest.cr0 = cr0 | X86_CR0_ET;
732 pVCpu->cpum.s.Guest.cr2 = cr2;
739 pVCpu->cpum.s.Guest.cr3 = cr3;
740 pVCpu->cpum.s.fChanged |= CPUM_CHANGED_CR3;
751 != (pVCpu->cpum.s.Guest.cr4 & X86_CR4_OSXSAVE) )
761 != (pVCpu->cpum.s.Guest.cr4 & (X86_CR4_PGE | X86_CR4_PAE | X86_CR4_PSE)))
762 pVCpu->cpum.s.fChanged |= CPUM_CHANGED_GLOBAL_TLB_FLUSH;
764 pVCpu->cpum.s.fChanged |= CPUM_CHANGED_CR4;
765 pVCpu->cpum.s.Guest.cr4 = cr4;
772 pVCpu->cpum.s.Guest.eflags.u32 = eflags;
779 pVCpu->cpum.s.Guest.eip = eip;
786 pVCpu->cpum.s.Guest.eax = eax;
793 pVCpu->cpum.s.Guest.ebx = ebx;
800 pVCpu->cpum.s.Guest.ecx = ecx;
807 pVCpu->cpum.s.Guest.edx = edx;
814 pVCpu->cpum.s.Guest.esp = esp;
821 pVCpu->cpum.s.Guest.ebp = ebp;
828 pVCpu->cpum.s.Guest.esi = esi;
835 pVCpu->cpum.s.Guest.edi = edi;
842 pVCpu->cpum.s.Guest.ss.Sel = ss;
849 pVCpu->cpum.s.Guest.cs.Sel = cs;
856 pVCpu->cpum.s.Guest.ds.Sel = ds;
863 pVCpu->cpum.s.Guest.es.Sel = es;
870 pVCpu->cpum.s.Guest.fs.Sel = fs;
877 pVCpu->cpum.s.Guest.gs.Sel = gs;
884 pVCpu->cpum.s.Guest.msrEFER = val;
891 *pcbLimit = pVCpu->cpum.s.Guest.idtr.cbIdt;
892 return pVCpu->cpum.s.Guest.idtr.pIdt;
899 *pHidden = pVCpu->cpum.s.Guest.tr;
900 return pVCpu->cpum.s.Guest.tr.Sel;
906 return pVCpu->cpum.s.Guest.cs.Sel;
912 return pVCpu->cpum.s.Guest.ds.Sel;
918 return pVCpu->cpum.s.Guest.es.Sel;
924 return pVCpu->cpum.s.Guest.fs.Sel;
930 return pVCpu->cpum.s.Guest.gs.Sel;
936 return pVCpu->cpum.s.Guest.ss.Sel;
942 return pVCpu->cpum.s.Guest.ldtr.Sel;
948 *pGCPtrBase = pVCpu->cpum.s.Guest.ldtr.u64Base;
949 *pcbLimit = pVCpu->cpum.s.Guest.ldtr.u32Limit;
950 return pVCpu->cpum.s.Guest.ldtr.Sel;
956 return pVCpu->cpum.s.Guest.cr0;
962 return pVCpu->cpum.s.Guest.cr2;
968 return pVCpu->cpum.s.Guest.cr3;
974 return pVCpu->cpum.s.Guest.cr4;
990 *pGDTR = pVCpu->cpum.s.Guest.gdtr;
996 return pVCpu->cpum.s.Guest.eip;
1002 return pVCpu->cpum.s.Guest.rip;
1008 return pVCpu->cpum.s.Guest.eax;
1014 return pVCpu->cpum.s.Guest.ebx;
1020 return pVCpu->cpum.s.Guest.ecx;
1026 return pVCpu->cpum.s.Guest.edx;
1032 return pVCpu->cpum.s.Guest.esi;
1038 return pVCpu->cpum.s.Guest.edi;
1044 return pVCpu->cpum.s.Guest.esp;
1050 return pVCpu->cpum.s.Guest.ebp;
1056 return pVCpu->cpum.s.Guest.eflags.u32;
1065 *pValue = pVCpu->cpum.s.Guest.cr0;
1069 *pValue = pVCpu->cpum.s.Guest.cr2;
1073 *pValue = pVCpu->cpum.s.Guest.cr3;
1077 *pValue = pVCpu->cpum.s.Guest.cr4;
1103 return pVCpu->cpum.s.Guest.dr[0];
1109 return pVCpu->cpum.s.Guest.dr[1];
1115 return pVCpu->cpum.s.Guest.dr[2];
1121 return pVCpu->cpum.s.Guest.dr[3];
1127 return pVCpu->cpum.s.Guest.dr[6];
1133 return pVCpu->cpum.s.Guest.dr[7];
1143 *pValue = pVCpu->cpum.s.Guest.dr[iReg];
1150 return pVCpu->cpum.s.Guest.msrEFER;
1164 unsigned iEnd = pVM->cpum.s.GuestInfo.cCpuIdLeaves;
1168 PCPUMCPUIDLEAF paLeaves = pVM->cpum.s.GuestInfo.CTX_SUFF(paCpuIdLeaves);
1221 unsigned iEnd = pVM->cpum.s.GuestInfo.cCpuIdLeaves;
1225 PCPUMCPUIDLEAF paLeaves = pVM->cpum.s.GuestInfo.CTX_SUFF(paCpuIdLeaves);
1257 while ( i + 1 < pVM->cpum.s.GuestInfo.cCpuIdLeaves
1314 | (pVCpu->cpum.s.Guest.cr4 & X86_CR4_OSXSAVE ? X86_CPUID_FEATURE_ECX_OSXSAVE : 0);
1351 switch (pVM->cpum.s.GuestInfo.enmUnknownCpuIdMethod)
1358 *pEax = pVM->cpum.s.GuestInfo.DefCpuId.uEax;
1359 *pEbx = pVM->cpum.s.GuestInfo.DefCpuId.uEbx;
1360 *pEcx = pVM->cpum.s.GuestInfo.DefCpuId.uEcx;
1361 *pEdx = pVM->cpum.s.GuestInfo.DefCpuId.uEdx;
1393 pVM->cpum.s.aGuestCpuIdPatmStd[1].uEdx = pLeaf->uEdx |= X86_CPUID_FEATURE_EDX_APIC;
1397 && pVM->cpum.s.GuestFeatures.enmCpuVendor == CPUMCPUVENDOR_AMD)
1398 pVM->cpum.s.aGuestCpuIdPatmExt[1].uEdx = pLeaf->uEdx |= X86_CPUID_AMD_FEATURE_EDX_APIC;
1400 pVM->cpum.s.GuestFeatures.fApic = 1;
1410 pVM->cpum.s.aGuestCpuIdPatmStd[1].uEcx = pLeaf->uEcx |= X86_CPUID_FEATURE_ECX_X2APIC;
1411 pVM->cpum.s.GuestFeatures.fX2Apic = 1;
1420 if (!pVM->cpum.s.HostFeatures.fSysEnter)
1428 pVM->cpum.s.aGuestCpuIdPatmStd[1].uEdx = pLeaf->uEdx |= X86_CPUID_FEATURE_EDX_SEP;
1429 pVM->cpum.s.GuestFeatures.fSysEnter = 1;
1440 || !pVM->cpum.s.HostFeatures.fSysCall)
1446 if (!pVM->cpum.s.HostFeatures.fLongMode)
1455 pVM->cpum.s.aGuestCpuIdPatmExt[1].uEdx = pLeaf->uEdx |= X86_CPUID_EXT_FEATURE_EDX_SYSCALL;
1456 pVM->cpum.s.GuestFeatures.fSysCall = 1;
1465 if (!pVM->cpum.s.HostFeatures.fPae)
1473 pVM->cpum.s.aGuestCpuIdPatmStd[1].uEdx = pLeaf->uEdx |= X86_CPUID_FEATURE_EDX_PAE;
1477 && pVM->cpum.s.GuestFeatures.enmCpuVendor == CPUMCPUVENDOR_AMD)
1478 pVM->cpum.s.aGuestCpuIdPatmExt[1].uEdx = pLeaf->uEdx |= X86_CPUID_AMD_FEATURE_EDX_PAE;
1480 pVM->cpum.s.GuestFeatures.fPae = 1;
1491 || !pVM->cpum.s.HostFeatures.fLongMode)
1498 pVM->cpum.s.aGuestCpuIdPatmExt[1].uEdx = pLeaf->uEdx |= X86_CPUID_EXT_FEATURE_EDX_LONG_MODE;
1499 pVM->cpum.s.GuestFeatures.fLongMode = 1;
1510 || !pVM->cpum.s.HostFeatures.fNoExecute)
1517 pVM->cpum.s.aGuestCpuIdPatmExt[1].uEdx = pLeaf->uEdx |= X86_CPUID_EXT_FEATURE_EDX_NX;
1518 pVM->cpum.s.GuestFeatures.fNoExecute = 1;
1530 || !pVM->cpum.s.HostFeatures.fLahfSahf)
1537 pVM->cpum.s.aGuestCpuIdPatmExt[1].uEcx = pLeaf->uEcx |= X86_CPUID_EXT_FEATURE_ECX_LAHF_SAHF;
1538 pVM->cpum.s.GuestFeatures.fLahfSahf = 1;
1550 pVM->cpum.s.aGuestCpuIdPatmStd[1].uEdx = pLeaf->uEdx |= X86_CPUID_FEATURE_EDX_PAT;
1554 && pVM->cpum.s.GuestFeatures.enmCpuVendor == CPUMCPUVENDOR_AMD)
1555 pVM->cpum.s.aGuestCpuIdPatmExt[1].uEdx = pLeaf->uEdx |= X86_CPUID_AMD_FEATURE_EDX_PAT;
1557 pVM->cpum.s.GuestFeatures.fPat = 1;
1568 || !pVM->cpum.s.HostFeatures.fRdTscP
1569 || pVM->cpum.s.u8PortableCpuIdLevel > 0)
1571 if (!pVM->cpum.s.u8PortableCpuIdLevel)
1577 pVM->cpum.s.aGuestCpuIdPatmExt[1].uEdx = pLeaf->uEdx |= X86_CPUID_EXT_FEATURE_EDX_RDTSCP;
1578 pVM->cpum.s.HostFeatures.fRdTscP = 1;
1588 pVM->cpum.s.aGuestCpuIdPatmStd[1].uEcx = pLeaf->uEcx |= X86_CPUID_FEATURE_ECX_HVP;
1589 pVM->cpum.s.GuestFeatures.fHypervisorPresent = 1;
1600 || !pVM->cpum.s.HostFeatures.fMWaitExtensions)
1607 pVM->cpum.s.aGuestCpuIdPatmStd[5].uEcx = pLeaf->uEcx |= X86_CPUID_MWAIT_ECX_EXT | X86_CPUID_MWAIT_ECX_BREAKIRQIF0;
1608 pVM->cpum.s.GuestFeatures.fMWaitExtensions = 1;
1616 AssertLogRelReturnVoid(pVM->cpum.s.HostFeatures.fXSaveRstor && pVM->cpum.s.HostFeatures.fOpSysXSaveRstor);
1623 pVM->cpum.s.aGuestCpuIdPatmStd[1].uEcx = pLeaf->uEcx |= X86_CPUID_FEATURE_ECX_OSXSAVE;
1637 pVCpu->cpum.s.fChanged |= CPUM_CHANGED_CPUID;
1653 case CPUMCPUIDFEATURE_APIC: return pVM->cpum.s.GuestFeatures.fApic;
1654 case CPUMCPUIDFEATURE_X2APIC: return pVM->cpum.s.GuestFeatures.fX2Apic;
1655 case CPUMCPUIDFEATURE_SYSCALL: return pVM->cpum.s.GuestFeatures.fSysCall;
1656 case CPUMCPUIDFEATURE_SEP: return pVM->cpum.s.GuestFeatures.fSysEnter;
1657 case CPUMCPUIDFEATURE_PAE: return pVM->cpum.s.GuestFeatures.fPae;
1658 case CPUMCPUIDFEATURE_NX: return pVM->cpum.s.GuestFeatures.fNoExecute;
1659 case CPUMCPUIDFEATURE_LAHF: return pVM->cpum.s.GuestFeatures.fLahfSahf;
1660 case CPUMCPUIDFEATURE_LONG_MODE: return pVM->cpum.s.GuestFeatures.fLongMode;
1661 case CPUMCPUIDFEATURE_PAT: return pVM->cpum.s.GuestFeatures.fPat;
1662 case CPUMCPUIDFEATURE_RDTSCP: return pVM->cpum.s.GuestFeatures.fRdTscP;
1663 case CPUMCPUIDFEATURE_HVP: return pVM->cpum.s.GuestFeatures.fHypervisorPresent;
1664 case CPUMCPUIDFEATURE_MWAIT_EXTS: return pVM->cpum.s.GuestFeatures.fMWaitExtensions;
1690 pVM->cpum.s.aGuestCpuIdPatmStd[1].uEdx = pLeaf->uEdx &= ~X86_CPUID_FEATURE_EDX_APIC;
1694 && pVM->cpum.s.GuestFeatures.enmCpuVendor == CPUMCPUVENDOR_AMD)
1695 pVM->cpum.s.aGuestCpuIdPatmExt[1].uEdx = pLeaf->uEdx &= ~X86_CPUID_AMD_FEATURE_EDX_APIC;
1697 pVM->cpum.s.GuestFeatures.fApic = 0;
1704 pVM->cpum.s.aGuestCpuIdPatmStd[1].uEcx = pLeaf->uEcx &= ~X86_CPUID_FEATURE_ECX_X2APIC;
1705 pVM->cpum.s.GuestFeatures.fX2Apic = 0;
1712 pVM->cpum.s.aGuestCpuIdPatmStd[1].uEdx = pLeaf->uEdx &= ~X86_CPUID_FEATURE_EDX_PAE;
1716 && pVM->cpum.s.GuestFeatures.enmCpuVendor == CPUMCPUVENDOR_AMD)
1717 pVM->cpum.s.aGuestCpuIdPatmExt[1].uEdx = pLeaf->uEdx &= ~X86_CPUID_AMD_FEATURE_EDX_PAE;
1719 pVM->cpum.s.GuestFeatures.fPae = 0;
1726 pVM->cpum.s.aGuestCpuIdPatmStd[1].uEdx = pLeaf->uEdx &= ~X86_CPUID_FEATURE_EDX_PAT;
1730 && pVM->cpum.s.GuestFeatures.enmCpuVendor == CPUMCPUVENDOR_AMD)
1731 pVM->cpum.s.aGuestCpuIdPatmExt[1].uEdx = pLeaf->uEdx &= ~X86_CPUID_AMD_FEATURE_EDX_PAT;
1733 pVM->cpum.s.GuestFeatures.fPat = 0;
1740 pVM->cpum.s.aGuestCpuIdPatmExt[1].uEdx = pLeaf->uEdx &= ~X86_CPUID_EXT_FEATURE_EDX_LONG_MODE;
1741 pVM->cpum.s.GuestFeatures.fLongMode = 0;
1747 pVM->cpum.s.aGuestCpuIdPatmExt[1].uEcx = pLeaf->uEcx &= ~X86_CPUID_EXT_FEATURE_ECX_LAHF_SAHF;
1748 pVM->cpum.s.GuestFeatures.fLahfSahf = 0;
1754 pVM->cpum.s.aGuestCpuIdPatmExt[1].uEdx = pLeaf->uEdx &= ~X86_CPUID_EXT_FEATURE_EDX_RDTSCP;
1755 pVM->cpum.s.GuestFeatures.fRdTscP = 0;
1762 pVM->cpum.s.aGuestCpuIdPatmStd[1].uEcx = pLeaf->uEcx &= ~X86_CPUID_FEATURE_ECX_HVP;
1763 pVM->cpum.s.GuestFeatures.fHypervisorPresent = 0;
1769 pVM->cpum.s.aGuestCpuIdPatmStd[5].uEcx = pLeaf->uEcx &= ~(X86_CPUID_MWAIT_ECX_EXT | X86_CPUID_MWAIT_ECX_BREAKIRQIF0);
1770 pVM->cpum.s.GuestFeatures.fMWaitExtensions = 0;
1778 AssertLogRelReturnVoid(pVM->cpum.s.HostFeatures.fXSaveRstor && pVM->cpum.s.HostFeatures.fOpSysXSaveRstor);
1785 pVM->cpum.s.aGuestCpuIdPatmStd[1].uEcx = pLeaf->uEcx &= ~X86_CPUID_FEATURE_ECX_OSXSAVE;
1798 pVCpu->cpum.s.fChanged |= CPUM_CHANGED_CPUID;
1811 return (CPUMCPUVENDOR)pVM->cpum.s.HostFeatures.enmCpuVendor;
1823 return (CPUMCPUVENDOR)pVM->cpum.s.GuestFeatures.enmCpuVendor;
1829 pVCpu->cpum.s.Guest.dr[0] = uDr0;
1836 pVCpu->cpum.s.Guest.dr[1] = uDr1;
1843 pVCpu->cpum.s.Guest.dr[2] = uDr2;
1850 pVCpu->cpum.s.Guest.dr[3] = uDr3;
1857 pVCpu->cpum.s.Guest.dr[6] = uDr6;
1864 pVCpu->cpum.s.Guest.dr[7] = uDr7;
1875 pVCpu->cpum.s.Guest.dr[iReg] = Value;
1933 if (!fForceHyper && (pVCpu->cpum.s.fUseFlags & CPUM_USED_DEBUG_REGS_HYPER))
2037 if (!(pVCpu->cpum.s.fUseFlags & CPUM_USED_DEBUG_REGS_HOST))
2039 if (!(pVCpu->cpum.s.fUseFlags & CPUM_USE_DEBUG_REGS_HOST))
2041 pVCpu->cpum.s.Host.dr6 = ASMGetDR6();
2042 pVCpu->cpum.s.Host.dr7 = ASMGetDR7();
2044 pVCpu->cpum.s.Host.dr0 = ASMGetDR0();
2045 pVCpu->cpum.s.Host.dr1 = ASMGetDR1();
2046 pVCpu->cpum.s.Host.dr2 = ASMGetDR2();
2047 pVCpu->cpum.s.Host.dr3 = ASMGetDR3();
2048 pVCpu->cpum.s.fUseFlags |= CPUM_USED_DEBUG_REGS_HOST | CPUM_USE_DEBUG_REGS_HYPER | CPUM_USED_DEBUG_REGS_HYPER;
2051 pVCpu->cpum.s.Hyper.dr[0] = uNewDr0;
2053 pVCpu->cpum.s.Hyper.dr[1] = uNewDr1;
2055 pVCpu->cpum.s.Hyper.dr[2] = uNewDr2;
2057 pVCpu->cpum.s.Hyper.dr[3] = uNewDr3;
2060 pVCpu->cpum.s.Hyper.dr[7] = uNewDr7;
2066 pVCpu->cpum.s.fUseFlags |= CPUM_USE_DEBUG_REGS_HYPER;
2067 if (uNewDr3 != pVCpu->cpum.s.Hyper.dr[3])
2069 if (uNewDr2 != pVCpu->cpum.s.Hyper.dr[2])
2071 if (uNewDr1 != pVCpu->cpum.s.Hyper.dr[1])
2073 if (uNewDr0 != pVCpu->cpum.s.Hyper.dr[0])
2075 if (uNewDr7 != pVCpu->cpum.s.Hyper.dr[7])
2107 if (pVCpu->cpum.s.fUseFlags & CPUM_USED_DEBUG_REGS_HYPER)
2112 if (pVCpu->cpum.s.Hyper.dr[0])
2114 if (pVCpu->cpum.s.Hyper.dr[1])
2116 if (pVCpu->cpum.s.Hyper.dr[2])
2118 if (pVCpu->cpum.s.Hyper.dr[3])
2120 pVCpu->cpum.s.fUseFlags &= ~CPUM_USED_DEBUG_REGS_HYPER;
2123 pVCpu->cpum.s.fUseFlags &= ~CPUM_USE_DEBUG_REGS_HYPER;
2126 pVCpu->cpum.s.Hyper.dr[7] = X86_DR7_RA1_MASK;
2127 pVCpu->cpum.s.Hyper.dr[3] = 0;
2128 pVCpu->cpum.s.Hyper.dr[2] = 0;
2129 pVCpu->cpum.s.Hyper.dr[1] = 0;
2130 pVCpu->cpum.s.Hyper.dr[0] = 0;
2134 pVCpu->cpum.s.fUseFlags, pVCpu->cpum.s.Hyper.dr[0], pVCpu->cpum.s.Hyper.dr[1],
2135 pVCpu->cpum.s.Hyper.dr[2], pVCpu->cpum.s.Hyper.dr[3], pVCpu->cpum.s.Hyper.dr[6],
2136 pVCpu->cpum.s.Hyper.dr[7]));
2157 if ( (uNewValue & ~pVCpu->CTX_SUFF(pVM)->cpum.s.fXStateGuestMask) == 0
2168 pVCpu->cpum.s.Guest.aXcr[0] = uNewValue;
2173 uint64_t fNewComponents = ~pVCpu->cpum.s.Guest.fXStateMask & uNewValue;
2177 if (pVCpu->cpum.s.fUseFlags & CPUM_USED_FPU)
2179 if (pVCpu->cpum.s.Guest.fXStateMask != 0)
2181 ASMXRstor(pVCpu->cpum.s.Guest.CTX_SUFF(pXState), fNewComponents);
2185 pVCpu->cpum.s.Guest.fXStateMask |= XSAVE_C_X87 | XSAVE_C_SSE;
2187 ASMXRstor(pVCpu->cpum.s.Guest.CTX_SUFF(pXState), uNewValue & ~(XSAVE_C_X87 | XSAVE_C_SSE));
2191 pVCpu->cpum.s.Guest.fXStateMask |= uNewValue;
2207 return !!(pVCpu->cpum.s.Guest.msrEFER & MSR_K6_EFER_NXE);
2220 return !!(pVCpu->cpum.s.Guest.cr4 & (X86_CR4_PSE | X86_CR4_PAE));
2232 return !!(pVCpu->cpum.s.Guest.cr0 & X86_CR0_PG);
2244 return !!(pVCpu->cpum.s.Guest.cr0 & X86_CR0_WP);
2256 return !(pVCpu->cpum.s.Guest.cr0 & X86_CR0_PE);
2268 return !(pVCpu->cpum.s.Guest.cr0 & X86_CR0_PE)
2269 || pVCpu->cpum.s.Guest.eflags.Bits.u1VM; /** @todo verify that this cannot be set in long mode. */
2281 return !!(pVCpu->cpum.s.Guest.cr0 & X86_CR0_PE);
2293 return (pVCpu->cpum.s.Guest.cr0 & (X86_CR0_PE | X86_CR0_PG)) == (X86_CR0_PE | X86_CR0_PG);
2305 return (pVCpu->cpum.s.Guest.msrEFER & MSR_K6_EFER_LMA) == MSR_K6_EFER_LMA;
2319 return (pVCpu->cpum.s.Guest.cr4 & X86_CR4_PAE)
2320 && (pVCpu->cpum.s.Guest.cr0 & X86_CR0_PG)
2321 && !(pVCpu->cpum.s.Guest.msrEFER & MSR_K6_EFER_LMA);
2335 CPUMSELREG_LAZY_LOAD_HIDDEN_PARTS(pVCpu, &pVCpu->cpum.s.Guest.cs);
2336 return pVCpu->cpum.s.Guest.cs.Attr.n.u1Long;
2362 return pVCpu->cpum.s.fRawEntered;
2378 Assert(!pVCpu->cpum.s.fRawEntered);
2379 Assert(!pVCpu->cpum.s.fRemEntered);
2380 PCPUMCTX pCtx = &pVCpu->cpum.s.Guest;
2430 Assert((pVCpu->cpum.s.Guest.cr0 & (X86_CR0_PG | X86_CR0_WP | X86_CR0_PE)) == (X86_CR0_PG | X86_CR0_PE | X86_CR0_WP));
2434 pVCpu->cpum.s.fRawEntered = true;
2456 Assert(!pVCpu->cpum.s.fRemEntered);
2457 if (!pVCpu->cpum.s.fRawEntered)
2459 pVCpu->cpum.s.fRawEntered = false;
2461 PCPUMCTX pCtx = &pVCpu->cpum.s.Guest;
2556 if (pVCpu->cpum.s.fRawEntered)
2557 PATMRawSetEFlags(pVCpu->CTX_SUFF(pVM), &pVCpu->cpum.s.Guest, fEfl);
2560 pVCpu->cpum.s.Guest.eflags.u32 = fEfl;
2573 if (pVCpu->cpum.s.fRawEntered)
2574 return PATMRawGetEFlags(pVCpu->CTX_SUFF(pVM), &pVCpu->cpum.s.Guest);
2576 return pVCpu->cpum.s.Guest.eflags.u32;
2587 pVCpu->cpum.s.fChanged |= fChangedFlags;
2600 return pVM->cpum.s.HostFeatures.fXSaveRstor != 0;
2612 return RT_BOOL(pVM->cpum.s.fHostUseFlags & CPUM_USE_SYSENTER);
2624 return RT_BOOL(pVM->cpum.s.fHostUseFlags & CPUM_USE_SYSCALL);
2637 return cpumHandleLazyFPUAsm(&pVCpu->cpum.s);
2650 return RT_BOOL(pVCpu->cpum.s.fUseFlags & CPUM_USED_FPU);
2662 return RT_BOOL(pVCpu->cpum.s.fUseFlags & CPUM_USED_DEBUG_REGS_GUEST);
2675 return RT_BOOL(pVCpu->cpum.s.fUseFlags & CPUM_SYNC_DEBUG_REGS_GUEST);
2687 return RT_BOOL(pVCpu->cpum.s.fUseFlags & CPUM_USED_DEBUG_REGS_HYPER);
2700 return RT_BOOL(pVCpu->cpum.s.fUseFlags & CPUM_SYNC_DEBUG_REGS_HYPER);
2713 Assert(!(pVCpu->cpum.s.fUseFlags & (CPUM_USED_DEBUG_REGS_GUEST | CPUM_USED_DEBUG_REGS_HYPER | CPUM_USED_DEBUG_REGS_HOST)));
2755 if (pVCpu->cpum.s.Guest.cr0 & X86_CR0_PE)
2757 if (!pVCpu->cpum.s.Guest.eflags.Bits.u1VM)
2759 if (CPUMSELREG_ARE_HIDDEN_PARTS_VALID(pVCpu, &pVCpu->cpum.s.Guest.ss))
2760 uCpl = pVCpu->cpum.s.Guest.ss.Attr.n.u2Dpl;
2763 uCpl = (pVCpu->cpum.s.Guest.ss.Sel & X86_SEL_RPL);
2766 if (pVCpu->cpum.s.fRawEntered)
2802 if (!(pVCpu->cpum.s.Guest.cr0 & X86_CR0_PE))
2804 else if (!(pVCpu->cpum.s.Guest.msrEFER & MSR_K6_EFER_LMA))
2821 if (!(pVCpu->cpum.s.Guest.cr0 & X86_CR0_PE))
2824 if (pVCpu->cpum.s.Guest.eflags.Bits.u1VM)
2826 Assert(!(pVCpu->cpum.s.Guest.msrEFER & MSR_K6_EFER_LMA));
2830 CPUMSELREG_LAZY_LOAD_HIDDEN_PARTS(pVCpu, &pVCpu->cpum.s.Guest.cs);
2831 if ( pVCpu->cpum.s.Guest.cs.Attr.n.u1Long
2832 && (pVCpu->cpum.s.Guest.msrEFER & MSR_K6_EFER_LMA))
2835 if (pVCpu->cpum.s.Guest.cs.Attr.n.u1DefBig)
2844 if (!(pVCpu->cpum.s.Guest.cr0 & X86_CR0_PE))
2847 if (pVCpu->cpum.s.Guest.eflags.Bits.u1VM)
2849 Assert(!(pVCpu->cpum.s.Guest.msrEFER & MSR_K6_EFER_LMA));
2853 CPUMSELREG_LAZY_LOAD_HIDDEN_PARTS(pVCpu, &pVCpu->cpum.s.Guest.cs);
2854 if ( pVCpu->cpum.s.Guest.cs.Attr.n.u1Long
2855 && (pVCpu->cpum.s.Guest.msrEFER & MSR_K6_EFER_LMA))
2858 if (pVCpu->cpum.s.Guest.cs.Attr.n.u1DefBig)