Lines Matching refs:Guest
60 * Converts a CPUMCPU::Guest pointer into a VMCPU pointer.
65 #define CPUM_GUEST_CTX_TO_VMCPU(a_pGuestCtx) RT_FROM_MEMBER(a_pGuestCtx, VMCPU, cpum.s.Guest)
96 Assert((uintptr_t)(pSReg - &pVCpu->cpum.s.Guest.es) < X86_SREG_COUNT);
98 if (pVCpu->cpum.s.Guest.eflags.Bits.u1VM)
102 pSReg->Attr.n.u4Type = pSReg == &pVCpu->cpum.s.Guest.cs ? X86_SEL_TYPE_ER_ACC : X86_SEL_TYPE_RW_ACC;
112 else if (!(pVCpu->cpum.s.Guest.cr0 & X86_CR0_PE))
134 SELMLoadHiddenSelectorReg(pVCpu, &pVCpu->cpum.s.Guest, pSReg);
147 CPUMSELREG_LAZY_LOAD_HIDDEN_PARTS(pVCpu, &pVCpu->cpum.s.Guest.cs);
148 CPUMSELREG_LAZY_LOAD_HIDDEN_PARTS(pVCpu, &pVCpu->cpum.s.Guest.ss);
330 if (!CPUMIsGuestInLongModeEx(&(a_pVCpu)->cpum.s.Guest)) \
571 return CPUMCTX2CORE(&pVCpu->cpum.s.Guest);
583 return &pVCpu->cpum.s.Guest;
594 pVCpu->cpum.s.Guest.gdtr.cbGdt = cbLimit;
595 pVCpu->cpum.s.Guest.gdtr.pGdt = GCPtrBase;
608 pVCpu->cpum.s.Guest.idtr.cbIdt = cbLimit;
609 pVCpu->cpum.s.Guest.idtr.pIdt = GCPtrBase;
622 pVCpu->cpum.s.Guest.tr.Sel = tr;
632 || pVCpu->cpum.s.Guest.ldtr.Sel != 0)
637 pVCpu->cpum.s.Guest.ldtr.Sel = ldtr;
639 pVCpu->cpum.s.Guest.ldtr.ValidSel = 0;
640 pVCpu->cpum.s.Guest.ldtr.fFlags = 0;
665 != (pVCpu->cpum.s.Guest.cr0 & (X86_CR0_TS | X86_CR0_EM | X86_CR0_MP)))
673 if ((cr0 & X86_CR0_EM) != (pVCpu->cpum.s.Guest.cr0 & X86_CR0_EM))
677 AssertMsg((HyperCR0 & X86_CR0_EM) == (pVCpu->cpum.s.Guest.cr0 & X86_CR0_EM), ("%#x\n", HyperCR0));
688 AssertMsg((HyperCR0 & X86_CR0_EM) == (pVCpu->cpum.s.Guest.cr0 & X86_CR0_EM), ("%#x\n", HyperCR0));
700 == (pVCpu->cpum.s.Guest.cr0 & (X86_CR0_TS | X86_CR0_EM | X86_CR0_MP)),
701 ("%#x %#x\n", HyperCR0, pVCpu->cpum.s.Guest.cr0));
715 != (pVCpu->cpum.s.Guest.cr0 & (X86_CR0_PG | X86_CR0_WP | X86_CR0_PE)))
722 if (((cr0 ^ pVCpu->cpum.s.Guest.cr0) & X86_CR0_WP) && (cr0 & X86_CR0_WP))
725 pVCpu->cpum.s.Guest.cr0 = cr0 | X86_CR0_ET;
732 pVCpu->cpum.s.Guest.cr2 = cr2;
739 pVCpu->cpum.s.Guest.cr3 = cr3;
751 != (pVCpu->cpum.s.Guest.cr4 & X86_CR4_OSXSAVE) )
761 != (pVCpu->cpum.s.Guest.cr4 & (X86_CR4_PGE | X86_CR4_PAE | X86_CR4_PSE)))
765 pVCpu->cpum.s.Guest.cr4 = cr4;
772 pVCpu->cpum.s.Guest.eflags.u32 = eflags;
779 pVCpu->cpum.s.Guest.eip = eip;
786 pVCpu->cpum.s.Guest.eax = eax;
793 pVCpu->cpum.s.Guest.ebx = ebx;
800 pVCpu->cpum.s.Guest.ecx = ecx;
807 pVCpu->cpum.s.Guest.edx = edx;
814 pVCpu->cpum.s.Guest.esp = esp;
821 pVCpu->cpum.s.Guest.ebp = ebp;
828 pVCpu->cpum.s.Guest.esi = esi;
835 pVCpu->cpum.s.Guest.edi = edi;
842 pVCpu->cpum.s.Guest.ss.Sel = ss;
849 pVCpu->cpum.s.Guest.cs.Sel = cs;
856 pVCpu->cpum.s.Guest.ds.Sel = ds;
863 pVCpu->cpum.s.Guest.es.Sel = es;
870 pVCpu->cpum.s.Guest.fs.Sel = fs;
877 pVCpu->cpum.s.Guest.gs.Sel = gs;
884 pVCpu->cpum.s.Guest.msrEFER = val;
891 *pcbLimit = pVCpu->cpum.s.Guest.idtr.cbIdt;
892 return pVCpu->cpum.s.Guest.idtr.pIdt;
899 *pHidden = pVCpu->cpum.s.Guest.tr;
900 return pVCpu->cpum.s.Guest.tr.Sel;
906 return pVCpu->cpum.s.Guest.cs.Sel;
912 return pVCpu->cpum.s.Guest.ds.Sel;
918 return pVCpu->cpum.s.Guest.es.Sel;
924 return pVCpu->cpum.s.Guest.fs.Sel;
930 return pVCpu->cpum.s.Guest.gs.Sel;
936 return pVCpu->cpum.s.Guest.ss.Sel;
942 return pVCpu->cpum.s.Guest.ldtr.Sel;
948 *pGCPtrBase = pVCpu->cpum.s.Guest.ldtr.u64Base;
949 *pcbLimit = pVCpu->cpum.s.Guest.ldtr.u32Limit;
950 return pVCpu->cpum.s.Guest.ldtr.Sel;
956 return pVCpu->cpum.s.Guest.cr0;
962 return pVCpu->cpum.s.Guest.cr2;
968 return pVCpu->cpum.s.Guest.cr3;
974 return pVCpu->cpum.s.Guest.cr4;
990 *pGDTR = pVCpu->cpum.s.Guest.gdtr;
996 return pVCpu->cpum.s.Guest.eip;
1002 return pVCpu->cpum.s.Guest.rip;
1008 return pVCpu->cpum.s.Guest.eax;
1014 return pVCpu->cpum.s.Guest.ebx;
1020 return pVCpu->cpum.s.Guest.ecx;
1026 return pVCpu->cpum.s.Guest.edx;
1032 return pVCpu->cpum.s.Guest.esi;
1038 return pVCpu->cpum.s.Guest.edi;
1044 return pVCpu->cpum.s.Guest.esp;
1050 return pVCpu->cpum.s.Guest.ebp;
1056 return pVCpu->cpum.s.Guest.eflags.u32;
1065 *pValue = pVCpu->cpum.s.Guest.cr0;
1069 *pValue = pVCpu->cpum.s.Guest.cr2;
1073 *pValue = pVCpu->cpum.s.Guest.cr3;
1077 *pValue = pVCpu->cpum.s.Guest.cr4;
1103 return pVCpu->cpum.s.Guest.dr[0];
1109 return pVCpu->cpum.s.Guest.dr[1];
1115 return pVCpu->cpum.s.Guest.dr[2];
1121 return pVCpu->cpum.s.Guest.dr[3];
1127 return pVCpu->cpum.s.Guest.dr[6];
1133 return pVCpu->cpum.s.Guest.dr[7];
1143 *pValue = pVCpu->cpum.s.Guest.dr[iReg];
1150 return pVCpu->cpum.s.Guest.msrEFER;
1314 | (pVCpu->cpum.s.Guest.cr4 & X86_CR4_OSXSAVE ? X86_CPUID_FEATURE_ECX_OSXSAVE : 0);
1829 pVCpu->cpum.s.Guest.dr[0] = uDr0;
1836 pVCpu->cpum.s.Guest.dr[1] = uDr1;
1843 pVCpu->cpum.s.Guest.dr[2] = uDr2;
1850 pVCpu->cpum.s.Guest.dr[3] = uDr3;
1857 pVCpu->cpum.s.Guest.dr[6] = uDr6;
1864 pVCpu->cpum.s.Guest.dr[7] = uDr7;
1875 pVCpu->cpum.s.Guest.dr[iReg] = Value;
2168 pVCpu->cpum.s.Guest.aXcr[0] = uNewValue;
2173 uint64_t fNewComponents = ~pVCpu->cpum.s.Guest.fXStateMask & uNewValue;
2179 if (pVCpu->cpum.s.Guest.fXStateMask != 0)
2181 ASMXRstor(pVCpu->cpum.s.Guest.CTX_SUFF(pXState), fNewComponents);
2185 pVCpu->cpum.s.Guest.fXStateMask |= XSAVE_C_X87 | XSAVE_C_SSE;
2187 ASMXRstor(pVCpu->cpum.s.Guest.CTX_SUFF(pXState), uNewValue & ~(XSAVE_C_X87 | XSAVE_C_SSE));
2191 pVCpu->cpum.s.Guest.fXStateMask |= uNewValue;
2207 return !!(pVCpu->cpum.s.Guest.msrEFER & MSR_K6_EFER_NXE);
2220 return !!(pVCpu->cpum.s.Guest.cr4 & (X86_CR4_PSE | X86_CR4_PAE));
2232 return !!(pVCpu->cpum.s.Guest.cr0 & X86_CR0_PG);
2244 return !!(pVCpu->cpum.s.Guest.cr0 & X86_CR0_WP);
2256 return !(pVCpu->cpum.s.Guest.cr0 & X86_CR0_PE);
2268 return !(pVCpu->cpum.s.Guest.cr0 & X86_CR0_PE)
2269 || pVCpu->cpum.s.Guest.eflags.Bits.u1VM; /** @todo verify that this cannot be set in long mode. */
2281 return !!(pVCpu->cpum.s.Guest.cr0 & X86_CR0_PE);
2293 return (pVCpu->cpum.s.Guest.cr0 & (X86_CR0_PE | X86_CR0_PG)) == (X86_CR0_PE | X86_CR0_PG);
2305 return (pVCpu->cpum.s.Guest.msrEFER & MSR_K6_EFER_LMA) == MSR_K6_EFER_LMA;
2319 return (pVCpu->cpum.s.Guest.cr4 & X86_CR4_PAE)
2320 && (pVCpu->cpum.s.Guest.cr0 & X86_CR0_PG)
2321 && !(pVCpu->cpum.s.Guest.msrEFER & MSR_K6_EFER_LMA);
2335 CPUMSELREG_LAZY_LOAD_HIDDEN_PARTS(pVCpu, &pVCpu->cpum.s.Guest.cs);
2336 return pVCpu->cpum.s.Guest.cs.Attr.n.u1Long;
2380 PCPUMCTX pCtx = &pVCpu->cpum.s.Guest;
2430 Assert((pVCpu->cpum.s.Guest.cr0 & (X86_CR0_PG | X86_CR0_WP | X86_CR0_PE)) == (X86_CR0_PG | X86_CR0_PE | X86_CR0_WP));
2461 PCPUMCTX pCtx = &pVCpu->cpum.s.Guest;
2557 PATMRawSetEFlags(pVCpu->CTX_SUFF(pVM), &pVCpu->cpum.s.Guest, fEfl);
2560 pVCpu->cpum.s.Guest.eflags.u32 = fEfl;
2574 return PATMRawGetEFlags(pVCpu->CTX_SUFF(pVM), &pVCpu->cpum.s.Guest);
2576 return pVCpu->cpum.s.Guest.eflags.u32;
2755 if (pVCpu->cpum.s.Guest.cr0 & X86_CR0_PE)
2757 if (!pVCpu->cpum.s.Guest.eflags.Bits.u1VM)
2759 if (CPUMSELREG_ARE_HIDDEN_PARTS_VALID(pVCpu, &pVCpu->cpum.s.Guest.ss))
2760 uCpl = pVCpu->cpum.s.Guest.ss.Attr.n.u2Dpl;
2763 uCpl = (pVCpu->cpum.s.Guest.ss.Sel & X86_SEL_RPL);
2802 if (!(pVCpu->cpum.s.Guest.cr0 & X86_CR0_PE))
2804 else if (!(pVCpu->cpum.s.Guest.msrEFER & MSR_K6_EFER_LMA))
2821 if (!(pVCpu->cpum.s.Guest.cr0 & X86_CR0_PE))
2824 if (pVCpu->cpum.s.Guest.eflags.Bits.u1VM)
2826 Assert(!(pVCpu->cpum.s.Guest.msrEFER & MSR_K6_EFER_LMA));
2830 CPUMSELREG_LAZY_LOAD_HIDDEN_PARTS(pVCpu, &pVCpu->cpum.s.Guest.cs);
2831 if ( pVCpu->cpum.s.Guest.cs.Attr.n.u1Long
2832 && (pVCpu->cpum.s.Guest.msrEFER & MSR_K6_EFER_LMA))
2835 if (pVCpu->cpum.s.Guest.cs.Attr.n.u1DefBig)
2844 if (!(pVCpu->cpum.s.Guest.cr0 & X86_CR0_PE))
2847 if (pVCpu->cpum.s.Guest.eflags.Bits.u1VM)
2849 Assert(!(pVCpu->cpum.s.Guest.msrEFER & MSR_K6_EFER_LMA));
2853 CPUMSELREG_LAZY_LOAD_HIDDEN_PARTS(pVCpu, &pVCpu->cpum.s.Guest.cs);
2854 if ( pVCpu->cpum.s.Guest.cs.Attr.n.u1Long
2855 && (pVCpu->cpum.s.Guest.msrEFER & MSR_K6_EFER_LMA))
2858 if (pVCpu->cpum.s.Guest.cs.Attr.n.u1DefBig)