Lines Matching refs:cpum

22 #include <VBox/vmm/cpum.h>
48 a_Type *a_VarName = (a_Type *)((uintptr_t)&(a_pVCpu)->cpum.s + (a_pRange)->offCpumCpu)
210 if ( !pVM->cpum.s.GuestFeatures.fApic
211 && !pVM->cpum.s.GuestFeatures.fX2Apic)
218 *puValue = pVCpu->cpum.s.Guest.msrApicBase;
404 uint64_t fInvPhysMask = ~(RT_BIT_64(pVCpu->CTX_SUFF(pVM)->cpum.s.GuestFeatures.cMaxPhysAddrWidth) - 1U);
438 uint64_t fInvPhysMask = ~(RT_BIT_64(pVCpu->CTX_SUFF(pVM)->cpum.s.GuestFeatures.cMaxPhysAddrWidth) - 1U);
485 *puValue = pVCpu->cpum.s.GuestMsrs.msr.MtrrDefType;
499 pVCpu->cpum.s.GuestMsrs.msr.MtrrDefType = uValue;
507 *puValue = pVCpu->cpum.s.Guest.msrPAT;
515 pVCpu->cpum.s.Guest.msrPAT = uValue;
523 *puValue = pVCpu->cpum.s.Guest.SysEnter.cs;
533 pVCpu->cpum.s.Guest.SysEnter.cs = uValue;
541 *puValue = pVCpu->cpum.s.Guest.SysEnter.esp;
551 pVCpu->cpum.s.Guest.SysEnter.esp = uValue;
562 *puValue = pVCpu->cpum.s.Guest.SysEnter.eip;
572 pVCpu->cpum.s.Guest.SysEnter.eip = uValue;
977 *puValue = pVCpu->cpum.s.GuestMsrs.msr.MiscEnable;
986 uint64_t const uOld = pVCpu->cpum.s.GuestMsrs.msr.MiscEnable;
991 pVCpu->cpum.s.GuestMsrs.msr.MiscEnable = uValue
996 uOld, uValue, pVCpu->cpum.s.GuestMsrs.msr.MiscEnable));
1320 *puValue = pVCpu->cpum.s.Guest.msrEFER;
1329 uint64_t const uOldEfer = pVCpu->cpum.s.Guest.msrEFER;
1330 uint32_t const fExtFeatures = pVM->cpum.s.aGuestCpuIdPatmExt[0].uEax >= 0x80000001
1331 ? pVM->cpum.s.aGuestCpuIdPatmExt[1].uEdx
1356 && (pVCpu->cpum.s.Guest.cr0 & X86_CR0_PG))
1365 pVCpu->cpum.s.Guest.msrEFER = (uOldEfer & ~fMask) | (uValue & fMask);
1370 != (pVCpu->cpum.s.Guest.msrEFER & (MSR_K6_EFER_NXE | MSR_K6_EFER_LME | MSR_K6_EFER_LMA)))
1377 != (pVCpu->cpum.s.Guest.msrEFER & MSR_K6_EFER_NXE))
1387 *puValue = pVCpu->cpum.s.Guest.msrSTAR;
1395 pVCpu->cpum.s.Guest.msrSTAR = uValue;
1403 *puValue = pVCpu->cpum.s.Guest.msrLSTAR;
1416 pVCpu->cpum.s.Guest.msrLSTAR = uValue;
1424 *puValue = pVCpu->cpum.s.Guest.msrCSTAR;
1437 pVCpu->cpum.s.Guest.msrCSTAR = uValue;
1445 *puValue = pVCpu->cpum.s.Guest.msrSFMASK;
1453 pVCpu->cpum.s.Guest.msrSFMASK = uValue;
1461 *puValue = pVCpu->cpum.s.Guest.fs.u64Base;
1469 pVCpu->cpum.s.Guest.fs.u64Base = uValue;
1477 *puValue = pVCpu->cpum.s.Guest.gs.u64Base;
1484 pVCpu->cpum.s.Guest.gs.u64Base = uValue;
1493 *puValue = pVCpu->cpum.s.Guest.msrKERNELGSBASE;
1500 pVCpu->cpum.s.Guest.msrKERNELGSBASE = uValue;
1508 *puValue = pVCpu->cpum.s.GuestMsrs.msr.TscAux;
1515 pVCpu->cpum.s.GuestMsrs.msr.TscAux = uValue;
1595 if (pVM->cpum.s.GuestFeatures.uModel >= 2)
1597 if (uScalableBusHz <= CPUM_SBUSFREQ_100MHZ && pVM->cpum.s.GuestFeatures.uModel <= 2)
1617 else if (uScalableBusHz <= CPUM_SBUSFREQ_267MHZ && pVM->cpum.s.GuestFeatures.uModel > 2)
1728 *puValue = pVCpu->cpum.s.GuestMsrs.msr.PkgCStateCfgCtrl;
1736 if (pVCpu->cpum.s.GuestMsrs.msr.PkgCStateCfgCtrl & RT_BIT_64(15))
1748 pVCpu->cpum.s.GuestMsrs.msr.PkgCStateCfgCtrl = uValue;
4919 uint32_t cRanges = pVM->cpum.s.GuestInfo.cMsrRanges;
4922 PCPUMMSRRANGE paRanges = pVM->cpum.s.GuestInfo.CTX_SUFF(paMsrRanges);
4952 uint32_t cLeft = pVM->cpum.s.GuestInfo.cMsrRanges;
4953 PCPUMMSRRANGE pCur = pVM->cpum.s.GuestInfo.CTX_SUFF(paMsrRanges);
5004 STAM_REL_COUNTER_INC(&pVM->cpum.s.cMsrReads);
5013 STAM_REL_COUNTER_INC(&pVM->cpum.s.cMsrReadsRaiseGp);
5030 STAM_REL_COUNTER_INC(&pVM->cpum.s.cMsrReads);
5031 STAM_REL_COUNTER_INC(&pVM->cpum.s.cMsrReadsUnknown);
5070 STAM_REL_COUNTER_INC(&pVM->cpum.s.cMsrWrites);
5084 STAM_REL_COUNTER_INC(&pVM->cpum.s.cMsrWritesToIgnoredBits);
5094 STAM_REL_COUNTER_INC(&pVM->cpum.s.cMsrWritesRaiseGp);
5114 STAM_REL_COUNTER_INC(&pVM->cpum.s.cMsrWritesRaiseGp);
5121 STAM_REL_COUNTER_INC(&pVM->cpum.s.cMsrWrites);
5122 STAM_REL_COUNTER_INC(&pVM->cpum.s.cMsrWritesUnknown);
5615 uint64_t uFreq = pVM->cpum.s.GuestInfo.uScalableBusFreq;
5634 return pVCpu->cpum.s.GuestMsrs.msr.TscAux;
5648 pVCpu->cpum.s.GuestMsrs.msr.TscAux = uValue;