Lines Matching refs:pGip
127 static void supdrvGipInitCpu(PSUPGLOBALINFOPAGE pGip, PSUPGIPCPU pCpu, uint64_t u64NanoTS, uint64_t uCpuHz);
160 * @param pGip The GIP.
163 static uint32_t supdrvGipFindCpuIndexForCpuId(PSUPGLOBALINFOPAGE pGip, RTCPUID idCpu)
166 for (i = 0; i < pGip->cCpus; i++)
167 if (pGip->aCPUs[i].idCpu == idCpu)
188 * @param pGip Pointer to the GIP.
192 static void supdrvGipReInitCpu(PSUPGLOBALINFOPAGE pGip, PSUPGIPCPU pGipCpu, uint64_t u64NanoTS)
213 PSUPGLOBALINFOPAGE pGip = (PSUPGLOBALINFOPAGE)pvUser1;
214 unsigned iCpu = pGip->aiCpuFromApicId[ASMGetApicId()];
216 if (RT_LIKELY(iCpu < pGip->cCpus && pGip->aCPUs[iCpu].idCpu == idCpu))
217 supdrvGipReInitCpu(pGip, &pGip->aCPUs[iCpu], *(uint64_t *)pvUser2);
256 PSUPGLOBALINFOPAGE pGip = (PSUPGLOBALINFOPAGE)pvUser2;
323 if (RT_LIKELY( idApic < RT_ELEMENTS(pGip->aiCpuFromApicId)
328 AssertCompile(sizeof(pState->bmApicId) * 8 == RT_ELEMENTS(pGip->aiCpuFromApicId));
339 || (unsigned)iCpuSet >= RT_ELEMENTS(pGip->aiCpuFromCpuSetIdx)))
440 if (pDevExt->pGip)
470 PSUPGLOBALINFOPAGE pGipR0 = pDevExt->pGip;
615 OSDBGPRINT(("SUPR0GipUnmap: pSession=%p pGip=%p GipMapObjR3=%p\n",
696 * @param pGip The GIP.
701 static void supdrvGipInitSetCpuFreq(PSUPGLOBALINFOPAGE pGip, uint64_t nsElapsed, uint64_t cElapsedTscTicks, uint32_t iTick)
722 ASMAtomicWriteU64(&pGip->u64CpuHz, uCpuHz);
723 if (pGip->u32Mode != SUPGIPMODE_ASYNC_TSC)
725 ASMAtomicWriteU64(&pGip->aCPUs[0].u64CpuHz, uCpuHz);
728 if (iTick + 1 < pGip->cCpus)
729 ASMAtomicWriteU64(&pGip->aCPUs[iTick + 1].u64CpuHz, uCpuHz);
747 PSUPGLOBALINFOPAGE pGip = pDevExt->pGip;
756 AssertReturnVoid(pGip);
757 AssertReturnVoid(pGip->u32Mode == SUPGIPMODE_INVARIANT_TSC);
797 && pGip->enmUseTscDelta > SUPGIPUSETSCDELTA_ZERO_CLAIMED)
801 uint16_t iStartGipCpu = iStartCpuSet < RT_ELEMENTS(pGip->aiCpuFromCpuSetIdx)
802 ? pGip->aiCpuFromCpuSetIdx[iStartCpuSet] : UINT16_MAX;
803 uint16_t iStopGipCpu = iStopCpuSet < RT_ELEMENTS(pGip->aiCpuFromCpuSetIdx)
804 ? pGip->aiCpuFromCpuSetIdx[iStopCpuSet] : UINT16_MAX;
805 int64_t iStartTscDelta = iStartGipCpu < pGip->cCpus ? pGip->aCPUs[iStartGipCpu].i64TSCDelta : INT64_MAX;
806 int64_t iStopTscDelta = iStopGipCpu < pGip->cCpus ? pGip->aCPUs[iStopGipCpu].i64TSCDelta : INT64_MAX;
809 if (pGip->enmUseTscDelta > SUPGIPUSETSCDELTA_PRACTICALLY_ZERO)
840 supdrvGipInitSetCpuFreq(pGip, cNsElapsed, cTscTicksElapsed, (uint32_t)iTick);
865 PSUPGLOBALINFOPAGE pGip = pDevExt->pGip;
877 if ( RT_LIKELY(pGip)
878 && pGip->enmUseTscDelta > SUPGIPUSETSCDELTA_ZERO_CLAIMED
884 RTCpuSetCopy(&pDevExt->TscDeltaCpuSet, &pGip->OnlineCpuSet);
902 * @param pGip Pointer to the GIP.
904 static void supdrvGipInitStartTimerForRefiningInvariantTscFreq(PSUPDRVDEVEXT pDevExt, PSUPGLOBALINFOPAGE pGip)
1008 * @param pGip Pointer to the GIP.
1015 static int supdrvGipInitMeasureTscFreq(PSUPDRVDEVEXT pDevExt, PSUPGLOBALINFOPAGE pGip, bool fRough)
1049 if (pGip->u32Mode == SUPGIPMODE_INVARIANT_TSC)
1102 if (pGip->u32Mode == SUPGIPMODE_SYNC_TSC)
1105 Assert(pGip->enmUseTscDelta == SUPGIPUSETSCDELTA_NOT_APPLICABLE);
1121 else if (pGip->u32Mode == SUPGIPMODE_INVARIANT_TSC)
1124 if (pGip->enmUseTscDelta > SUPGIPUSETSCDELTA_ZERO_CLAIMED)
1128 uint16_t iStartGipCpu = iStartCpuSet < RT_ELEMENTS(pGip->aiCpuFromCpuSetIdx)
1129 ? pGip->aiCpuFromCpuSetIdx[iStartCpuSet] : UINT16_MAX;
1130 uint16_t iStopGipCpu = iStopCpuSet < RT_ELEMENTS(pGip->aiCpuFromCpuSetIdx)
1131 ? pGip->aiCpuFromCpuSetIdx[iStopCpuSet] : UINT16_MAX;
1132 int64_t iStartTscDelta = iStartGipCpu < pGip->cCpus ? pGip->aCPUs[iStartGipCpu].i64TSCDelta : INT64_MAX;
1133 int64_t iStopTscDelta = iStopGipCpu < pGip->cCpus ? pGip->aCPUs[iStopGipCpu].i64TSCDelta : INT64_MAX;
1136 if (pGip->enmUseTscDelta > SUPGIPUSETSCDELTA_PRACTICALLY_ZERO)
1147 else if (iStopGipCpu >= pGip->cCpus || iStartGipCpu >= pGip->cCpus)
1174 Assert(pGip->u32Mode == SUPGIPMODE_ASYNC_TSC);
1194 supdrvGipInitSetCpuFreq(pGip, nsStop - nsStart, uTscStop - uTscStart, 0);
1207 * @param pGip The GIP.
1210 static uint32_t supdrvGipFindOrAllocCpuIndexForCpuId(PSUPGLOBALINFOPAGE pGip, RTCPUID idCpu)
1217 for (i = 0; i < pGip->cCpus; i++)
1218 if (pGip->aCPUs[i].idCpu == idCpu)
1224 for (i = 0; i < pGip->cCpus; i++)
1227 ASMAtomicCmpXchgSize(&pGip->aCPUs[i].idCpu, idCpu, NIL_RTCPUID, fRc);
1251 PSUPGLOBALINFOPAGE pGip = pDevExt->pGip;
1253 AssertPtrReturnVoid(pGip);
1256 Assert(pGip->cPossibleCpus == RTMpGetCount());
1267 ASMAtomicWriteU16(&pGip->cPresentCpus, RTMpGetPresentCount());
1268 ASMAtomicWriteU16(&pGip->cOnlineCpus, RTMpGetOnlineCount());
1272 Assert(RTCpuSetIsMemberByIndex(&pGip->PossibleCpuSet, iCpuSet));
1273 RTCpuSetAddByIndex(&pGip->OnlineCpuSet, iCpuSet);
1274 RTCpuSetAddByIndex(&pGip->PresentCpuSet, iCpuSet);
1280 u64NanoTS = RTTimeSystemNanoTS() - pGip->u32UpdateIntervalNS;
1281 i = supdrvGipFindOrAllocCpuIndexForCpuId(pGip, idCpu);
1283 supdrvGipInitCpu(pGip, &pGip->aCPUs[i], u64NanoTS, pGip->u64CpuHz);
1286 ASMAtomicWriteU16(&pGip->aCPUs[i].idApic, idApic);
1287 ASMAtomicWriteS16(&pGip->aCPUs[i].iCpuSet, (int16_t)iCpuSet);
1288 ASMAtomicWriteSize(&pGip->aCPUs[i].idCpu, idCpu);
1293 ASMAtomicWriteU16(&pGip->aiCpuFromApicId[idApic], i);
1294 ASMAtomicWriteU16(&pGip->aiCpuFromCpuSetIdx[iCpuSet], i);
1303 ASMAtomicWriteSize(&pGip->aCPUs[i].enmState, SUPGIPCPUSTATE_ONLINE);
1334 PSUPGLOBALINFOPAGE pGip = pDevExt->pGip;
1338 AssertPtrReturnVoid(pGip);
1344 i = pGip->aiCpuFromCpuSetIdx[iCpuSet];
1345 AssertReturnVoid(i < pGip->cCpus);
1346 AssertReturnVoid(pGip->aCPUs[i].idCpu == idCpu);
1348 Assert(RTCpuSetIsMemberByIndex(&pGip->PossibleCpuSet, iCpuSet));
1349 RTCpuSetDelByIndex(&pGip->OnlineCpuSet, iCpuSet);
1354 if (pGip->enmUseTscDelta > SUPGIPUSETSCDELTA_ZERO_CLAIMED)
1357 ASMAtomicWriteS64(&pGip->aCPUs[i].i64TSCDelta, INT64_MAX);
1363 ASMAtomicWriteSize(&pGip->aCPUs[i].enmState, SUPGIPCPUSTATE_OFFLINE);
1382 PSUPGLOBALINFOPAGE pGip = pDevExt->pGip;
1384 if (pGip)
1406 if (pGip->enmUseTscDelta > SUPGIPUSETSCDELTA_ZERO_CLAIMED)
1411 uint32_t iCpu = supdrvGipFindOrAllocCpuIndexForCpuId(pGip, idCpu);
1656 * @param pGip Pointer to the GIP.
1661 static void supdrvGipInitCpu(PSUPGLOBALINFOPAGE pGip, PSUPGIPCPU pCpu, uint64_t u64NanoTS, uint64_t uCpuHz)
1667 pCpu->i64TSCDelta = pGip->enmUseTscDelta > SUPGIPUSETSCDELTA_ZERO_CLAIMED ? INT64_MAX : 0;
1684 pCpu->u32UpdateIntervalTSC = (uint32_t)((_4G - 1) / pGip->u32UpdateHz);
1689 pCpu->u32UpdateIntervalTSC = (uint32_t)(uCpuHz / pGip->u32UpdateHz);
1707 * @param pGip Pointer to the read-write kernel mapping of the GIP.
1714 static void supdrvGipInit(PSUPDRVDEVEXT pDevExt, PSUPGLOBALINFOPAGE pGip, RTHCPHYS HCPhys,
1720 OSDBGPRINT(("supdrvGipInit: pGip=%p HCPhys=%lx u64NanoTS=%llu uUpdateHz=%d cCpus=%u\n", pGip, (long)HCPhys, u64NanoTS, uUpdateHz, cCpus));
1722 LogFlow(("supdrvGipInit: pGip=%p HCPhys=%lx u64NanoTS=%llu uUpdateHz=%d cCpus=%u\n", pGip, (long)HCPhys, u64NanoTS, uUpdateHz, cCpus));
1728 memset(pGip, 0, cbGip);
1730 pGip->u32Magic = SUPGLOBALINFOPAGE_MAGIC;
1731 pGip->u32Version = SUPGLOBALINFOPAGE_VERSION;
1732 pGip->u32Mode = supdrvGipInitDetermineTscMode(pDevExt);
1733 if ( pGip->u32Mode == SUPGIPMODE_INVARIANT_TSC
1734 /*|| pGip->u32Mode == SUPGIPMODE_SYNC_TSC */)
1735 pGip->enmUseTscDelta = supdrvOSAreTscDeltasInSync() /* Allow OS override (windows). */
1738 pGip->enmUseTscDelta = SUPGIPUSETSCDELTA_NOT_APPLICABLE;
1739 pGip->cCpus = (uint16_t)cCpus;
1740 pGip->cPages = (uint16_t)(cbGip / PAGE_SIZE);
1741 pGip->u32UpdateHz = uUpdateHz;
1742 pGip->u32UpdateIntervalNS = uUpdateIntervalNS;
1743 pGip->fGetGipCpu = SUPGIPGETCPU_APIC_ID;
1744 RTCpuSetEmpty(&pGip->OnlineCpuSet);
1745 RTCpuSetEmpty(&pGip->PresentCpuSet);
1746 RTMpGetSet(&pGip->PossibleCpuSet);
1747 pGip->cOnlineCpus = RTMpGetOnlineCount();
1748 pGip->cPresentCpus = RTMpGetPresentCount();
1749 pGip->cPossibleCpus = RTMpGetCount();
1750 pGip->idCpuMax = RTMpGetMaxCpuId();
1751 for (i = 0; i < RT_ELEMENTS(pGip->aiCpuFromApicId); i++)
1752 pGip->aiCpuFromApicId[i] = UINT16_MAX;
1753 for (i = 0; i < RT_ELEMENTS(pGip->aiCpuFromCpuSetIdx); i++)
1754 pGip->aiCpuFromCpuSetIdx[i] = UINT16_MAX;
1756 supdrvGipInitCpu(pGip, &pGip->aCPUs[i], u64NanoTS, 0 /*uCpuHz*/);
1761 pDevExt->pGip = pGip;
1775 PSUPGLOBALINFOPAGE pGip;
1820 pGip = (PSUPGLOBALINFOPAGE)RTR0MemObjAddress(pDevExt->GipMemObj); AssertPtr(pGip);
1836 supdrvGipInit(pDevExt, pGip, HCPhysGip, RTTimeSystemNanoTS(), RT_NS_1SEC / u32Interval /*=Hz*/, u32Interval, cCpus);
1841 if (RT_UNLIKELY( pGip->enmUseTscDelta == SUPGIPUSETSCDELTA_ZERO_CLAIMED
1842 && pGip->u32Mode == SUPGIPMODE_ASYNC_TSC
1850 AssertReturn( pGip->u32Mode != SUPGIPMODE_ASYNC_TSC
1851 || pGip->enmUseTscDelta <= SUPGIPUSETSCDELTA_ZERO_CLAIMED, VERR_INTERNAL_ERROR_3);
1864 if (pGip->u32Mode == SUPGIPMODE_INVARIANT_TSC)
1866 rc = supdrvGipInitMeasureTscFreq(pDevExt, pGip, true /*fRough*/); /* cannot fail */
1867 supdrvGipInitStartTimerForRefiningInvariantTscFreq(pDevExt, pGip);
1870 rc = supdrvGipInitMeasureTscFreq(pDevExt, pGip, false /*fRough*/);
1881 if (pGip->enmUseTscDelta > SUPGIPUSETSCDELTA_ZERO_CLAIMED)
1893 rc = RTMpOnAll(supdrvGipInitOnCpu, pDevExt, pGip);
1900 if (pGip->enmUseTscDelta > SUPGIPUSETSCDELTA_ZERO_CLAIMED)
1913 for (iCpu = 0; iCpu < pGip->cCpus; iCpu++)
1914 Log(("supdrvTscDeltaInit: cpu[%u] delta %lld\n", iCpu, pGip->aCPUs[iCpu].i64TSCDelta));
1918 for (iCpu = 0; iCpu < pGip->cCpus; iCpu++)
1919 AssertMsg(!pGip->aCPUs[iCpu].i64TSCDelta, ("iCpu=%u %lld mode=%d\n", iCpu, pGip->aCPUs[iCpu].i64TSCDelta, pGip->u32Mode));
1928 if (pGip->u32Mode == SUPGIPMODE_ASYNC_TSC)
1935 pGip->u32Mode = SUPGIPMODE_SYNC_TSC;
1938 if (pGip->u32Mode != SUPGIPMODE_ASYNC_TSC)
1949 g_pSUPGlobalInfoPage = pGip;
1978 * @param pGip Pointer to the read-write kernel mapping of the GIP.
1980 static void supdrvGipTerm(PSUPGLOBALINFOPAGE pGip)
1983 pGip->u32Magic = 0;
1984 for (i = 0; i < pGip->cCpus; i++)
1986 pGip->aCPUs[i].u64NanoTS = 0;
1987 pGip->aCPUs[i].u64TSC = 0;
1988 pGip->aCPUs[i].iTSCHistoryHead = 0;
1989 pGip->aCPUs[i].u64TSCSample = 0;
1990 pGip->aCPUs[i].i64TSCDelta = INT64_MAX;
2004 OSDBGPRINT(("supdrvGipDestroy: pDevExt=%p pGip=%p pGipTimer=%p GipMemObj=%p\n", pDevExt,
2033 if (pDevExt->pGip)
2035 supdrvGipTerm(pDevExt->pGip);
2036 pDevExt->pGip = NULL;
2097 PSUPGLOBALINFOPAGE pGip = pDevExt->pGip;
2098 AssertPtrReturnVoid(pGip);
2118 if (pGip->u32Mode != SUPGIPMODE_INVARIANT_TSC)
2154 && pGip->u32Mode != SUPGIPMODE_ASYNC_TSC)
2156 uint32_t uNanoTsThreshold = pGip->u32UpdateIntervalNS / 200;
2157 if ( pGipCpu->u32PrevUpdateIntervalNS > pGip->u32UpdateIntervalNS + uNanoTsThreshold
2158 || pGipCpu->u32PrevUpdateIntervalNS < pGip->u32UpdateIntervalNS - uNanoTsThreshold)
2190 if ( pGip->u32Mode == SUPGIPMODE_INVARIANT_TSC
2191 || pGip->u32UpdateHz >= 1000)
2210 else if (pGip->u32UpdateHz >= 90)
2232 u64CpuHz /= pGip->u32UpdateIntervalNS;
2255 PSUPGLOBALINFOPAGE pGip = pDevExt->pGip;
2256 AssertPtrReturnVoid(pGip);
2258 if (pGip->u32Mode != SUPGIPMODE_ASYNC_TSC)
2259 pGipCpu = &pGip->aCPUs[0];
2262 unsigned iCpu = pGip->aiCpuFromApicId[ASMGetApicId()];
2263 if (RT_UNLIKELY(iCpu >= pGip->cCpus))
2265 pGipCpu = &pGip->aCPUs[iCpu];
2285 if ( pGip->u32Mode != SUPGIPMODE_INVARIANT_TSC /* cuz we're not recalculating the frequency on invariants hosts. */
2288 if (pGip->u64NanoTSLastUpdateHz)
2291 uint64_t u64Delta = u64NanoTS - pGip->u64NanoTSLastUpdateHz;
2299 ASMAtomicWriteU32(&pGip->u32UpdateHz, u32UpdateHz);
2300 ASMAtomicWriteU32(&pGip->u32UpdateIntervalNS, (uint32_t)u64Interval);
2304 ASMAtomicWriteU64(&pGip->u64NanoTSLastUpdateHz, u64NanoTS | 1);
2335 PSUPGLOBALINFOPAGE pGip = pDevExt->pGip;
2344 iCpu = supdrvGipFindOrAllocCpuIndexForCpuId(pGip, idCpu);
2345 if (pGip->aCPUs[iCpu].enmState == SUPGIPCPUSTATE_OFFLINE)
2349 iCpu = pGip->aiCpuFromApicId[idApic];
2350 if (RT_LIKELY(iCpu < pGip->cCpus))
2352 PSUPGIPCPU pGipCpu = &pGip->aCPUs[iCpu];
2390 PSUPGLOBALINFOPAGE pGip = pDevExt->pGip;
2395 if (pGip->enmUseTscDelta > SUPGIPUSETSCDELTA_PRACTICALLY_ZERO)
2412 uint16_t iGipCpu = RT_LIKELY(iCpuSet < RT_ELEMENTS(pGip->aiCpuFromCpuSetIdx))
2413 ? pGip->aiCpuFromCpuSetIdx[iCpuSet] : UINT16_MAX;
2415 if (RT_LIKELY(iGipCpu < pGip->cCpus))
2417 int64_t iTscDelta = pGip->aCPUs[iGipCpu].i64TSCDelta;
3724 PSUPGLOBALINFOPAGE pGip = pDevExt->pGip;
3726 PSUPGIPCPU pGipCpuWorker = &pGip->aCPUs[idxWorker];
3731 AssertReturn(pGip, VERR_INVALID_PARAMETER);
3732 Assert(pGip->enmUseTscDelta > SUPGIPUSETSCDELTA_ZERO_CLAIMED);
3767 iGipCpuMaster = supdrvGipFindCpuIndexForCpuId(pGip, idMaster);
3768 AssertReturn(iGipCpuMaster < pGip->cCpus, VERR_INVALID_CPU_ID);
3769 pGipCpuMaster = &pGip->aCPUs[iGipCpuMaster];
3775 && pGip->cOnlineCpus > 2)
3779 for (i = 0; i < pGip->cCpus; i++)
3782 && pGip->aCPUs[i].enmState == SUPGIPCPUSTATE_ONLINE
3783 && pGip->aCPUs[i].i64TSCDelta != INT64_MAX
3784 && pGip->aCPUs[i].idCpu != NIL_RTCPUID
3785 && pGip->aCPUs[i].idCpu != idMaster /* paranoia starts here... */
3786 && pGip->aCPUs[i].idCpu != pGipCpuWorker->idCpu
3787 && pGip->aCPUs[i].idApic != pGipCpuWorker->idApic
3788 && pGip->aCPUs[i].idApic != pGipCpuMaster->idApic
3789 && RTMpIsCpuOnline(pGip->aCPUs[i].idCpu))
3792 pGipCpuMaster = &pGip->aCPUs[i];
3798 if (RTCpuSetIsMemberByIndex(&pGip->OnlineCpuSet, pGipCpuWorker->iCpuSet))
3811 pArgs->cMaxTscTicks = ASMAtomicReadU64(&pGip->u64CpuHz) / 512; /* 1953 us */
3848 if (pGip->enmUseTscDelta < enmRating)
3850 AssertCompile(sizeof(pGip->enmUseTscDelta) == sizeof(uint32_t));
3851 ASMAtomicWriteU32((uint32_t volatile *)&pGip->enmUseTscDelta, enmRating);
3891 PSUPGLOBALINFOPAGE pGip = pDevExt->pGip;
3892 for (iCpu = 0; iCpu < pGip->cCpus; iCpu++)
3894 PSUPGIPCPU pGipCpu = &pGip->aCPUs[iCpu];
3925 PSUPGLOBALINFOPAGE pGip = pDevExt->pGip;
3926 for (iCpu = 0; iCpu < RT_ELEMENTS(pGip->aiCpuFromApicId); iCpu++)
3928 uint16_t idxCpu = pGip->aiCpuFromApicId[iCpu];
3931 PSUPGIPCPU pGipCpu = &pGip->aCPUs[idxCpu];
3932 if (RTCpuSetIsMemberByIndex(&pGip->OnlineCpuSet, pGipCpu->iCpuSet))
3965 PSUPGLOBALINFOPAGE pGip = pDevExt->pGip;
3969 Assert(pGip->enmUseTscDelta > SUPGIPUSETSCDELTA_ZERO_CLAIMED);
3977 AssertReturn(idxMaster < pGip->cCpus, VERR_INVALID_CPU_INDEX);
3978 pGipCpuMaster = &pGip->aCPUs[idxMaster];
3984 if (pGip->cOnlineCpus <= 1)
3986 AssertReturn(pGip->cOnlineCpus > 0, VERR_INTERNAL_ERROR_5);
3997 for (iCpu = 0; iCpu < pGip->cCpus; iCpu++)
3999 PSUPGIPCPU pGipCpuWorker = &pGip->aCPUs[iCpu];
4122 PSUPGLOBALINFOPAGE pGip = pDevExt->pGip;
4123 Assert(pGip);
4126 RTCpuSetCopy(&pDevExt->TscDeltaCpuSet, &pGip->OnlineCpuSet);
4141 PSUPGLOBALINFOPAGE pGip = pDevExt->pGip;
4146 for (iCpu = 0; iCpu < pGip->cCpus; iCpu++)
4148 PSUPGIPCPU pGipCpuWorker = &pGip->aCPUs[iCpu];
4337 Assert(pDevExt->pGip->enmUseTscDelta > SUPGIPUSETSCDELTA_ZERO_CLAIMED);
4428 PSUPGLOBALINFOPAGE pGip;
4446 pGip = pDevExt->pGip;
4447 AssertPtrReturn(pGip, VERR_INTERNAL_ERROR_2);
4450 AssertReturn(iCpuSet < RT_ELEMENTS(pGip->aiCpuFromCpuSetIdx), VERR_INVALID_CPU_INDEX);
4451 iGipCpu = pGip->aiCpuFromCpuSetIdx[iCpuSet];
4452 AssertReturn(iGipCpu < pGip->cCpus, VERR_INVALID_CPU_INDEX);
4460 if (pGip->enmUseTscDelta <= SUPGIPUSETSCDELTA_ZERO_CLAIMED)
4477 if ( pGip->aCPUs[iGipCpu].i64TSCDelta != INT64_MAX
4546 && pGip->aCPUs[iGipCpu].i64TSCDelta != INT64_MAX)
4556 Assert(pGip->aCPUs[iGipCpu].i64TSCDelta != INT64_MAX || RT_FAILURE_NP(rc));
4632 PSUPGLOBALINFOPAGE pGip;
4642 pGip = pDevExt->pGip;
4643 AssertReturn(pGip, VERR_INTERNAL_ERROR_2);
4649 if (pGip->enmUseTscDelta > SUPGIPUSETSCDELTA_ZERO_CLAIMED)
4661 if (RT_LIKELY( (unsigned)iCpuSet < RT_ELEMENTS(pGip->aiCpuFromCpuSetIdx)
4662 && (iGipCpu = pGip->aiCpuFromCpuSetIdx[iCpuSet]) < pGip->cCpus ))
4664 int64_t i64Delta = pGip->aCPUs[iGipCpu].i64TSCDelta;
4665 pReq->u.Out.idApic = pGip->aCPUs[iGipCpu].idApic;
4690 Assert(pGip->aCPUs[iGipCpu].i64TSCDelta != INT64_MAX || RT_FAILURE_NP(rc));
4713 if (RT_LIKELY( (unsigned)iCpuSet < RT_ELEMENTS(pGip->aiCpuFromCpuSetIdx)
4714 && (iGipCpu = pGip->aiCpuFromCpuSetIdx[iCpuSet]) < pGip->cCpus ))
4715 pReq->u.Out.idApic = pGip->aCPUs[iGipCpu].idApic;